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arm/raspberrypi: use cache manager operations to flush/invalidate all cache levels.

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This fix strange behavior where some stale content has been
stored in level 2 cache before RTEMS has been start from U-boot
which has reappeared after MMU enable and shadow vector
table at start of SDRAM.

Updates #2782
Updates #2783
This commit is contained in:
Pavel Pisa
2016-07-17 18:45:46 +02:00
parent 8c5c8b2700
commit d3a428cafa
1 changed files with 7 additions and 7 deletions
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14
c/src/lib/libbsp/arm/raspberrypi/startup/bspstarthooks.c
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@@ -46,18 +46,18 @@ void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
* If the data cache is on then ensure that it is clean
* before switching off to be extra carefull.
*/
arm_cp15_drain_write_buffer();
arm_cp15_data_cache_clean_and_invalidate();
rtems_cache_flush_entire_data();
rtems_cache_invalidate_entire_data();
}
arm_cp15_flush_prefetch_buffer();
sctlr_val &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M | ARM_CP15_CTRL_A);
arm_cp15_set_control(sctlr_val);
arm_cp15_tlb_invalidate();
arm_cp15_flush_prefetch_buffer();
arm_cp15_data_cache_invalidate();
arm_cp15_instruction_cache_invalidate();
}
rtems_cache_invalidate_entire_data();
rtems_cache_invalidate_entire_instruction();
arm_cp15_branch_predictor_invalidate_all();
arm_cp15_tlb_invalidate();
arm_cp15_flush_prefetch_buffer();
/* Clear Translation Table Base Control Register */
arm_cp15_set_translation_table_base_control_register(0);