build: Replace variant patterns with a list

Replace the variant patterns in the default-by-variant list with an
explicit list of matching BSPs.

The change was tested by comparing the output of

  ./waf bspdefaults

before and after the change.

spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c0.yml

@@ -10,16 +10,16 @@ default: 111111111
 default-by-variant:
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_ilp32_qemu.*
+  - aarch64/xilinx_zynqmp_ilp32_qemu
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg.*
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_lp64_qemu.*
+  - aarch64/xilinx_zynqmp_lp64_qemu
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_lp64_zu3eg.*
+  - aarch64/xilinx_zynqmp_lp64_zu3eg
 description: |
   ZynqMP i2c0 clock frequency in Hz. This is the frequency after the signal
   has been processed using the values passed to the I2C0_REF_CTRL register.

spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml

@@ -10,16 +10,16 @@ default: 111111111
 default-by-variant:
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_ilp32_qemu.*
+  - aarch64/xilinx_zynqmp_ilp32_qemu
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg.*
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_lp64_qemu.*
+  - aarch64/xilinx_zynqmp_lp64_qemu
 - value: 111111111
   variants:
-  - aarch64/xilinx_zynqmp_lp64_zu3eg.*
+  - aarch64/xilinx_zynqmp_lp64_zu3eg
 description: |
   ZynqMP i2c1 clock frequency in Hz. This is the frequency after the signal
   has been processed using the values passed to the I2C1_REF_CTRL register.

spec/build/bsps/aarch64/xilinx-zynqmp/optclkuart.yml

@@ -9,8 +9,11 @@ default: 100000000
 default-by-variant:
 - value: 100000000
   variants:
-  - aarch64/xilinx_zynqmp_ilp32.*
+  - aarch64/xilinx_zynqmp_ilp32_qemu
-  - aarch64/xilinx_zynqmp_lp64.*
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
+  - aarch64/xilinx_zynqmp_lp64_cfc400x
+  - aarch64/xilinx_zynqmp_lp64_qemu
+  - aarch64/xilinx_zynqmp_lp64_zu3eg
 description: |
   Zynq UART clock frequency in Hz
 enabled-by: true

spec/build/bsps/aarch64/xilinx-zynqmp/optloadoff.yml

@@ -11,9 +11,9 @@ default: 0x00008000
 default-by-variant:
 - value: 0x00000000
   variants:
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
   - aarch64/xilinx_zynqmp_lp64_cfc400x
   - aarch64/xilinx_zynqmp_lp64_zu3eg
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg
 description: |
   offset of RAM region from memory area base
 enabled-by: true

spec/build/bsps/aarch64/xilinx-zynqmp/optramori.yml

@@ -11,9 +11,9 @@ default: 0x40018000
 default-by-variant:
 - value: 0x10000000
   variants:
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
   - aarch64/xilinx_zynqmp_lp64_cfc400x
   - aarch64/xilinx_zynqmp_lp64_zu3eg
-  - aarch64/xilinx_zynqmp_ilp32_zu3eg
 description: |
   base address of memory area available to the BSP
 enabled-by: true

spec/build/bsps/arm/altera-cyclone-v/optclkfastidle.yml

@@ -9,7 +9,9 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing.  This can significantly reduce simulation times.
 enabled-by: true

spec/build/bsps/arm/beagle/optam335x.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/beaglebone.*
+  - arm/beagleboneblack
+  - arm/beaglebonewhite
 description: |
   true if SOC is AM335X
 enabled-by: true

spec/build/bsps/arm/beagle/optdebug.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: false
   variants:
-  - arm/beaglebone.*
+  - arm/beagleboneblack
+  - arm/beaglebonewhite
 description: |
   Enable BBB debug
 enabled-by: true

spec/build/bsps/arm/beagle/optdm3730.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/beagleboard.*
+  - arm/beagleboardorig
+  - arm/beagleboardxm
 description: |
   true if SOC is DM3730
 enabled-by: true

spec/build/bsps/arm/imx/optcachedata.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable data cache
 enabled-by: true

spec/build/bsps/arm/imx/optcacheinst.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable instruction cache
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optgpioahb.yml

@@ -9,10 +9,10 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lm3s3749.*
+  - arm/lm3s3749
 - value: true
   variants:
-  - arm/lm4f.*
+  - arm/lm4f120
 description: |
   use AHB apperture to access GPIO registers
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optgpionum.yml

@@ -9,13 +9,14 @@ default: 0
 default-by-variant:
 - value: 8
   variants:
-  - arm/lm3s3749.*
+  - arm/lm3s3749
 - value: 7
   variants:
-  - arm/lm3s6965.*
+  - arm/lm3s6965
+  - arm/lm3s6965_qemu
 - value: 6
   variants:
-  - arm/lm4f120.*
+  - arm/lm4f120
 description: |
   number of GPIO blocks supported by MCU
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optlm3s3749.yml

@@ -9,7 +9,7 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lm3s3749.*
+  - arm/lm3s3749
 description: |
   board has LM3S3749 MCU
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optlm3s6965.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lm3s6965.*
+  - arm/lm3s6965
+  - arm/lm3s6965_qemu
 description: |
   board has LM3S6965 MCU
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optlm4f120.yml

@@ -9,7 +9,7 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lm4f120.*
+  - arm/lm4f120
 description: |
   board has LM4F120xxx MCU
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optssiblks.yml

@@ -9,13 +9,14 @@ default: 0
 default-by-variant:
 - value: 2
   variants:
-  - arm/lm3s3749.*
+  - arm/lm3s3749
 - value: 1
   variants:
-  - arm/lm3s6965.*
+  - arm/lm3s6965
+  - arm/lm3s6965_qemu
 - value: 4
   variants:
-  - arm/lm4f120.*
+  - arm/lm4f120
 description: |
   number of SSI blocks supported by MCU
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optsysclk.yml

@@ -9,10 +9,12 @@ default: 0
 default-by-variant:
 - value: 50000000
   variants:
-  - arm/lm3s.*
+  - arm/lm3s3749
+  - arm/lm3s6965
+  - arm/lm3s6965_qemu
 - value: 80000000
   variants:
-  - arm/lm4f.*
+  - arm/lm4f120
 description: |
   system clock in Hz
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optudma.yml

@@ -9,10 +9,10 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lm3s3749.*
+  - arm/lm3s3749
 - value: true
   variants:
-  - arm/lm4f.*
+  - arm/lm4f120
 description: |
   defined if MCU supports UDMA
 enabled-by: true

spec/build/bsps/arm/lm3s69xx/optxtalcfg.yml

@@ -9,13 +9,14 @@ default: 0x00000000
 default-by-variant:
 - value: 0x0000000e
   variants:
-  - arm/lm3s6965.*
+  - arm/lm3s6965
+  - arm/lm3s6965_qemu
 - value: 0x00000010
   variants:
-  - arm/lm3s3749.*
+  - arm/lm3s3749
 - value: 0x00000015
   variants:
-  - arm/lm4f120.*
+  - arm/lm4f120
 description: |
   crystal configuration for RCC register
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optcclk.yml

@@ -9,16 +9,20 @@ default: 72000000
 default-by-variant:
 - value: 96000000
   variants:
-  - arm/lpc17xx_ea.*
+  - arm/lpc17xx_ea_ram
+  - arm/lpc17xx_ea_rom_int
 - value: 96000000
   variants:
-  - arm/lpc40xx_ea.*
+  - arm/lpc40xx_ea_ram
+  - arm/lpc40xx_ea_rom_int
 - value: 58982400
   variants:
-  - arm/lpc23.*
+  - arm/lpc2362
+  - arm/lpc23xx_tli800
 - value: 51612800
   variants:
-  - arm/lpc24xx_plx800_.*
+  - arm/lpc24xx_plx800_ram
+  - arm/lpc24xx_plx800_rom_int
 description: |
   CPU clock in Hz
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optdmachn.yml

@@ -9,10 +9,17 @@ default: 2
 default-by-variant:
 - value: 8
   variants:
-  - arm/lpc17.*
+  - arm/lpc1768_mbed
+  - arm/lpc1768_mbed_ahb_ram
+  - arm/lpc1768_mbed_ahb_ram_eth
+  - arm/lpc17xx_ea_ram
+  - arm/lpc17xx_ea_rom_int
+  - arm/lpc17xx_plx800_ram
+  - arm/lpc17xx_plx800_rom_int
 - value: 8
   variants:
-  - arm/lpc40.*
+  - arm/lpc40xx_ea_ram
+  - arm/lpc40xx_ea_rom_int
 description: |
   DMA channel count
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optemcclkdiv.yml

@@ -9,10 +9,12 @@ default: 1
 default-by-variant:
 - value: 2
   variants:
-  - arm/lpc17xx_ea.*
+  - arm/lpc17xx_ea_ram
+  - arm/lpc17xx_ea_rom_int
 - value: 2
   variants:
-  - arm/lpc40xx_ea.*
+  - arm/lpc40xx_ea_ram
+  - arm/lpc40xx_ea_rom_int
 description: |
   clock divider for EMCCLK (EMCCLK = CCLK / EMCCLKDIV)
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optemcis42s32800b.yml

@@ -9,10 +9,10 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lpc17xx_ea_rom_.*
+  - arm/lpc17xx_ea_rom_int
 - value: true
   variants:
-  - arm/lpc40xx_ea_rom_.*
+  - arm/lpc40xx_ea_rom_int
 description: |
   enable ISSI IS42S32800B configuration for EMC
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optemcis42s32800d7.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*_plx800_rom_.*
+  - arm/lpc17xx_plx800_rom_int
+  - arm/lpc24xx_plx800_rom_int
 description: |
   enable ISSI IS42S32800D7 configuration for EMC
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optemcm29w160e.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lpc24xx_ncs_rom_.*
+  - arm/lpc24xx_ncs_rom_ext
+  - arm/lpc24xx_ncs_rom_int
 description: |
   enable M29W160E configuration for EMC
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optemcm29w320e70.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*_plx800_rom_.*
+  - arm/lpc17xx_plx800_rom_int
+  - arm/lpc24xx_plx800_rom_int
 description: |
   enable M29W320E70 configuration for EMC
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optemcmt48lc4m16a2.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lpc24xx_ncs_rom_.*
+  - arm/lpc24xx_ncs_rom_ext
+  - arm/lpc24xx_ncs_rom_int
 description: |
   enable Micron MT48LC4M16A2 configuration for EMC
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optethrmii.yml

@@ -9,7 +9,10 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*_ea_.*
+  - arm/lpc17xx_ea_ram
+  - arm/lpc17xx_ea_rom_int
+  - arm/lpc40xx_ea_ram
+  - arm/lpc40xx_ea_rom_int
 description: |
   enable RMII for Ethernet
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optheapext.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/lpc23.*
+  - arm/lpc2362
+  - arm/lpc23xx_tli800
 description: |
   enable heap extend by Ethernet and USB regions
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optoscmain.yml

@@ -9,7 +9,8 @@ default: 12000000
 default-by-variant:
 - value: 3686400
   variants:
-  - arm/lpc23.*
+  - arm/lpc2362
+  - arm/lpc23xx_tli800
 description: |
   main oscillator frequency in Hz
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optotgi2c.yml

@@ -9,10 +9,12 @@ default: 0x00000000
 default-by-variant:
 - value: 0x0000005e
   variants:
-  - arm/lpc17xx_ea.*
+  - arm/lpc17xx_ea_ram
+  - arm/lpc17xx_ea_rom_int
 - value: 0x0000005e
   variants:
-  - arm/lpc40xx_ea.*
+  - arm/lpc40xx_ea_ram
+  - arm/lpc40xx_ea_rom_int
 description: |
   USB OTG transceiver I2C address used by USB stack
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optpclkdiv.yml

@@ -9,10 +9,12 @@ default: 1
 default-by-variant:
 - value: 2
   variants:
-  - arm/lpc17xx_ea.*
+  - arm/lpc17xx_ea_ram
+  - arm/lpc17xx_ea_rom_int
 - value: 2
   variants:
-  - arm/lpc40xx_ea.*
+  - arm/lpc40xx_ea_ram
+  - arm/lpc40xx_ea_rom_int
 description: |
   clock divider for default PCLK (PCLK = CCLK / PCLKDIV)
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optstopeth.yml

@@ -9,7 +9,8 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/lpc23.*
+  - arm/lpc2362
+  - arm/lpc23xx_tli800
 description: |
   stop Ethernet controller at start-up to avoid DMA interference
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optstopusb.yml

@@ -9,7 +9,8 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/lpc23.*
+  - arm/lpc2362
+  - arm/lpc23xx_tli800
 description: |
   stop USB controller at start-up to avoid DMA interference
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optuart1cfg.yml

@@ -9,7 +9,10 @@ default: false
 default-by-variant:
 - value: false
   variants:
-  - arm/.*_plx800_.*
+  - arm/lpc17xx_plx800_ram
+  - arm/lpc17xx_plx800_rom_int
+  - arm/lpc24xx_plx800_ram
+  - arm/lpc24xx_plx800_rom_int
 description: |
   configuration for UART 1
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optuart2cfg.yml

@@ -9,13 +9,19 @@ default: false
 default-by-variant:
 - value: false
   variants:
-  - arm/lpc23.*
+  - arm/lpc2362
+  - arm/lpc23xx_tli800
 - value: false
   variants:
-  - arm/lpc24xx_ncs_.*
+  - arm/lpc24xx_ncs_ram
+  - arm/lpc24xx_ncs_rom_ext
+  - arm/lpc24xx_ncs_rom_int
 - value: false
   variants:
-  - arm/.*_plx800_.*
+  - arm/lpc17xx_plx800_ram
+  - arm/lpc17xx_plx800_rom_int
+  - arm/lpc24xx_plx800_ram
+  - arm/lpc24xx_plx800_rom_int
 description: |
   configuration for UART 2
 enabled-by: true

spec/build/bsps/arm/lpc24xx/optuart3cfg.yml

@@ -9,10 +9,13 @@ default: false
 default-by-variant:
 - value: false
   variants:
-  - arm/lpc23.*
+  - arm/lpc2362
+  - arm/lpc23xx_tli800
 - value: false
   variants:
-  - arm/lpc24xx_ncs_.*
+  - arm/lpc24xx_ncs_ram
+  - arm/lpc24xx_ncs_rom_ext
+  - arm/lpc24xx_ncs_rom_int
 description: |
   configuration for UART 3
 enabled-by: true

spec/build/bsps/arm/lpc32xx/optotgi2c.yml

@@ -9,7 +9,9 @@ default: 0x00000000
 default-by-variant:
 - value: 0x00000058
   variants:
-  - arm/lpc32xx_mzx.*
+  - arm/lpc32xx_mzx
+  - arm/lpc32xx_mzx_stage_1
+  - arm/lpc32xx_mzx_stage_2
 description: |
   USB OTG transceiver I2C address used by USB stack
 enabled-by: true

spec/build/bsps/arm/lpc32xx/optotgvbus.yml

@@ -9,7 +9,9 @@ default: false
 default-by-variant:
 - value: USB_OTG_VBUS_POWER_WITH_CHARGE_PUMP
   variants:
-  - arm/lpc32xx_mzx.*
+  - arm/lpc32xx_mzx
+  - arm/lpc32xx_mzx_stage_1
+  - arm/lpc32xx_mzx_stage_2
 description: |
   USB OTG transceiver VBUS policy
 enabled-by: true

spec/build/bsps/arm/lpc32xx/optscratchsz.yml

@@ -9,7 +9,9 @@ default: 0
 default-by-variant:
 - value: 4096
   variants:
-  - arm/lpc32xx_mzx.*
+  - arm/lpc32xx_mzx
+  - arm/lpc32xx_mzx_stage_1
+  - arm/lpc32xx_mzx_stage_2
 description: |
   size of scratch area
 enabled-by: true

spec/build/bsps/arm/realview-pbx-a9/optcachedata.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable data cache
 enabled-by: true

spec/build/bsps/arm/realview-pbx-a9/optcacheinst.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable instruction cache
 enabled-by: true

spec/build/bsps/arm/realview-pbx-a9/optclkbootcpu.yml

@@ -9,7 +9,9 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*qemu.*
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   If defined, then do the clock tick processing on the boot processor on behalf of all other processors.
 enabled-by: true

spec/build/bsps/arm/realview-pbx-a9/optclkfastidle.yml

@@ -9,7 +9,9 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*qemu.*
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing.  This can significantly reduce simulation times.
 enabled-by: true

spec/build/bsps/arm/stm32f4/opteni2c1.yml

@@ -9,7 +9,7 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/stm32f1.*
+  - arm/stm32f105rc
 description: |
   enable I2C 1
 enabled-by: true

spec/build/bsps/arm/stm32f4/optf10xxx.yml

@@ -9,7 +9,7 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/stm32f1.*
+  - arm/stm32f105rc
 description: |
   Chip belongs to the STM32F10XXX family.
 enabled-by: true

spec/build/bsps/arm/stm32f4/optf4xxxx.yml

@@ -9,7 +9,7 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/stm32f4.*
+  - arm/stm32f4
 description: |
   Chip belongs to the STM32F4XXXX family.
 enabled-by: true

spec/build/bsps/arm/stm32f4/opthclk.yml

@@ -9,7 +9,7 @@ default: 16000000
 default-by-variant:
 - value: 8000000
   variants:
-  - arm/stm32f1.*
+  - arm/stm32f105rc
 description: |
   HCLK frequency in Hz
 enabled-by: true

spec/build/bsps/arm/stm32f4/optpclk1.yml

@@ -9,7 +9,7 @@ default: 16000000
 default-by-variant:
 - value: 8000000
   variants:
-  - arm/stm32f1.*
+  - arm/stm32f105rc
 description: |
   PCLK1 frequency in Hz
 enabled-by: true

spec/build/bsps/arm/stm32f4/optpclk2.yml

@@ -9,7 +9,7 @@ default: 16000000
 default-by-variant:
 - value: 8000000
   variants:
-  - arm/stm32f1.*
+  - arm/stm32f105rc
 description: |
   PCLK2 frequency in Hz
 enabled-by: true

spec/build/bsps/arm/stm32f4/optsysclk.yml

@@ -9,7 +9,7 @@ default: 16000000
 default-by-variant:
 - value: 8000000
   variants:
-  - arm/stm32f1.*
+  - arm/stm32f105rc
 description: |
   SYSCLK frequency in Hz
 enabled-by: true

spec/build/bsps/arm/stm32h7/abi.yml

@@ -18,8 +18,8 @@ default-by-variant:
   - -mfpu=fpv4-sp-d16
   - -mfloat-abi=hard
   variants:
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval-m4
 description: |
   ABI flags
 enabled-by: true

spec/build/bsps/arm/stm32h7/optbootcore.yml

@@ -13,12 +13,12 @@ default: BOOT_CORE_DEFINE_NOT_NEEDED
 default-by-variant:
 - value: CORE_CM7
   variants:
-  - arm/stm32h757i-eval
   - arm/stm32h747i-disco
+  - arm/stm32h757i-eval
 - value: CORE_CM4
   variants:
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval-m4
 description: |
   Select the boot core. Possible values are CORE_CM7 and CORE_CM4
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenuart4.yml

@@ -9,10 +9,10 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
 description: |
   Enable UART4 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenuart5.yml

@@ -9,11 +9,11 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h7b3i-dk
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Enable UART5 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenuart7.yml

@@ -9,11 +9,11 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h7b3i-dk
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Enable UART7 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenuart8.yml

@@ -9,9 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h7b3i-dk
   - arm/stm32h757i-eval
   - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Enable UART8 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenuart9.yml

@@ -9,11 +9,11 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h7b3i-dk
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Enable UART9 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenusart10.yml

@@ -9,11 +9,11 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h7b3i-dk
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Enable USART10 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenusart3.yml

@@ -9,11 +9,11 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h7b3i-dk
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Enable USART3 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optenusart6.yml

@@ -9,11 +9,11 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/stm32h7b3i-dk
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Enable USART6 device in console driver.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optlinkcmds.yml

@@ -9,12 +9,12 @@ default: linkcmds.sdram
 default-by-variant:
 - value: linkcmds.flash
   variants:
-  - arm/stm32h7b3i-dk
+  - arm/nucleo-h743zi
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
-  - arm/nucleo-h743zi
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   The default linker command file.  Must be either linkcmds.flash,
   linkcmds.sdram, linkcmds.sram, linkcmds.sram_sdram

spec/build/bsps/arm/stm32h7/optmemflashorigin.yml

@@ -9,8 +9,8 @@ default: 0x08000000
 default-by-variant:
 - value: 0x08100000
   variants:
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval-m4
 description: |
   Origin address of the internal flash.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optmemflashsz.yml

@@ -9,8 +9,8 @@ default: 0x00200000
 default-by-variant:
 - value: 0x00100000
   variants:
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval-m4
 description: |
   Size of the internal flash in bytes.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optmemsdram1sz.yml

@@ -9,12 +9,12 @@ default: 0x02000000
 default-by-variant:
 - value: 0x00000000
   variants:
-  - arm/stm32h7b3i-dk
+  - arm/nucleo-h743zi
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
-  - arm/nucleo-h743zi
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Size of the SDRAM 1 in bytes.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optmemsdram2sz.yml

@@ -9,10 +9,10 @@ default: 0x00000000
 default-by-variant:
 - value: 0x02000000
   variants:
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
 description: |
   Size of the SDRAM 2 in bytes.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optpwrsupply.yml

@@ -9,11 +9,11 @@ default: PWR_LDO_SUPPLY
 default-by-variant:
 - value: PWR_DIRECT_SMPS_SUPPLY
   variants:
-  - arm/stm32h7b3i-dk
-  - arm/stm32h757i-eval
-  - arm/stm32h757i-eval-m4
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h757i-eval
+  - arm/stm32h757i-eval-m4
+  - arm/stm32h7b3i-dk
 description: |
   Board power supply mechanism configuration. WARNING: wrong configuration here
   may result in your board being unaccessible using ST-Link interface! Please

spec/build/bsps/arm/stm32h7/optusart1alternatefunc.yml

@@ -9,9 +9,9 @@ default: GPIO_AF4_USART1
 default-by-variant:
 - value: GPIO_AF7_USART1
   variants:
-  - arm/stm32h7b3i-dk
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h7b3i-dk
 description: |
   Alternate function mapping for the USART1 pin configuration.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optusart1gpiopins.yml

@@ -9,9 +9,9 @@ default: ( GPIO_PIN_14 | GPIO_PIN_15 )
 default-by-variant:
 - value: ( GPIO_PIN_9 | GPIO_PIN_10 )
   variants:
-  - arm/stm32h7b3i-dk
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h7b3i-dk
 description: |
   GPIO pins used for the USART1 pin configuration.
 enabled-by: true

spec/build/bsps/arm/stm32h7/optusart1gpioregs.yml

@@ -9,9 +9,9 @@ default: GPIOD
 default-by-variant:
 - value: GPIOA
   variants:
-  - arm/stm32h7b3i-dk
   - arm/stm32h747i-disco
   - arm/stm32h747i-disco-m4
+  - arm/stm32h7b3i-dk
 - value: GPIOB
   variants:
   - arm/stm32h757i-eval

spec/build/bsps/arm/xilinx-zynq/opta9periphclk.yml

@@ -9,10 +9,10 @@ default: 100000000
 default-by-variant:
 - value: 333333333
   variants:
-  - arm/xilinx_zynq_zc702.*
+  - arm/xilinx_zynq_zc702
 - value: 666666667
   variants:
-  - arm/xilinx_zynq_zedboard.*
+  - arm/xilinx_zynq_zedboard
 description: |
   ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz
 enabled-by: true

spec/build/bsps/arm/xilinx-zynq/optcachedata.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable data cache
 enabled-by: true

spec/build/bsps/arm/xilinx-zynq/optcacheinst.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable instruction cache
 enabled-by: true

spec/build/bsps/arm/xilinx-zynq/optclkcpu1x.yml

@@ -9,10 +9,10 @@ default: 111111111
 default-by-variant:
 - value: 111111111
   variants:
-  - arm/xilinx_zynq_zc702.*
+  - arm/xilinx_zynq_zc702
 - value: 111111111
   variants:
-  - arm/xilinx_zynq_zedboard.*
+  - arm/xilinx_zynq_zedboard
 description: |
   Zynq cpu_1x clock frequency in Hz
 enabled-by: true

spec/build/bsps/arm/xilinx-zynq/optclkfastidle.yml

@@ -9,7 +9,9 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing.  This can significantly reduce simulation times.
 enabled-by: true

spec/build/bsps/arm/xilinx-zynq/optclkuart.yml

@@ -9,10 +9,10 @@ default: 50000000
 default-by-variant:
 - value: 50000000
   variants:
-  - arm/xilinx_zynq_zc702.*
+  - arm/xilinx_zynq_zc702
 - value: 50000000
   variants:
-  - arm/xilinx_zynq_zedboard.*
+  - arm/xilinx_zynq_zedboard
 description: |
   Zynq UART clock frequency in Hz
 enabled-by: true

spec/build/bsps/arm/xilinx-zynqmp/optcachedata.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable data cache
 enabled-by: true

spec/build/bsps/arm/xilinx-zynqmp/optcacheinst.yml

@@ -9,7 +9,9 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   enable instruction cache
 enabled-by: true

spec/build/bsps/arm/xilinx-zynqmp/optclkfastidle.yml

@@ -9,7 +9,9 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - arm/.*qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
 description: |
   This sets a mode where the time runs as fast as possible when a clock ISR occurs while the IDLE thread is executing.  This can significantly reduce simulation times.
 enabled-by: true

spec/build/bsps/arm/xilinx-zynqmp/optclkuart.yml

@@ -9,7 +9,7 @@ default: 100000000
 default-by-variant:
 - value: 100000000
   variants:
-  - arm/xilinx_zynqmp_ultra96.*
+  - arm/xilinx_zynqmp_ultra96
 description: |
   Zynq UART clock frequency in Hz
 enabled-by: true

spec/build/bsps/dev/irq/optarmgic-icc-bpr0.yml

@@ -9,7 +9,19 @@ default: 0x00000002
 default-by-variant:
 - value: null
   variants:
-  - aarch64/.*
+  - aarch64/a53_ilp32_qemu
+  - aarch64/a53_lp64_qemu
+  - aarch64/a72_ilp32_qemu
+  - aarch64/a72_lp64_qemu
+  - aarch64/raspberrypi4b
+  - aarch64/xilinx_versal_aiedge
+  - aarch64/xilinx_versal_qemu
+  - aarch64/xilinx_versal_vck190
+  - aarch64/xilinx_zynqmp_ilp32_qemu
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
+  - aarch64/xilinx_zynqmp_lp64_cfc400x
+  - aarch64/xilinx_zynqmp_lp64_qemu
+  - aarch64/xilinx_zynqmp_lp64_zu3eg
 description: |
   Defines the initial value of the ICC_BPR0 register of the ARM GIC CPU
   Interface.  The value is optional.  If it is not defined, then the register

spec/build/bsps/dev/irq/optarmgic-icc-igrpen0.yml

@@ -9,7 +9,19 @@ default: 0x00000001
 default-by-variant:
 - value: null
   variants:
-  - aarch64/.*
+  - aarch64/a53_ilp32_qemu
+  - aarch64/a53_lp64_qemu
+  - aarch64/a72_ilp32_qemu
+  - aarch64/a72_lp64_qemu
+  - aarch64/raspberrypi4b
+  - aarch64/xilinx_versal_aiedge
+  - aarch64/xilinx_versal_qemu
+  - aarch64/xilinx_versal_vck190
+  - aarch64/xilinx_zynqmp_ilp32_qemu
+  - aarch64/xilinx_zynqmp_ilp32_zu3eg
+  - aarch64/xilinx_zynqmp_lp64_cfc400x
+  - aarch64/xilinx_zynqmp_lp64_qemu
+  - aarch64/xilinx_zynqmp_lp64_zu3eg
 description: |
   Defines the initial value of the ICC_IGRPEN0 register of the ARM GIC CPU
   Interface.  The value is optional.  If it is not defined, then the register

spec/build/bsps/microblaze/microblaze_fpga/optramlen.yml

@@ -11,7 +11,8 @@ default: 0x10000000
 default-by-variant:
 - value: 0x80000000
   variants:
-  - microblaze/kcu105.*
+  - microblaze/kcu105
+  - microblaze/kcu105_qemu
 description: |
   length of memory area available to the BSP
 enabled-by: true

spec/build/bsps/optcachedata.yml

@@ -10,7 +10,20 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - .*qemu.*
+  - aarch64/a53_ilp32_qemu
+  - aarch64/a53_lp64_qemu
+  - aarch64/a72_ilp32_qemu
+  - aarch64/a72_lp64_qemu
+  - aarch64/xilinx_versal_qemu
+  - aarch64/xilinx_zynqmp_ilp32_qemu
+  - aarch64/xilinx_zynqmp_lp64_qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
+  - microblaze/kcu105_qemu
+  - powerpc/qemuppc
+  - powerpc/qemuprep
+  - powerpc/qemuprep-altivec
 description: |
   Enable data cache
 enabled-by: true

spec/build/bsps/optcacheinst.yml

@@ -10,7 +10,20 @@ default: true
 default-by-variant:
 - value: false
   variants:
-  - .*qemu.*
+  - aarch64/a53_ilp32_qemu
+  - aarch64/a53_lp64_qemu
+  - aarch64/a72_ilp32_qemu
+  - aarch64/a72_lp64_qemu
+  - aarch64/xilinx_versal_qemu
+  - aarch64/xilinx_zynqmp_ilp32_qemu
+  - aarch64/xilinx_zynqmp_lp64_qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
+  - microblaze/kcu105_qemu
+  - powerpc/qemuppc
+  - powerpc/qemuprep
+  - powerpc/qemuprep-altivec
 description: |
   Enable instruction cache
 enabled-by: true

spec/build/bsps/optclkbootcpu.yml

@@ -10,7 +10,20 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - .*qemu.*
+  - aarch64/a53_ilp32_qemu
+  - aarch64/a53_lp64_qemu
+  - aarch64/a72_ilp32_qemu
+  - aarch64/a72_lp64_qemu
+  - aarch64/xilinx_versal_qemu
+  - aarch64/xilinx_zynqmp_ilp32_qemu
+  - aarch64/xilinx_zynqmp_lp64_qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
+  - microblaze/kcu105_qemu
+  - powerpc/qemuppc
+  - powerpc/qemuprep
+  - powerpc/qemuprep-altivec
 description: |
   Do the clock tick processing on the boot processor on behalf of all other
   processors.

spec/build/bsps/optclkfastidle.yml

@@ -9,7 +9,20 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - .*qemu.*
+  - aarch64/a53_ilp32_qemu
+  - aarch64/a53_lp64_qemu
+  - aarch64/a72_ilp32_qemu
+  - aarch64/a72_lp64_qemu
+  - aarch64/xilinx_versal_qemu
+  - aarch64/xilinx_zynqmp_ilp32_qemu
+  - aarch64/xilinx_zynqmp_lp64_qemu
+  - arm/lm3s6965_qemu
+  - arm/realview_pbx_a9_qemu
+  - arm/xilinx_zynq_a9_qemu
+  - microblaze/kcu105_qemu
+  - powerpc/qemuppc
+  - powerpc/qemuprep
+  - powerpc/qemuprep-altivec
 description: |
   Set a mode where the time runs as fast as possible when a clock ISR occurs
   while the IDLE thread is executing; this can significantly reduce simulation

spec/build/bsps/optconsolebaud.yml

@@ -11,8 +11,8 @@ default-by-variant:
   variants:
   - bsps/powerpc/motorola_powerpc
   - m68k/m5484FireEngine
-  - powerpc/hsc_cm01
   - powerpc/beatnik
+  - powerpc/hsc_cm01
   - powerpc/mvme3100
   - powerpc/mvme5500
 - value: 19200

spec/build/bsps/optdtb.yml

@@ -9,7 +9,7 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - riscv/mpfs64.*
+  - riscv/mpfs64imafdc
 description: |
   the path to the header file containing the device tree binary. See the BSP
   documentation for more information.

spec/build/bsps/optdtbheaderpath.yml

@@ -9,7 +9,7 @@ default: false
 default-by-variant:
 - value: bsp/mpfs-dtb.h
   variants:
-  - riscv/mpfs64.*
+  - riscv/mpfs64imafdc
 description: |
   the path to the header file containing the device tree binary. See the BSP
   documentation for more information.

spec/build/bsps/optxilsupportpath.yml

@@ -22,10 +22,10 @@ default-by-variant:
   - aarch64/xilinx_zynqmp_ilp32_zu3eg
 - value: arm/ARMv8/64bit
   variants:
-  - bsps/aarch64/xilinx_versal
   - aarch64/xilinx_zynqmp_lp64_cfc400x
   - aarch64/xilinx_zynqmp_lp64_qemu
   - aarch64/xilinx_zynqmp_lp64_zu3eg
+  - bsps/aarch64/xilinx_versal
 description: Set the Xilinx support path
 enabled-by: true
 format: '{}'

spec/build/bsps/powerpc/gen5200/optuboot.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - powerpc/pm520.*
+  - powerpc/pm520_cr825
+  - powerpc/pm520_ze30
 - value: true
   variants:
   - powerpc/icecube

spec/build/bsps/powerpc/motorola_powerpc/optqemu.yml

@@ -9,7 +9,8 @@ default: false
 default-by-variant:
 - value: true
   variants:
-  - powerpc/qemuprep.*
+  - powerpc/qemuprep
+  - powerpc/qemuprep-altivec
 description: |
   Defined for QEMU BSP -- undefined for others
 enabled-by: true

spec/build/bsps/powerpc/mpc55xxevb/ofmpllptmfd.yml

@@ -12,10 +12,10 @@ default-by-variant:
   - powerpc/gwlcfm
 - value: 111
   variants:
-  - powerpc/mpc5668g.*
+  - powerpc/mpc5668g
 - value: 66
   variants:
-  - powerpc/mpc5674f.*
+  - powerpc/mpc5674fevb
 description: |
   Must be defined to be the PLL multiplication factor for clock generation
 enabled-by: true

spec/build/bsps/powerpc/mpc55xxevb/optchiptype.yml

@@ -12,16 +12,16 @@ default-by-variant:
   - powerpc/gwlcfm
 - value: 5566
   variants:
-  - powerpc/mpc5566.*
+  - powerpc/mpc5566evb
 - value: 5643
   variants:
-  - powerpc/mpc5643l.*
+  - powerpc/mpc5643l_evb
 - value: 5668
   variants:
-  - powerpc/mpc5668g.*
+  - powerpc/mpc5668g
 - value: 5674
   variants:
-  - powerpc/mpc5674f.*
+  - powerpc/mpc5674fevb
 description: |
   specifies the chip type in use (e.g. 5554 for MPC5554)
 enabled-by: true

spec/build/bsps/powerpc/mpc55xxevb/optclkemios.yml

@@ -9,13 +9,13 @@ default: 23
 default-by-variant:
 - value: null
   variants:
-  - powerpc/mpc5643l.*
+  - powerpc/mpc5643l_evb
 - value: null
   variants:
-  - powerpc/mpc5668g.*
+  - powerpc/mpc5668g
 - value: 31
   variants:
-  - powerpc/mpc5674f.*
+  - powerpc/mpc5674fevb
 description: |
   selects the eMIOS channel for the RTEMS system tick (the default is the last channel)
 enabled-by: true

spec/build/bsps/powerpc/mpc55xxevb/optclkpit.yml

@@ -9,10 +9,10 @@ default: null
 default-by-variant:
 - value: 3
   variants:
-  - powerpc/mpc5643l.*
+  - powerpc/mpc5643l_evb
 - value: 8
   variants:
-  - powerpc/mpc5668g.*
+  - powerpc/mpc5668g
 description: |
   selects the PIT channel for the RTEMS system tick (the default is the last channel)
 enabled-by: true

spec/build/bsps/powerpc/mpc55xxevb/optemiosprescal.yml

@@ -12,7 +12,7 @@ default-by-variant:
   - powerpc/gwlcfm
 - value: null
   variants:
-  - powerpc/mpc5643l.*
+  - powerpc/mpc5643l_evb
 description: |
   Must be defined to set the EMIOS prescaler
 enabled-by: true

spec/build/bsps/powerpc/mpc55xxevb/optfmpllprediv.yml

@@ -12,10 +12,10 @@ default-by-variant:
   - powerpc/gwlcfm
 - value: 6
   variants:
-  - powerpc/mpc5668g.*
+  - powerpc/mpc5668g
 - value: 5
   variants:
-  - powerpc/mpc5674f.*
+  - powerpc/mpc5674fevb
 description: |
   Must be defined to be the PLL predivider factor for clock generation
 enabled-by: true