Imagelibrary/rtems
1
0
Fork 1
mirror of https://gitlab.rtems.org/rtems/rtos/rtems.git synced 2025-12-05 15:15:44 +00:00
Code Issues Packages Projects Releases Wiki Activity

arm/xilinx-zynq: Split console driver files

Browse Source 
This avoids to pull in via printk() the Termios support which pulls in
the file system support.  This fixes a spconfig02 test failure.
This commit is contained in:
Sebastian Huber
2020-02-12 08:53:35 +01:00
parent adf7e7538f
commit b900f507cb
6 changed files with 245 additions and 185 deletions
Download Patch File Download Diff File Expand all files Collapse all files

182
bsps/arm/shared/serial/zynq-uart-polled.c Normal file
View File

@@ -0,0 +1,182 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2013, 2017 embedded brains GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <bsp/zynq-uart.h>
#include <bsp/zynq-uart-regs.h>
#include <bspopts.h>
/*
* Make weak and let the user override.
*/
uint32_t zynq_uart_input_clock(void) __attribute__ ((weak));
uint32_t zynq_uart_input_clock(void)
{
return ZYNQ_CLOCK_UART;
}
static int zynq_cal_baud_rate(uint32_t baudrate,
uint32_t* brgr,
uint32_t* bauddiv,
uint32_t modereg)
{
uint32_t brgr_value; /* Calculated value for baud rate generator */
uint32_t calcbaudrate; /* Calculated baud rate */
uint32_t bauderror; /* Diff between calculated and requested baud rate */
uint32_t best_error = 0xFFFFFFFF;
uint32_t percenterror;
uint32_t bdiv;
uint32_t inputclk = zynq_uart_input_clock();
/*
* Make sure the baud rate is not impossilby large.
* Fastest possible baud rate is Input Clock / 2.
*/
if ((baudrate * 2) > inputclk) {
return -1;
}
/*
* Check whether the input clock is divided by 8
*/
if(modereg & ZYNQ_UART_MODE_CLKS) {
inputclk = inputclk / 8;
}
/*
* Determine the Baud divider. It can be 4to 254.
* Loop through all possible combinations
*/
for (bdiv = 4; bdiv < 255; bdiv++) {
/*
* Calculate the value for BRGR register
*/
brgr_value = inputclk / (baudrate * (bdiv + 1));
/*
* Calculate the baud rate from the BRGR value
*/
calcbaudrate = inputclk/ (brgr_value * (bdiv + 1));
/*
* Avoid unsigned integer underflow
*/
if (baudrate > calcbaudrate) {
bauderror = baudrate - calcbaudrate;
}
else {
bauderror = calcbaudrate - baudrate;
}
/*
* Find the calculated baud rate closest to requested baud rate.
*/
if (best_error > bauderror) {
*brgr = brgr_value;
*bauddiv = bdiv;
best_error = bauderror;
}
}
/*
* Make sure the best error is not too large.
*/
percenterror = (best_error * 100) / baudrate;
#define XUARTPS_MAX_BAUD_ERROR_RATE 3 /* max % error allowed */
if (XUARTPS_MAX_BAUD_ERROR_RATE < percenterror) {
return -1;
}
return 0;
}
void zynq_uart_initialize(rtems_termios_device_context *base)
{
zynq_uart_context *ctx = (zynq_uart_context *) base;
volatile zynq_uart *regs = ctx->regs;
uint32_t brgr = 0x3e;
uint32_t bauddiv = 0x6;
zynq_cal_baud_rate(ZYNQ_UART_DEFAULT_BAUD, &brgr, &bauddiv, regs->mode);
regs->control &= ~(ZYNQ_UART_CONTROL_RXEN | ZYNQ_UART_CONTROL_TXEN);
regs->control = ZYNQ_UART_CONTROL_RXDIS
| ZYNQ_UART_CONTROL_TXDIS
| ZYNQ_UART_CONTROL_RXRES
| ZYNQ_UART_CONTROL_TXRES;
regs->mode = ZYNQ_UART_MODE_CHMODE(ZYNQ_UART_MODE_CHMODE_NORMAL)
| ZYNQ_UART_MODE_PAR(ZYNQ_UART_MODE_PAR_NONE)
| ZYNQ_UART_MODE_CHRL(ZYNQ_UART_MODE_CHRL_8);
regs->baud_rate_gen = ZYNQ_UART_BAUD_RATE_GEN_CD(brgr);
regs->baud_rate_div = ZYNQ_UART_BAUD_RATE_DIV_BDIV(bauddiv);
regs->rx_fifo_trg_lvl = ZYNQ_UART_RX_FIFO_TRG_LVL_RTRIG(0);
regs->rx_timeout = ZYNQ_UART_RX_TIMEOUT_RTO(0);
regs->control = ZYNQ_UART_CONTROL_RXEN
| ZYNQ_UART_CONTROL_TXEN
| ZYNQ_UART_CONTROL_RSTTO;
}
int zynq_uart_read_polled(rtems_termios_device_context *base)
{
zynq_uart_context *ctx = (zynq_uart_context *) base;
volatile zynq_uart *regs = ctx->regs;
if ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_REMPTY) != 0) {
return -1;
} else {
return ZYNQ_UART_TX_RX_FIFO_FIFO_GET(regs->tx_rx_fifo);
}
}
void zynq_uart_write_polled(
rtems_termios_device_context *base,
char c
)
{
zynq_uart_context *ctx = (zynq_uart_context *) base;
volatile zynq_uart *regs = ctx->regs;
while ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_TFUL) != 0) {
/* Wait */
}
regs->tx_rx_fifo = ZYNQ_UART_TX_RX_FIFO_FIFO(c);
}
void zynq_uart_reset_tx_flush(zynq_uart_context *ctx)
{
volatile zynq_uart *regs = ctx->regs;
int c = 4;
while (c-- > 0)
zynq_uart_write_polled(&ctx->base, '\r');
while ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_TEMPTY) == 0) {
/* Wait */
}
}

151
bsps/arm/shared/serial/zynq-uart.c
View File

@@ -31,117 +31,6 @@
#include <bspopts.h> #include <bspopts.h>
/*
* Make weak and let the user override.
*/
uint32_t zynq_uart_input_clock(void) __attribute__ ((weak));
uint32_t zynq_uart_input_clock(void)
{
return ZYNQ_CLOCK_UART;
}
static int zynq_cal_baud_rate(uint32_t baudrate,
uint32_t* brgr,
uint32_t* bauddiv,
uint32_t modereg)
{
uint32_t brgr_value; /* Calculated value for baud rate generator */
uint32_t calcbaudrate; /* Calculated baud rate */
uint32_t bauderror; /* Diff between calculated and requested baud rate */
uint32_t best_error = 0xFFFFFFFF;
uint32_t percenterror;
uint32_t bdiv;
uint32_t inputclk = zynq_uart_input_clock();
/*
* Make sure the baud rate is not impossilby large.
* Fastest possible baud rate is Input Clock / 2.
*/
if ((baudrate * 2) > inputclk) {
return -1;
}
/*
* Check whether the input clock is divided by 8
*/
if(modereg & ZYNQ_UART_MODE_CLKS) {
inputclk = inputclk / 8;
}
/*
* Determine the Baud divider. It can be 4to 254.
* Loop through all possible combinations
*/
for (bdiv = 4; bdiv < 255; bdiv++) {
/*
* Calculate the value for BRGR register
*/
brgr_value = inputclk / (baudrate * (bdiv + 1));
/*
* Calculate the baud rate from the BRGR value
*/
calcbaudrate = inputclk/ (brgr_value * (bdiv + 1));
/*
* Avoid unsigned integer underflow
*/
if (baudrate > calcbaudrate) {
bauderror = baudrate - calcbaudrate;
}
else {
bauderror = calcbaudrate - baudrate;
}
/*
* Find the calculated baud rate closest to requested baud rate.
*/
if (best_error > bauderror) {
*brgr = brgr_value;
*bauddiv = bdiv;
best_error = bauderror;
}
}
/*
* Make sure the best error is not too large.
*/
percenterror = (best_error * 100) / baudrate;
#define XUARTPS_MAX_BAUD_ERROR_RATE 3 /* max % error allowed */
if (XUARTPS_MAX_BAUD_ERROR_RATE < percenterror) {
return -1;
}
return 0;
}
void zynq_uart_initialize(rtems_termios_device_context *base)
{
zynq_uart_context *ctx = (zynq_uart_context *) base;
volatile zynq_uart *regs = ctx->regs;
uint32_t brgr = 0x3e;
uint32_t bauddiv = 0x6;
zynq_cal_baud_rate(ZYNQ_UART_DEFAULT_BAUD, &brgr, &bauddiv, regs->mode);
regs->control &= ~(ZYNQ_UART_CONTROL_RXEN | ZYNQ_UART_CONTROL_TXEN);
regs->control = ZYNQ_UART_CONTROL_RXDIS
| ZYNQ_UART_CONTROL_TXDIS
| ZYNQ_UART_CONTROL_RXRES
| ZYNQ_UART_CONTROL_TXRES;
regs->mode = ZYNQ_UART_MODE_CHMODE(ZYNQ_UART_MODE_CHMODE_NORMAL)
| ZYNQ_UART_MODE_PAR(ZYNQ_UART_MODE_PAR_NONE)
| ZYNQ_UART_MODE_CHRL(ZYNQ_UART_MODE_CHRL_8);
regs->baud_rate_gen = ZYNQ_UART_BAUD_RATE_GEN_CD(brgr);
regs->baud_rate_div = ZYNQ_UART_BAUD_RATE_DIV_BDIV(bauddiv);
regs->rx_fifo_trg_lvl = ZYNQ_UART_RX_FIFO_TRG_LVL_RTRIG(0);
regs->rx_timeout = ZYNQ_UART_RX_TIMEOUT_RTO(0);
regs->control = ZYNQ_UART_CONTROL_RXEN
| ZYNQ_UART_CONTROL_TXEN
| ZYNQ_UART_CONTROL_RSTTO;
}
#ifdef ZYNQ_CONSOLE_USE_INTERRUPTS #ifdef ZYNQ_CONSOLE_USE_INTERRUPTS
static void zynq_uart_interrupt(void *arg) static void zynq_uart_interrupt(void *arg)
{ {
@@ -220,33 +109,6 @@ static void zynq_uart_last_close(
} }
#endif #endif
int zynq_uart_read_polled(rtems_termios_device_context *base)
{
zynq_uart_context *ctx = (zynq_uart_context *) base;
volatile zynq_uart *regs = ctx->regs;
if ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_REMPTY) != 0) {
return -1;
} else {
return ZYNQ_UART_TX_RX_FIFO_FIFO_GET(regs->tx_rx_fifo);
}
}
void zynq_uart_write_polled(
rtems_termios_device_context *base,
char c
)
{
zynq_uart_context *ctx = (zynq_uart_context *) base;
volatile zynq_uart *regs = ctx->regs;
while ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_TFUL) != 0) {
/* Wait */
}
regs->tx_rx_fifo = ZYNQ_UART_TX_RX_FIFO_FIFO(c);
}
static void zynq_uart_write_support( static void zynq_uart_write_support(
rtems_termios_device_context *base, rtems_termios_device_context *base,
const char *buf, const char *buf,
@@ -313,16 +175,3 @@ const rtems_termios_device_handler zynq_uart_handler = {
.mode = TERMIOS_POLLED .mode = TERMIOS_POLLED
#endif #endif
}; };
void zynq_uart_reset_tx_flush(zynq_uart_context *ctx)
{
volatile zynq_uart *regs = ctx->regs;
int c = 4;
while (c-- > 0)
zynq_uart_write_polled(&ctx->base, '\r');
while ((regs->channel_sts & ZYNQ_UART_CHANNEL_STS_TEMPTY) == 0) {
/* Wait */
}
}

34
bsps/arm/xilinx-zynq/console/console-config.c
View File

@@ -25,14 +25,9 @@
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
*/ */
#include <rtems/console.h>
#include <rtems/bspIo.h>
#include <bsp/irq.h> #include <bsp/irq.h>
#include <bsp/zynq-uart.h> #include <bsp/zynq-uart.h>
#include <bspopts.h>
zynq_uart_context zynq_uart_instances[2] = { zynq_uart_context zynq_uart_instances[2] = {
{ {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),
@@ -44,32 +39,3 @@ zynq_uart_context zynq_uart_instances[2] = {
.irq = ZYNQ_IRQ_UART_1 .irq = ZYNQ_IRQ_UART_1
} }
}; };
rtems_status_code console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
size_t i;
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(zynq_uart_instances); ++i) {
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
rtems_termios_device_install(
&uart[0],
&zynq_uart_handler,
NULL,
&zynq_uart_instances[i].base
);
if (i == BSP_CONSOLE_MINOR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
return RTEMS_SUCCESSFUL;
}

60
bsps/arm/xilinx-zynq/console/console-init.c Normal file
View File

@@ -0,0 +1,60 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (C) 2013, 2017 embedded brains GmbH
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <rtems/console.h>
#include <bsp.h>
#include <bsp/zynq-uart.h>
rtems_status_code console_initialize(
rtems_device_major_number major,
rtems_device_minor_number minor,
void *arg
)
{
size_t i;
rtems_termios_initialize();
for (i = 0; i < RTEMS_ARRAY_SIZE(zynq_uart_instances); ++i) {
char uart[] = "/dev/ttySX";
uart[sizeof(uart) - 2] = (char) ('0' + i);
rtems_termios_device_install(
&uart[0],
&zynq_uart_handler,
NULL,
&zynq_uart_instances[i].base
);
if (i == BSP_CONSOLE_MINOR) {
link(&uart[0], CONSOLE_DEVICE_NAME);
}
}
return RTEMS_SUCCESSFUL;
}

2
c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am
View File

@@ -60,8 +60,10 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
# Console # Console
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/console/console-config.c librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/console/console-config.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/console/console-init.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/console/debug-console.c librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynq/console/debug-console.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/serial/zynq-uart.c librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/serial/zynq-uart.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/serial/zynq-uart-polled.c
# Clock # Clock
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/clock/clock-a9mpcore.c librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/clock/clock-a9mpcore.c

1
c/src/lib/libbsp/arm/xilinx-zynqmp/Makefile.am
View File

@@ -61,6 +61,7 @@ librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/irq/irq-gic.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/serial/console-termios.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/console/console-config.c librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/xilinx-zynqmp/console/console-config.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/serial/zynq-uart.c librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/serial/zynq-uart.c
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/serial/zynq-uart-polled.c
# Clock # Clock
librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/clock/clock-generic-timer.c librtemsbsp_a_SOURCES += ../../../../../../bsps/arm/shared/clock/clock-generic-timer.c