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Added routines to get and set C3x IOF register. The code is conditionally

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compiled and there is no comparable code for the C4x.
This commit is contained in:
Joel Sherrill
2000-03-01 18:08:53 +00:00
parent 8eacefcc8b
commit b6f9b5f1fe
3 changed files with 213 additions and 39 deletions
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80
c/src/exec/score/cpu/c4x/c4xio.h
View File

@@ -8,10 +8,30 @@
#define __C4XIO_h
/*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
* Address defines
*/
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
/* XXX how portable */
/* C32 Internal Control Registers */
#define C4X_STRB0_REG 0x808064
#define C4X_STRB1_REG 0x808068
#define C4X_IOSTRB_REG 0x808060
/* C32 Internal RAM Locations */
/* XXX how long */
#define C4X_RAM_BLK_0 0x87fe00
#define C4X_RAM_BLK_1 0x87ff00
/*
* Data Structures to Overlay the Peripherals on the CPU
*/
struct c4x_timer {
@@ -22,15 +42,27 @@ struct c4x_timer {
volatile int tperiod;
};
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
/*
* Timer Support Routines
*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
*/
#define c4x_timer_get_control( _timer ) (volatile int)(_timer->tcontrol)
#define c4x_timer_set_control( _timer, _value ) \
do { \
(volatile int)(_timer->tcontrol) = _value; \
} while (0);
#define c4x_timer_start( _timer ) \
_timer->tcontrol=0x02c1
c4x_timer_set_control(_timer, 0x02c1 )
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
@@ -48,5 +80,31 @@ struct c4x_timer {
(volatile int)(_timer->tperiod) = _value; \
} while (0);
/*
* IO Flags
*
* NOTE: iof on c3x, iiof on c4x
*/
#ifdef _TMS320C40
#else
static inline unsigned32 c3x_get_iof( void )
{
register unsigned32 iof_value;
__asm__ volatile ("ldi iof, %0" : "=r" (iof_value));
return iof_value;
}
static inline void c3x_set_iof( unsigned32 value )
{
__asm__ volatile ("ldi %0,iof" : : "g" (value) : "iof", "cc");
}
#endif
#endif
/* end if include file */

80
cpukit/score/cpu/c4x/c4xio.h
View File

@@ -8,10 +8,30 @@
#define __C4XIO_h
/*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
* Address defines
*/
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
/* XXX how portable */
/* C32 Internal Control Registers */
#define C4X_STRB0_REG 0x808064
#define C4X_STRB1_REG 0x808068
#define C4X_IOSTRB_REG 0x808060
/* C32 Internal RAM Locations */
/* XXX how long */
#define C4X_RAM_BLK_0 0x87fe00
#define C4X_RAM_BLK_1 0x87ff00
/*
* Data Structures to Overlay the Peripherals on the CPU
*/
struct c4x_timer {
@@ -22,15 +42,27 @@ struct c4x_timer {
volatile int tperiod;
};
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
/*
* Timer Support Routines
*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
*/
#define c4x_timer_get_control( _timer ) (volatile int)(_timer->tcontrol)
#define c4x_timer_set_control( _timer, _value ) \
do { \
(volatile int)(_timer->tcontrol) = _value; \
} while (0);
#define c4x_timer_start( _timer ) \
_timer->tcontrol=0x02c1
c4x_timer_set_control(_timer, 0x02c1 )
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
@@ -48,5 +80,31 @@ struct c4x_timer {
(volatile int)(_timer->tperiod) = _value; \
} while (0);
/*
* IO Flags
*
* NOTE: iof on c3x, iiof on c4x
*/
#ifdef _TMS320C40
#else
static inline unsigned32 c3x_get_iof( void )
{
register unsigned32 iof_value;
__asm__ volatile ("ldi iof, %0" : "=r" (iof_value));
return iof_value;
}
static inline void c3x_set_iof( unsigned32 value )
{
__asm__ volatile ("ldi %0,iof" : : "g" (value) : "iof", "cc");
}
#endif
#endif
/* end if include file */

80
cpukit/score/cpu/c4x/rtems/tic4x/c4xio.h
View File

@@ -8,10 +8,30 @@
#define __C4XIO_h
/*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
* Address defines
*/
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
/* XXX how portable */
/* C32 Internal Control Registers */
#define C4X_STRB0_REG 0x808064
#define C4X_STRB1_REG 0x808068
#define C4X_IOSTRB_REG 0x808060
/* C32 Internal RAM Locations */
/* XXX how long */
#define C4X_RAM_BLK_0 0x87fe00
#define C4X_RAM_BLK_1 0x87ff00
/*
* Data Structures to Overlay the Peripherals on the CPU
*/
struct c4x_timer {
@@ -22,15 +42,27 @@ struct c4x_timer {
volatile int tperiod;
};
#ifdef _TMS320C40
#define C4X_TIMER_0 ((struct c4x_timer*)0x100020)
#else
#define C4X_TIMER_0 ((struct c4x_timer*)0x808020)
#define C4X_TIMER_1 ((struct c4x_timer*)0x808030)
#endif
/*
* Timer Support Routines
*
* The following section of C4x timer code is based on C40 specific
* timer code from Ran Cabell <rcabell@norfolk.infi.net>. The
* only C3x/C4x difference spotted was the address of the timer.
* The names have been changed to be more RTEMS like.
*/
#define c4x_timer_get_control( _timer ) (volatile int)(_timer->tcontrol)
#define c4x_timer_set_control( _timer, _value ) \
do { \
(volatile int)(_timer->tcontrol) = _value; \
} while (0);
#define c4x_timer_start( _timer ) \
_timer->tcontrol=0x02c1
c4x_timer_set_control(_timer, 0x02c1 )
#define c4x_timer_stop( _timer ) _timer->tcontrol = 0
@@ -48,5 +80,31 @@ struct c4x_timer {
(volatile int)(_timer->tperiod) = _value; \
} while (0);
/*
* IO Flags
*
* NOTE: iof on c3x, iiof on c4x
*/
#ifdef _TMS320C40
#else
static inline unsigned32 c3x_get_iof( void )
{
register unsigned32 iof_value;
__asm__ volatile ("ldi iof, %0" : "=r" (iof_value));
return iof_value;
}
static inline void c3x_set_iof( unsigned32 value )
{
__asm__ volatile ("ldi %0,iof" : : "g" (value) : "iof", "cc");
}
#endif
#endif
/* end if include file */