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2008-08-04 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1294/bsps * rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage of sparc_disable_interrupts.
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@@ -1,3 +1,9 @@
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2008-08-04 Joel Sherrill <joel.sherrill@OARcorp.com>
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PR 1294/bsps
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* rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage
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of sparc_disable_interrupts.
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2008-02-20 Alexandru Bugnar <a-bugnar@criticalsoftware.com>
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PR 1278/cpukit
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@@ -714,9 +714,6 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template;
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#ifndef ASM
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extern unsigned int sparc_disable_interrupts();
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extern void sparc_enable_interrupts();
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/*
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* ISR handler macros
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*/
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@@ -205,51 +205,19 @@ extern "C" {
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/*
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* Manipulate the interrupt level in the psr
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*
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*/
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/*
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#define sparc_disable_interrupts( _level ) \
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do { \
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register unsigned int _newlevel; \
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\
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sparc_get_psr( _level ); \
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(_newlevel) = (_level) | SPARC_PSR_PIL_MASK; \
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sparc_set_psr( _newlevel ); \
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} while ( 0 )
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#define sparc_enable_interrupts( _level ) \
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do { \
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unsigned int _tmp; \
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\
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sparc_get_psr( _tmp ); \
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_tmp &= ~SPARC_PSR_PIL_MASK; \
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_tmp |= (_level) & SPARC_PSR_PIL_MASK; \
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sparc_set_psr( _tmp ); \
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} while ( 0 )
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*/
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uint32_t sparc_disable_interrupts(void);
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void sparc_enable_interrupts(uint32_t);
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#define sparc_flash_interrupts( _level ) \
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do { \
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register uint32_t _ignored = 0; \
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\
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sparc_enable_interrupts( (_level) ); \
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sparc_disable_interrupts( _ignored ); \
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_ignored = sparc_disable_interrupts(); \
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} while ( 0 )
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/*
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#define sparc_set_interrupt_level( _new_level ) \
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do { \
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register uint32_t _new_psr_level = 0; \
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\
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sparc_get_psr( _new_psr_level ); \
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_new_psr_level &= ~SPARC_PSR_PIL_MASK; \
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_new_psr_level |= \
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(((_new_level) << SPARC_PSR_PIL_BIT_POSITION) & SPARC_PSR_PIL_MASK); \
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sparc_set_psr( _new_psr_level ); \
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} while ( 0 )
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*/
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#define sparc_get_interrupt_level( _level ) \
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do { \
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register uint32_t _psr_level = 0; \
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