2008-08-04 Joel Sherrill <joel.sherrill@OARcorp.com>

PR 1294/bsps
	* rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage
	of sparc_disable_interrupts.
This commit is contained in:
Joel Sherrill
2008-08-04 20:35:31 +00:00
parent 2739c46b12
commit 9d976eb5b7
3 changed files with 9 additions and 38 deletions

View File

@@ -1,3 +1,9 @@
2008-08-04 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1294/bsps
* rtems/score/cpu.h, rtems/score/sparc.h: Correct prototype and usage
of sparc_disable_interrupts.
2008-02-20 Alexandru Bugnar <a-bugnar@criticalsoftware.com> 2008-02-20 Alexandru Bugnar <a-bugnar@criticalsoftware.com>
PR 1278/cpukit PR 1278/cpukit

View File

@@ -714,9 +714,6 @@ extern const CPU_Trap_table_entry _CPU_Trap_slot_template;
#ifndef ASM #ifndef ASM
extern unsigned int sparc_disable_interrupts();
extern void sparc_enable_interrupts();
/* /*
* ISR handler macros * ISR handler macros
*/ */

View File

@@ -205,51 +205,19 @@ extern "C" {
/* /*
* Manipulate the interrupt level in the psr * Manipulate the interrupt level in the psr
*
*/ */
/* uint32_t sparc_disable_interrupts(void);
#define sparc_disable_interrupts( _level ) \ void sparc_enable_interrupts(uint32_t);
do { \
register unsigned int _newlevel; \
\
sparc_get_psr( _level ); \
(_newlevel) = (_level) | SPARC_PSR_PIL_MASK; \
sparc_set_psr( _newlevel ); \
} while ( 0 )
#define sparc_enable_interrupts( _level ) \
do { \
unsigned int _tmp; \
\
sparc_get_psr( _tmp ); \
_tmp &= ~SPARC_PSR_PIL_MASK; \
_tmp |= (_level) & SPARC_PSR_PIL_MASK; \
sparc_set_psr( _tmp ); \
} while ( 0 )
*/
#define sparc_flash_interrupts( _level ) \ #define sparc_flash_interrupts( _level ) \
do { \ do { \
register uint32_t _ignored = 0; \ register uint32_t _ignored = 0; \
\ \
sparc_enable_interrupts( (_level) ); \ sparc_enable_interrupts( (_level) ); \
sparc_disable_interrupts( _ignored ); \ _ignored = sparc_disable_interrupts(); \
} while ( 0 ) } while ( 0 )
/*
#define sparc_set_interrupt_level( _new_level ) \
do { \
register uint32_t _new_psr_level = 0; \
\
sparc_get_psr( _new_psr_level ); \
_new_psr_level &= ~SPARC_PSR_PIL_MASK; \
_new_psr_level |= \
(((_new_level) << SPARC_PSR_PIL_BIT_POSITION) & SPARC_PSR_PIL_MASK); \
sparc_set_psr( _new_psr_level ); \
} while ( 0 )
*/
#define sparc_get_interrupt_level( _level ) \ #define sparc_get_interrupt_level( _level ) \
do { \ do { \
register uint32_t _psr_level = 0; \ register uint32_t _psr_level = 0; \