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Patch from Chris Johns to filter out the trace bit on CPU models
which have hardware support for a separate interrupt stack.
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@@ -198,11 +198,14 @@ bframe: clrl SYM (_ISR_Signals_to_thread_executing)
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movec msp,a0 | a0 = master stack pointer
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movew #0,a0@- | push format word
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movel # SYM (_ISR_Dispatch),a0@- | push return addr
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movew a0@(6+SR_OFFSET),a0@- | push thread sr
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| filter out the trace bit to stop single step debugging breaking
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movew a0@(6+SR_OFFSET),d0
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andw #0x7FFF,d0
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movew d0,a0@- | push thread sr
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movec a0,msp | set master stack pointer
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#else
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| filter out the trace bit to stop single step debugging breaking
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| filter out the trace bit to stop single step debugging breaking
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movew a7@(16+SR_OFFSET),d0
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andw #0x7FFF,d0
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movew d0,sr
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