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bsps/aarch64: Swap primary ZynqMP UART

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Both Qemu and actual hardware treat the second UART in memory map as the
primary UART. This adjusts the ZynqMP BSPs to match.
This commit is contained in:
Kinsey Moore
2021-01-14 07:58:15 -06:00
committed by Joel Sherrill
parent 7696533b97
commit 7c30dca2b5
2 changed files with 4 additions and 4 deletions
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4
bsps/aarch64/xilinx-zynqmp/console/console.c
View File

@@ -46,11 +46,11 @@
static zynq_uart_context zynqmp_uart_instances[2] = { static zynq_uart_context zynqmp_uart_instances[2] = {
{ {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ),
.regs = (volatile struct zynq_uart *) 0xff000000, .regs = (volatile struct zynq_uart *) 0xff010000,
.irq = ZYNQMP_IRQ_UART_0 .irq = ZYNQMP_IRQ_UART_0
}, { }, {
.base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ),
.regs = (volatile struct zynq_uart *) 0xff010000, .regs = (volatile struct zynq_uart *) 0xff000000,
.irq = ZYNQMP_IRQ_UART_1 .irq = ZYNQMP_IRQ_UART_1
} }
}; };

4
bsps/aarch64/xilinx-zynqmp/include/bsp/irq.h
View File

@@ -54,8 +54,8 @@ extern "C" {
/* Interrupts vectors */ /* Interrupts vectors */
#define BSP_TIMER_VIRT_PPI 27 #define BSP_TIMER_VIRT_PPI 27
#define BSP_TIMER_PHYS_NS_PPI 30 #define BSP_TIMER_PHYS_NS_PPI 30
#define ZYNQMP_IRQ_UART_0 53 #define ZYNQMP_IRQ_UART_0 54
#define ZYNQMP_IRQ_UART_1 54 #define ZYNQMP_IRQ_UART_1 53
#define ZYNQMP_IRQ_ETHERNET_0 89 #define ZYNQMP_IRQ_ETHERNET_0 89
#define ZYNQMP_IRQ_ETHERNET_1 91 #define ZYNQMP_IRQ_ETHERNET_1 91
#define ZYNQMP_IRQ_ETHERNET_2 93 #define ZYNQMP_IRQ_ETHERNET_2 93