From 67c6b92bc8780ad696a0cd345a3c9fa9f21d4d34 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Thu, 18 Sep 2003 08:51:55 +0000 Subject: [PATCH] 2003-09-18 Ralf Corsepius * shared/cache/cache.c (m68030): fix prototype mismatch of _CPU_cache_flush_entire_data. --- c/src/lib/libcpu/m68k/ChangeLog | 5 +++++ c/src/lib/libcpu/m68k/shared/cache/cache.c | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/c/src/lib/libcpu/m68k/ChangeLog b/c/src/lib/libcpu/m68k/ChangeLog index 6c600c2bb7..9314d168e5 100644 --- a/c/src/lib/libcpu/m68k/ChangeLog +++ b/c/src/lib/libcpu/m68k/ChangeLog @@ -1,3 +1,8 @@ +2003-09-18 Ralf Corsepius + + * shared/cache/cache.c (m68030): fix prototype mismatch of + _CPU_cache_flush_entire_data. + 2003-09-04 Joel Sherrill * shared/misc/m68kidle.c: URL for license changed. diff --git a/c/src/lib/libcpu/m68k/shared/cache/cache.c b/c/src/lib/libcpu/m68k/shared/cache/cache.c index 60f3a63d4c..46b1f66a62 100644 --- a/c/src/lib/libcpu/m68k/shared/cache/cache.c +++ b/c/src/lib/libcpu/m68k/shared/cache/cache.c @@ -53,7 +53,7 @@ /* Only the mc68030 has a data cache; it is writethrough only. */ void _CPU_cache_flush_1_data_line ( const void * d_addr ) {} -void _CPU_cache_flush_entire_data ( const void * d_addr ) {} +void _CPU_cache_flush_entire_data ( void ) {} void _CPU_cache_invalidate_1_data_line ( const void * d_addr )