From 55bbc8924b0b2c8edb08f14db21f2016cb81dad8 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Wed, 10 Feb 2010 14:26:22 +0000 Subject: [PATCH] New. --- .../gcc-core-4.4.3-rtems4.10-20100210.diff | 21129 ++++++++++++++++ .../newlib-1.18.0-rtems4.10-20100210.diff | 667 + 2 files changed, 21796 insertions(+) create mode 100644 contrib/crossrpms/patches/gcc-core-4.4.3-rtems4.10-20100210.diff create mode 100644 contrib/crossrpms/patches/newlib-1.18.0-rtems4.10-20100210.diff diff --git a/contrib/crossrpms/patches/gcc-core-4.4.3-rtems4.10-20100210.diff b/contrib/crossrpms/patches/gcc-core-4.4.3-rtems4.10-20100210.diff new file mode 100644 index 0000000000..f5f7720a8c --- /dev/null +++ b/contrib/crossrpms/patches/gcc-core-4.4.3-rtems4.10-20100210.diff @@ -0,0 +1,21129 @@ +diff -Naur gcc-4.4.3.orig/ChangeLog.rtems gcc-4.4.3/ChangeLog.rtems +--- gcc-4.4.3.orig/ChangeLog.rtems 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/ChangeLog.rtems 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,4 @@ ++ Ralf Corsépius ++ ++ * configure, configure.ac (skipdirs): Add target-libiberty. ++ +diff -Naur gcc-4.4.3.orig/configure gcc-4.4.3/configure +--- gcc-4.4.3.orig/configure 2009-04-25 06:10:29.000000000 +0200 ++++ gcc-4.4.3/configure 2010-01-21 15:55:24.000000000 +0100 +@@ -2267,6 +2267,7 @@ + noconfigdirs="$noconfigdirs target-newlib target-libiberty target-libgloss ${libgcj} target-libmudflap" + ;; + *-*-rtems*) ++ skipdirs="$skipdirs target-libiberty" + noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" + ;; + # The tpf target doesn't support gdb yet. +@@ -6259,7 +6260,7 @@ + # to it. This is right: we don't want to search that directory + # for binaries, but we want the header files in there, so add + # them explicitly. +- FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -isystem $$r/$(HOST_SUBDIR)/gcc/include' ++ FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -isystem $$r/$(HOST_SUBDIR)/gcc/include -isystem $$r/$(HOST_SUBDIR)/gcc/include-fixed' + + # Someone might think of using the pre-installed headers on + # Canadian crosses, in case the installed compiler is not fully +diff -Naur gcc-4.4.3.orig/configure.ac gcc-4.4.3/configure.ac +--- gcc-4.4.3.orig/configure.ac 2009-04-25 06:10:29.000000000 +0200 ++++ gcc-4.4.3/configure.ac 2010-01-21 15:55:24.000000000 +0100 +@@ -502,6 +502,7 @@ + noconfigdirs="$noconfigdirs target-newlib target-libiberty target-libgloss ${libgcj} target-libmudflap" + ;; + *-*-rtems*) ++ skipdirs="$skipdirs target-libiberty" + noconfigdirs="$noconfigdirs target-libgloss ${libgcj}" + ;; + # The tpf target doesn't support gdb yet. +@@ -2560,7 +2561,7 @@ + # to it. This is right: we don't want to search that directory + # for binaries, but we want the header files in there, so add + # them explicitly. +- FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -isystem $$r/$(HOST_SUBDIR)/gcc/include' ++ FLAGS_FOR_TARGET=$FLAGS_FOR_TARGET' -isystem $$r/$(HOST_SUBDIR)/gcc/include -isystem $$r/$(HOST_SUBDIR)/gcc/include-fixed' + + # Someone might think of using the pre-installed headers on + # Canadian crosses, in case the installed compiler is not fully +diff -Naur gcc-4.4.3.orig/gcc/ChangeLog.rtems gcc-4.4.3/gcc/ChangeLog.rtems +--- gcc-4.4.3.orig/gcc/ChangeLog.rtems 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/ChangeLog.rtems 2010-02-10 15:04:12.000000000 +0100 +@@ -0,0 +1,43 @@ ++2010-02-10 Ralf Corsépius ++ ++ * config/rtems.h: Abandon -qrtems_debug. ++ ++2009-12-01 Ralf Corsépius ++ ++ * config/avr/avr.h (LINK_SPEC): Pass -m avrN to ld for -mmcu=avrN. ++ ++2009-11-04 Ralf Corsépius ++ ++ * config/m32c/rtems.h, config/m68k/rtemself.h, ++ config/m68k/rtemself.h, config/sh/rtemself.h, ++ config/sparc/rtemself.h: Undef WCHAR_TYPE_SIZE, WCHAR_TYPE. ++ (Resets WCHAR_TYPE's to defaults. Prevents broken GCC tm_files ++ to interfere and cause wchar_t/wint_t incompatibilities). ++ ++2009-10-15 Ralf Corsépius ++ ++ * config/avr/t-rtems: Don't build _exit. ++ ++ Jon Beniston ++ ++ * config/lm32/arithmetic.c, config/lm32/crti.S, ++ config/lm32/crtn.S, config/lm32/lib1funcs.S, ++ config/lm32/lm32.c, config/lm32/lm32.h, ++ config/lm32/lm32.md, config/lm32/lm32.opt, ++ config/lm32/lm32-protos.h, config/lm32/predicates.md, ++ config/lm32/rtems.h, config/lm32/sfp-machine.h, ++ config/lm32/t-fprules-softfp, config/lm32/t-lm32, ++ config/lm32/uclinux-elf.h: New (lm32 port). ++ * config.gcc: Add lm32* targets. ++ * doc/contrib.texi, doc/invoke.texi: Add lm32. ++ ++ Ralf Corsépius ++ ++ * config/rs6000/rtems.h: Support for custom RTEMS multilibs. ++ Support TARGET_E500. ++ * config/rs6000/t-rtems: Custom RTEMS multilibs. ++ ++ Ralf Corsépius ++ ++ * config/mips/elf.h: Remove NO_IMPLICIT_EXTERN_C. ++ +\ No newline at end of file +diff -Naur gcc-4.4.3.orig/gcc/config/avr/avr.h gcc-4.4.3/gcc/config/avr/avr.h +--- gcc-4.4.3.orig/gcc/config/avr/avr.h 2009-03-28 22:09:50.000000000 +0100 ++++ gcc-4.4.3/gcc/config/avr/avr.h 2010-01-21 15:55:24.000000000 +0100 +@@ -811,12 +811,15 @@ + mmcu=at90can64*|\ + mmcu=at90usb64*:--pmem-wrap-around=64k}}}\ + %{!mmcu*: -m avr2}\ +-%{mmcu=at90s1200|\ ++%{mmcu=avr1|\ ++ mmcu=at90s1200|\ + mmcu=attiny11|\ + mmcu=attiny12|\ + mmcu=attiny15|\ + mmcu=attiny28: -m avr1}\ +-%{mmcu=attiny22|\ ++%{mmcu=avr2|\ ++ mmcu=avr25|\ ++ mmcu=attiny22|\ + mmcu=attiny26|\ + mmcu=at90s2*|\ + mmcu=at90s4*|\ +@@ -831,14 +834,18 @@ + mmcu=attiny261|\ + mmcu=attiny4*|\ + mmcu=attiny8*: -m avr2}\ +-%{mmcu=atmega103|\ ++%{mmcu=avr3|\ ++ mmcu=avr31|\ ++ mmcu=avr35|\ ++ mmcu=atmega103|\ + mmcu=at43*|\ + mmcu=at76*|\ + mmcu=at90usb82|\ + mmcu=at90usb162|\ + mmcu=attiny16*|\ + mmcu=attiny32*: -m avr3}\ +-%{mmcu=atmega8*|\ ++%{mmcu=avr4|\ ++ mmcu=atmega8*|\ + mmcu=atmega4*|\ + mmcu=at90pwm1|\ + mmcu=at90pwm2|\ +@@ -846,7 +853,9 @@ + mmcu=at90pwm3|\ + mmcu=at90pwm3b|\ + mmcu=at90pwm81: -m avr4}\ +-%{mmcu=atmega16*|\ ++%{mmcu=avr5|\ ++ mmcu=avr51|\ ++ mmcu=atmega16*|\ + mmcu=atmega32*|\ + mmcu=atmega406|\ + mmcu=atmega64*|\ +@@ -860,7 +869,8 @@ + mmcu=at94k|\ + mmcu=m3000*|\ + mmcu=m3001*: -m avr5}\ +-%{mmcu=atmega256*:-m avr6}\ ++%{mmcu=avr6|\ ++ mmcu=atmega256*:-m avr6}\ + %{mmcu=atmega324*|\ + mmcu=atmega325*|\ + mmcu=atmega328p|\ +diff -Naur gcc-4.4.3.orig/gcc/config/avr/t-rtems gcc-4.4.3/gcc/config/avr/t-rtems +--- gcc-4.4.3.orig/gcc/config/avr/t-rtems 2004-11-23 04:44:03.000000000 +0100 ++++ gcc-4.4.3/gcc/config/avr/t-rtems 2010-01-21 15:55:24.000000000 +0100 +@@ -1,3 +1,4 @@ + # Multilibs for avr RTEMS targets. + +-# ATM, this is just a stub ++# RTEMS uses _exit from newlib ++LIB1ASMFUNCS := $(filter-out _exit,$(LIB1ASMFUNCS)) +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/arithmetic.c gcc-4.4.3/gcc/config/lm32/arithmetic.c +--- gcc-4.4.3.orig/gcc/config/lm32/arithmetic.c 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/arithmetic.c 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,305 @@ ++/* Fixed-point arithmetic for Lattice Mico32. ++ Contributed by Jon Beniston ++ ++ Copyright (C) 2008 Free Software Foundation, Inc. ++ ++ This file is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published by the ++ Free Software Foundation; either version 2, or (at your option) any ++ later version. ++ ++ In addition to the permissions in the GNU General Public License, the ++ Free Software Foundation gives you unlimited permission to link the ++ compiled version of this file into combinations with other programs, ++ and to distribute those combinations without any restriction coming ++ from the use of this file. (The General Public License restrictions ++ do apply in other respects; for example, they cover modification of ++ the file, and distribution when not linked into a combine ++ executable.) ++ ++ This file is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; see the file COPYING. If not, write to ++ the Free Software Foundation, 51 Franklin Street, Fifth Floor, ++ Boston, MA 02110-1301, USA. */ ++ ++typedef unsigned long UQItype __attribute__ ((mode (QI))); ++typedef long SItype __attribute__ ((mode (SI))); ++typedef unsigned long USItype __attribute__ ((mode (SI))); ++ ++/* Prototypes */ ++ ++USItype __mulsi3 (USItype a, USItype b); ++ ++USItype __udivmodsi4 (USItype num, USItype den, int modwanted); ++SItype __divsi3 (SItype a, SItype b); ++SItype __modsi3 (SItype a, SItype b); ++USItype __udivsi3 (USItype a, USItype b); ++USItype __umodsi3 (USItype a, USItype b); ++ ++SItype __ashlsi3 (SItype a, SItype b); ++SItype __ashrsi3 (SItype a, SItype b); ++USItype __lshrsi3 (USItype a, USItype b); ++ ++/* Multiplication */ ++ ++#ifdef L_mulsi3 ++USItype ++__mulsi3 (USItype a, USItype b) ++{ ++ USItype result; ++ ++ result = 0; ++ ++ if (a==0) ++ return 0; ++ ++ while (b!=0) ++ { ++ if (b & 1) ++ result += a; ++ a <<= 1; ++ b >>= 1; ++ } ++ ++ return result; ++} ++#endif ++ ++/* Division */ ++ ++#ifdef L_udivmodsi4 ++USItype ++__udivmodsi4 (USItype num, USItype den, int modwanted) ++{ ++ USItype bit = 1; ++ USItype res = 0; ++ ++ while (den < num && bit && !(den & (1L<<31))) ++ { ++ den <<=1; ++ bit <<=1; ++ } ++ while (bit) ++ { ++ if (num >= den) ++ { ++ num -= den; ++ res |= bit; ++ } ++ bit >>=1; ++ den >>=1; ++ } ++ if (modwanted) ++ return num; ++ return res; ++} ++#endif ++ ++#ifdef L_divsi3 ++ ++static const UQItype __divsi3_table[] = { ++ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 4, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 5, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 6, 3, 2, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 7, 3, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, ++ 0, 8, 4, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, ++ 0, 9, 4, 3, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, ++ 0, 10, 5, 3, 2, 2, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, ++ 0, 11, 5, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, ++ 0, 12, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, ++ 0, 13, 6, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, 0, ++ 0, 14, 7, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 0, ++ 0, 15, 7, 5, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, ++}; ++ ++SItype ++__divsi3 (SItype a, SItype b) ++{ ++ int neg = 0; ++ SItype res; ++ int cfg; ++ ++ if (b == 0) ++ { ++ /* Raise divide by zero exception */ ++ int eba; ++ __asm__ __volatile__ ("rcsr %0, EBA" : "=r" (eba)); ++ eba += 32 * 5; ++ __asm__ __volatile__ ("mv ea, ra"); ++ __asm__ __volatile__ ("b %0" : : "r" (eba)); ++ } ++ ++ if (((USItype)(a | b)) < 16) ++ { ++ res = __divsi3_table[(a << 4) + b]; ++ } ++ else ++ { ++ ++ if (a < 0) ++ { ++ a = -a; ++ neg = !neg; ++ } ++ ++ if (b < 0) ++ { ++ b = -b; ++ neg = !neg; ++ } ++ ++ __asm__ ("rcsr %0, CFG" : "=r" (cfg)); ++ if (cfg & 2) ++ __asm__ ("divu %0, %1, %2" : "=r" (res) : "r" (a), "r" (b)); ++ else ++ res = __udivmodsi4 (a, b, 0); ++ ++ if (neg) ++ res = -res; ++ } ++ ++ return res; ++} ++#endif ++ ++#ifdef L_modsi3 ++SItype ++__modsi3 (SItype a, SItype b) ++{ ++ int neg = 0; ++ SItype res; ++ int cfg; ++ ++ if (b == 0) ++ { ++ /* Raise divide by zero exception */ ++ int eba, sr; ++ /* Save interrupt enable */ ++ __asm__ __volatile__ ("rcsr %0, IE" : "=r" (sr)); ++ sr = (sr & 1) << 1; ++ __asm__ __volatile__ ("wcsr IE, %0" : : "r" (sr)); ++ /* Branch to exception handler */ ++ __asm__ __volatile__ ("rcsr %0, EBA" : "=r" (eba)); ++ eba += 32 * 5; ++ __asm__ __volatile__ ("mv ea, ra"); ++ __asm__ __volatile__ ("b %0" : : "r" (eba)); ++ } ++ ++ if (a < 0) ++ { ++ a = -a; ++ neg = 1; ++ } ++ ++ if (b < 0) ++ b = -b; ++ ++ __asm__ ("rcsr %0, CFG" : "=r" (cfg)); ++ if (cfg & 2) ++ __asm__ ("modu %0, %1, %2" : "=r" (res) : "r" (a), "r" (b)); ++ else ++ res = __udivmodsi4 (a, b, 1); ++ ++ if (neg) ++ res = -res; ++ ++ return res; ++} ++#endif ++ ++#ifdef L_udivsi3 ++USItype ++__udivsi3 (USItype a, USItype b) ++{ ++ if (b == 0) ++ { ++ /* Raise divide by zero exception */ ++ int eba, sr; ++ /* Save interrupt enable */ ++ __asm__ __volatile__ ("rcsr %0, IE" : "=r" (sr)); ++ sr = (sr & 1) << 1; ++ __asm__ __volatile__ ("wcsr IE, %0" : : "r" (sr)); ++ /* Branch to exception handler */ ++ __asm__ __volatile__ ("rcsr %0, EBA" : "=r" (eba)); ++ eba += 32 * 5; ++ __asm__ __volatile__ ("mv ea, ra"); ++ __asm__ __volatile__ ("b %0" : : "r" (eba)); ++ } ++ ++ return __udivmodsi4 (a, b, 0); ++} ++#endif ++ ++#ifdef L_umodsi3 ++USItype ++__umodsi3 (USItype a, USItype b) ++{ ++ if (b == 0) ++ { ++ /* Raise divide by zero exception */ ++ int eba, sr; ++ /* Save interrupt enable */ ++ __asm__ __volatile__ ("rcsr %0, IE" : "=r" (sr)); ++ sr = (sr & 1) << 1; ++ __asm__ __volatile__ ("wcsr IE, %0" : : "r" (sr)); ++ /* Branch to exception handler */ ++ __asm__ __volatile__ ("rcsr %0, EBA" : "=r" (eba)); ++ eba += 32 * 5; ++ __asm__ __volatile__ ("mv ea, ra"); ++ __asm__ __volatile__ ("b %0" : : "r" (eba)); ++ } ++ ++ return __udivmodsi4 (a, b, 1); ++} ++#endif ++ ++#if 0 ++ ++/* Shifts - Optimized versions implemented in assembly. Use these if code space is preferred to performance. */ ++ ++#ifdef L_ashlsi3 ++SItype ++__ashlsi3 (SItype a, SItype b) ++{ ++ int i; ++ ++ for (i = (b & 0x1f); i > 0; --i) ++ a += a; ++ return a; ++} ++#endif ++ ++#ifdef L_ashrsi3 ++SItype ++__ashrsi3 (SItype a, SItype b) ++{ ++ int i; ++ ++ for (i = (b & 0x1f); i > 0; --i) ++ __asm__ ("sri %0, %0, 1" : "=r" (a) : "0" (a)); ++ return a; ++} ++#endif ++ ++#ifdef L_lshrsi3 ++USItype ++__lshrsi3 (USItype a, USItype b) ++{ ++ int i; ++ ++ for (i = (b & 0x1f); i > 0; --i) ++ __asm__ ("srui %0, %0, 1" : "=r" (a) : "0" (a)); ++ return a; ++} ++#endif ++ ++#endif +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/crti.S gcc-4.4.3/gcc/config/lm32/crti.S +--- gcc-4.4.3.orig/gcc/config/lm32/crti.S 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/crti.S 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,45 @@ ++# crti.S for Lattice Mico32 ++# Contributed by Jon Beniston ++# ++# Copyright (C) 2008 Free Software Foundation, Inc. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 2, or (at your option) any ++# later version. ++# ++# In addition to the permissions in the GNU General Public License, the ++# Free Software Foundation gives you unlimited permission to link the ++# compiled version of this file into combinations with other programs, ++# and to distribute those combinations without any restriction coming ++# from the use of this file. (The General Public License restrictions ++# do apply in other respects; for example, they cover modification of ++# the file, and distribution when not linked into a combine ++# executable.) ++# ++# This file is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; see the file COPYING. If not, write to ++# the Free Software Foundation, 51 Franklin Street, Fifth Floor, ++# Boston, MA 02110-1301, USA. ++# ++ ++ .section .init ++ .global _init ++ .type _init,@function ++ .align 4 ++_init: ++ addi sp, sp, -4 ++ sw (sp+4), ra ++ ++ .section .fini ++ .global _fini ++ .type _fini,@function ++ .align 4 ++_fini: ++ addi sp, sp, -4 ++ sw (sp+4), ra +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/crtn.S gcc-4.4.3/gcc/config/lm32/crtn.S +--- gcc-4.4.3.orig/gcc/config/lm32/crtn.S 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/crtn.S 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,42 @@ ++# crtn.S for Lattice Mico32 ++# Contributed by Jon Beniston ++# ++# Copyright (C) 2008 Free Software Foundation, Inc. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 2, or (at your option) any ++# later version. ++# ++# In addition to the permissions in the GNU General Public License, the ++# Free Software Foundation gives you unlimited permission to link the ++# compiled version of this file into combinations with other programs, ++# and to distribute those combinations without any restriction coming ++# from the use of this file. (The General Public License restrictions ++# do apply in other respects; for example, they cover modification of ++# the file, and distribution when not linked into a combine ++# executable.) ++# ++# This file is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; see the file COPYING. If not, write to ++# the Free Software Foundation, 51 Franklin Street, Fifth Floor, ++# Boston, MA 02110-1301, USA. ++# ++ ++ .section .init ++ ++ lw ra, (sp+4) ++ addi sp, sp, 4 ++ ret ++ ++ .section .fini ++ ++ lw ra, (sp+4) ++ addi sp, sp, 4 ++ ret ++ +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/lib1funcs.S gcc-4.4.3/gcc/config/lm32/lib1funcs.S +--- gcc-4.4.3.orig/gcc/config/lm32/lib1funcs.S 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/lib1funcs.S 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,429 @@ ++# lib1funcs.S for Lattice Mico32 ++# Contributed by Jon Beniston ++# ++# Copyright (C) 2008 Free Software Foundation, Inc. ++# ++# This file is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 2, or (at your option) any ++# later version. ++# ++# In addition to the permissions in the GNU General Public License, the ++# Free Software Foundation gives you unlimited permission to link the ++# compiled version of this file into combinations with other programs, ++# and to distribute those combinations without any restriction coming ++# from the use of this file. (The General Public License restrictions ++# do apply in other respects; for example, they cover modification of ++# the file, and distribution when not linked into a combine ++# executable.) ++# ++# This file is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with this program; see the file COPYING. If not, write to ++# the Free Software Foundation, 51 Franklin Street, Fifth Floor, ++# Boston, MA 02110-1301, USA. ++# ++ ++/* Arithmetic left shift */ ++ ++ .text ++ ++ .global __ashlsi3 ++ .type __ashlsi3,@function ++ .align 4 ++ ++__ashlsi3: ++ /* Only use 5 LSBs, as that's all the h/w shifter uses */ ++ andi r2, r2, 0x1f ++ /* Get address of offset into unrolled shift loop to jump to */ ++#ifdef __PIC__ ++ orhi r3, r0, gotoffhi16(__ashlsi3_table) ++ addi r3, r3, gotofflo16(__ashlsi3_table) ++ add r3, r3, gp ++#else ++ mvhi r3, hi(__ashlsi3_table) ++ ori r3, r3, lo(__ashlsi3_table) ++#endif ++ add r2, r2, r2 ++ add r2, r2, r2 ++ add r3, r3, r2 ++ lw r3, (r3+0) ++ b r3 ++ ++__ashlsi3_31: ++ add r1, r1, r1 ++__ashlsi3_30: ++ add r1, r1, r1 ++__ashlsi3_29: ++ add r1, r1, r1 ++__ashlsi3_28: ++ add r1, r1, r1 ++__ashlsi3_27: ++ add r1, r1, r1 ++__ashlsi3_26: ++ add r1, r1, r1 ++__ashlsi3_25: ++ add r1, r1, r1 ++__ashlsi3_24: ++ add r1, r1, r1 ++__ashlsi3_23: ++ add r1, r1, r1 ++__ashlsi3_22: ++ add r1, r1, r1 ++__ashlsi3_21: ++ add r1, r1, r1 ++__ashlsi3_20: ++ add r1, r1, r1 ++__ashlsi3_19: ++ add r1, r1, r1 ++__ashlsi3_18: ++ add r1, r1, r1 ++__ashlsi3_17: ++ add r1, r1, r1 ++__ashlsi3_16: ++ add r1, r1, r1 ++__ashlsi3_15: ++ add r1, r1, r1 ++__ashlsi3_14: ++ add r1, r1, r1 ++__ashlsi3_13: ++ add r1, r1, r1 ++__ashlsi3_12: ++ add r1, r1, r1 ++__ashlsi3_11: ++ add r1, r1, r1 ++__ashlsi3_10: ++ add r1, r1, r1 ++__ashlsi3_9: ++ add r1, r1, r1 ++__ashlsi3_8: ++ add r1, r1, r1 ++__ashlsi3_7: ++ add r1, r1, r1 ++__ashlsi3_6: ++ add r1, r1, r1 ++__ashlsi3_5: ++ add r1, r1, r1 ++__ashlsi3_4: ++ add r1, r1, r1 ++__ashlsi3_3: ++ add r1, r1, r1 ++__ashlsi3_2: ++ add r1, r1, r1 ++__ashlsi3_1: ++ add r1, r1, r1 ++__ashlsi3_0: ++ ret ++ ++#ifdef __PIC__ ++ .section .data ++#else ++ .section .rodata ++#endif ++ ++ .align 4 ++ ++__ashlsi3_table: ++ .word __ashlsi3_0 ++ .word __ashlsi3_1 ++ .word __ashlsi3_2 ++ .word __ashlsi3_3 ++ .word __ashlsi3_4 ++ .word __ashlsi3_5 ++ .word __ashlsi3_6 ++ .word __ashlsi3_7 ++ .word __ashlsi3_8 ++ .word __ashlsi3_9 ++ .word __ashlsi3_10 ++ .word __ashlsi3_11 ++ .word __ashlsi3_12 ++ .word __ashlsi3_13 ++ .word __ashlsi3_14 ++ .word __ashlsi3_15 ++ .word __ashlsi3_16 ++ .word __ashlsi3_17 ++ .word __ashlsi3_18 ++ .word __ashlsi3_19 ++ .word __ashlsi3_20 ++ .word __ashlsi3_21 ++ .word __ashlsi3_22 ++ .word __ashlsi3_23 ++ .word __ashlsi3_24 ++ .word __ashlsi3_25 ++ .word __ashlsi3_26 ++ .word __ashlsi3_27 ++ .word __ashlsi3_28 ++ .word __ashlsi3_29 ++ .word __ashlsi3_30 ++ .word __ashlsi3_31 ++ ++/* Logical right shift */ ++ ++ .text ++ ++ .global __lshrsi3 ++ .type __lshrsi3,@function ++ .align 4 ++ ++__lshrsi3: ++ /* Only use 5 LSBs, as that's all the h/w shifter uses */ ++ andi r2, r2, 0x1f ++ /* Get address of offset into unrolled shift loop to jump to */ ++#ifdef __PIC__ ++ orhi r3, r0, gotoffhi16(__lshrsi3_table) ++ addi r3, r3, gotofflo16(__lshrsi3_table) ++ add r3, r3, gp ++#else ++ mvhi r3, hi(__lshrsi3_table) ++ ori r3, r3, lo(__lshrsi3_table) ++#endif ++ add r2, r2, r2 ++ add r2, r2, r2 ++ add r3, r3, r2 ++ lw r3, (r3+0) ++ b r3 ++ ++__lshrsi3_31: ++ srui r1, r1, 1 ++__lshrsi3_30: ++ srui r1, r1, 1 ++__lshrsi3_29: ++ srui r1, r1, 1 ++__lshrsi3_28: ++ srui r1, r1, 1 ++__lshrsi3_27: ++ srui r1, r1, 1 ++__lshrsi3_26: ++ srui r1, r1, 1 ++__lshrsi3_25: ++ srui r1, r1, 1 ++__lshrsi3_24: ++ srui r1, r1, 1 ++__lshrsi3_23: ++ srui r1, r1, 1 ++__lshrsi3_22: ++ srui r1, r1, 1 ++__lshrsi3_21: ++ srui r1, r1, 1 ++__lshrsi3_20: ++ srui r1, r1, 1 ++__lshrsi3_19: ++ srui r1, r1, 1 ++__lshrsi3_18: ++ srui r1, r1, 1 ++__lshrsi3_17: ++ srui r1, r1, 1 ++__lshrsi3_16: ++ srui r1, r1, 1 ++__lshrsi3_15: ++ srui r1, r1, 1 ++__lshrsi3_14: ++ srui r1, r1, 1 ++__lshrsi3_13: ++ srui r1, r1, 1 ++__lshrsi3_12: ++ srui r1, r1, 1 ++__lshrsi3_11: ++ srui r1, r1, 1 ++__lshrsi3_10: ++ srui r1, r1, 1 ++__lshrsi3_9: ++ srui r1, r1, 1 ++__lshrsi3_8: ++ srui r1, r1, 1 ++__lshrsi3_7: ++ srui r1, r1, 1 ++__lshrsi3_6: ++ srui r1, r1, 1 ++__lshrsi3_5: ++ srui r1, r1, 1 ++__lshrsi3_4: ++ srui r1, r1, 1 ++__lshrsi3_3: ++ srui r1, r1, 1 ++__lshrsi3_2: ++ srui r1, r1, 1 ++__lshrsi3_1: ++ srui r1, r1, 1 ++__lshrsi3_0: ++ ret ++ ++#ifdef __PIC__ ++ .section .data ++#else ++ .section .rodata ++#endif ++ ++ .align 4 ++ ++__lshrsi3_table: ++ .word __lshrsi3_0 ++ .word __lshrsi3_1 ++ .word __lshrsi3_2 ++ .word __lshrsi3_3 ++ .word __lshrsi3_4 ++ .word __lshrsi3_5 ++ .word __lshrsi3_6 ++ .word __lshrsi3_7 ++ .word __lshrsi3_8 ++ .word __lshrsi3_9 ++ .word __lshrsi3_10 ++ .word __lshrsi3_11 ++ .word __lshrsi3_12 ++ .word __lshrsi3_13 ++ .word __lshrsi3_14 ++ .word __lshrsi3_15 ++ .word __lshrsi3_16 ++ .word __lshrsi3_17 ++ .word __lshrsi3_18 ++ .word __lshrsi3_19 ++ .word __lshrsi3_20 ++ .word __lshrsi3_21 ++ .word __lshrsi3_22 ++ .word __lshrsi3_23 ++ .word __lshrsi3_24 ++ .word __lshrsi3_25 ++ .word __lshrsi3_26 ++ .word __lshrsi3_27 ++ .word __lshrsi3_28 ++ .word __lshrsi3_29 ++ .word __lshrsi3_30 ++ .word __lshrsi3_31 ++ ++/* Arithmetic right shift */ ++ ++ .text ++ ++ .global __ashrsi3 ++ .type __ashrsi3,@function ++ .align 4 ++ ++__ashrsi3: ++ /* Only use 5 LSBs, as that's all the h/w shifter uses */ ++ andi r2, r2, 0x1f ++ /* Get address of offset into unrolled shift loop to jump to */ ++#ifdef __PIC__ ++ orhi r3, r0, gotoffhi16(__ashrsi3_table) ++ addi r3, r3, gotofflo16(__ashrsi3_table) ++ add r3, r3, gp ++#else ++ mvhi r3, hi(__ashrsi3_table) ++ ori r3, r3, lo(__ashrsi3_table) ++#endif ++ add r2, r2, r2 ++ add r2, r2, r2 ++ add r3, r3, r2 ++ lw r3, (r3+0) ++ b r3 ++ ++__ashrsi3_31: ++ sri r1, r1, 1 ++__ashrsi3_30: ++ sri r1, r1, 1 ++__ashrsi3_29: ++ sri r1, r1, 1 ++__ashrsi3_28: ++ sri r1, r1, 1 ++__ashrsi3_27: ++ sri r1, r1, 1 ++__ashrsi3_26: ++ sri r1, r1, 1 ++__ashrsi3_25: ++ sri r1, r1, 1 ++__ashrsi3_24: ++ sri r1, r1, 1 ++__ashrsi3_23: ++ sri r1, r1, 1 ++__ashrsi3_22: ++ sri r1, r1, 1 ++__ashrsi3_21: ++ sri r1, r1, 1 ++__ashrsi3_20: ++ sri r1, r1, 1 ++__ashrsi3_19: ++ sri r1, r1, 1 ++__ashrsi3_18: ++ sri r1, r1, 1 ++__ashrsi3_17: ++ sri r1, r1, 1 ++__ashrsi3_16: ++ sri r1, r1, 1 ++__ashrsi3_15: ++ sri r1, r1, 1 ++__ashrsi3_14: ++ sri r1, r1, 1 ++__ashrsi3_13: ++ sri r1, r1, 1 ++__ashrsi3_12: ++ sri r1, r1, 1 ++__ashrsi3_11: ++ sri r1, r1, 1 ++__ashrsi3_10: ++ sri r1, r1, 1 ++__ashrsi3_9: ++ sri r1, r1, 1 ++__ashrsi3_8: ++ sri r1, r1, 1 ++__ashrsi3_7: ++ sri r1, r1, 1 ++__ashrsi3_6: ++ sri r1, r1, 1 ++__ashrsi3_5: ++ sri r1, r1, 1 ++__ashrsi3_4: ++ sri r1, r1, 1 ++__ashrsi3_3: ++ sri r1, r1, 1 ++__ashrsi3_2: ++ sri r1, r1, 1 ++__ashrsi3_1: ++ sri r1, r1, 1 ++__ashrsi3_0: ++ ret ++ ++#ifdef __PIC__ ++ .section .data ++#else ++ .section .rodata ++#endif ++ ++ .align 4 ++ ++__ashrsi3_table: ++ .word __ashrsi3_0 ++ .word __ashrsi3_1 ++ .word __ashrsi3_2 ++ .word __ashrsi3_3 ++ .word __ashrsi3_4 ++ .word __ashrsi3_5 ++ .word __ashrsi3_6 ++ .word __ashrsi3_7 ++ .word __ashrsi3_8 ++ .word __ashrsi3_9 ++ .word __ashrsi3_10 ++ .word __ashrsi3_11 ++ .word __ashrsi3_12 ++ .word __ashrsi3_13 ++ .word __ashrsi3_14 ++ .word __ashrsi3_15 ++ .word __ashrsi3_16 ++ .word __ashrsi3_17 ++ .word __ashrsi3_18 ++ .word __ashrsi3_19 ++ .word __ashrsi3_20 ++ .word __ashrsi3_21 ++ .word __ashrsi3_22 ++ .word __ashrsi3_23 ++ .word __ashrsi3_24 ++ .word __ashrsi3_25 ++ .word __ashrsi3_26 ++ .word __ashrsi3_27 ++ .word __ashrsi3_28 ++ .word __ashrsi3_29 ++ .word __ashrsi3_30 ++ .word __ashrsi3_31 ++ +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/lm32.c gcc-4.4.3/gcc/config/lm32/lm32.c +--- gcc-4.4.3.orig/gcc/config/lm32/lm32.c 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/lm32.c 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,869 @@ ++/* Subroutines used for code generation on the Lattice Mico32 architecture. ++ Contributed by Jon Beniston ++ ++ Copyright (C) 2008 Free Software Foundation, Inc. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++#include "config.h" ++#include "system.h" ++#include "coretypes.h" ++#include "tm.h" ++#include "rtl.h" ++#include "regs.h" ++#include "hard-reg-set.h" ++#include "basic-block.h" ++#include "real.h" ++#include "insn-config.h" ++#include "conditions.h" ++#include "insn-flags.h" ++#include "insn-attr.h" ++#include "insn-codes.h" ++#include "recog.h" ++#include "output.h" ++#include "tree.h" ++#include "expr.h" ++#include "flags.h" ++#include "reload.h" ++#include "tm_p.h" ++#include "function.h" ++#include "toplev.h" ++#include "optabs.h" ++#include "libfuncs.h" ++#include "ggc.h" ++#include "target.h" ++#include "target-def.h" ++#include "langhooks.h" ++#include "tm-constrs.h" ++#include "df.h" ++ ++struct lm32_frame_info ++{ ++ HOST_WIDE_INT total_size; /* number of bytes that the entire frame takes up. */ ++ HOST_WIDE_INT callee_size; /* number of bytes to save callee save registers */ ++ HOST_WIDE_INT pretend_size; /* number of bytes we push and pretend caller did. */ ++ HOST_WIDE_INT args_size; /* number of bytes that outgoing arguments take up. */ ++ HOST_WIDE_INT locals_size; /* number of bytes that local variables take up. */ ++ unsigned int reg_save_mask; /* mask of saved registers. */ ++}; ++ ++/* Prototypes for static functions */ ++static rtx emit_add (rtx dest, rtx src0, rtx src1); ++static void expand_save_restore (struct lm32_frame_info *info, int op); ++static void abort_with_insn (rtx insn, const char *reason); ++static void stack_adjust (HOST_WIDE_INT amount); ++static bool lm32_in_small_data_p (const_tree); ++static void lm32_setup_incoming_varargs (CUMULATIVE_ARGS *cum, enum machine_mode mode, ++ tree type, int *pretend_size, int no_rtl); ++ ++/* Detemines if given constant can be used as a displacement */ ++#define OFFSET_INT(X) (((X) > -32768) && ((X) < 32768)) ++ ++#undef TARGET_ADDRESS_COST ++#define TARGET_ADDRESS_COST hook_int_rtx_bool_0 ++#undef TARGET_IN_SMALL_DATA_P ++#define TARGET_IN_SMALL_DATA_P lm32_in_small_data_p ++#undef TARGET_PROMOTE_FUNCTION_ARGS ++#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_const_tree_true ++#undef TARGET_PROMOTE_FUNCTION_RETURN ++#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_const_tree_true ++#undef TARGET_SETUP_INCOMING_VARARGS ++#define TARGET_SETUP_INCOMING_VARARGS lm32_setup_incoming_varargs ++#undef TARGET_PROMOTE_PROTOTYPES ++#define TARGET_PROMOTE_PROTOTYPES hook_bool_const_tree_true ++ ++struct gcc_target targetm = TARGET_INITIALIZER; ++ ++/* Current frame information calculated by lm32_compute_frame_size. */ ++static struct lm32_frame_info current_frame_info; ++ ++rtx lm32_compare_op0; ++rtx lm32_compare_op1; ++ ++/* Return non-zero if the specified return type should be returned in memory */ ++int ++lm32_return_in_memory (tree type) ++{ ++ HOST_WIDE_INT size; ++ ++ if (!AGGREGATE_TYPE_P (type)) ++ { ++ /* All simple types are returned in registers. */ ++ return 0; ++ } ++ ++ size = int_size_in_bytes (type); ++ if (size >=0 && size <= UNITS_PER_WORD) ++ { ++ /* If it can fit in one register */ ++ return 0; ++ } ++ ++ return 1; ++} ++ ++/* Determine if given constant can be used as a register displacement */ ++int ++const_ok_for_base_offset (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) ++{ ++ int val; ++ ++ val = INTVAL (op); ++ return OFFSET_INT (val); ++} ++ ++/* Generate an emit a word sized add instruction */ ++static rtx ++emit_add (rtx dest, rtx src0, rtx src1) ++{ ++ rtx insn; ++ insn = emit_insn (gen_addsi3 (dest, src0, src1)); ++ return insn; ++} ++ ++/* Generate the code to compare (and possibly branch) two integer values ++ TEST_CODE is the comparison code we are trying to emulate ++ (or implement directly) ++ RESULT is where to store the result of the comparison, ++ or null to emit a branch ++ CMP0 CMP1 are the two comparison operands ++ DESTINATION is the destination of the branch, or null to only compare ++ */ ++ ++void ++gen_int_relational (enum rtx_code code, /* relational test (EQ, etc) */ ++ rtx result, /* result to store comp. or 0 if branch */ ++ rtx cmp0, /* first operand to compare */ ++ rtx cmp1, /* second operand to compare */ ++ rtx destination) /* destination of the branch, or 0 if compare */ ++{ ++ enum machine_mode mode; ++ int branch_p; ++ ++ mode = GET_MODE (cmp0); ++ if (mode == VOIDmode) ++ mode = GET_MODE (cmp1); ++ ++ /* Is this a branch or compare */ ++ branch_p = (destination != 0); ++ ++ /* Instruction set doesn't support LE or LT, so swap operands and use GE, GT */ ++ switch (code) ++ { ++ case LE: ++ case LT: ++ case LEU: ++ case LTU: ++ code = swap_condition (code); ++ rtx temp = cmp0; ++ cmp0 = cmp1; ++ cmp1 = temp; ++ break; ++ default: ++ break; ++ } ++ ++ if (branch_p) ++ { ++ rtx insn; ++ ++ /* Operands must be in registers */ ++ if (!register_operand (cmp0, mode)) ++ cmp0 = force_reg (mode, cmp0); ++ if (!register_operand (cmp1, mode)) ++ cmp1 = force_reg (mode, cmp1); ++ ++ /* Generate conditional branch instruction */ ++ rtx cond = gen_rtx_fmt_ee (code, mode, cmp0, cmp1); ++ rtx label = gen_rtx_LABEL_REF (VOIDmode, destination); ++ insn = gen_rtx_SET (VOIDmode, pc_rtx, ++ gen_rtx_IF_THEN_ELSE (VOIDmode, ++ cond, label, pc_rtx)); ++ emit_jump_insn (insn); ++ } ++ else ++ { ++ /* We can't have const_ints in cmp0, other than 0 */ ++ if ((GET_CODE (cmp0) == CONST_INT) && (INTVAL (cmp0) != 0)) ++ cmp0 = force_reg (mode, cmp0); ++ ++ /* If the comparison is against an int not in legal range ++ move it into a register */ ++ if (GET_CODE (cmp1) == CONST_INT) ++ { ++ HOST_WIDE_INT value = INTVAL (cmp1); ++ switch (code) ++ { ++ case EQ: case NE: case LE: case LT: case GE: case GT: ++ if (!MEDIUM_INT(value)) ++ cmp1 = force_reg (mode, cmp1); ++ break; ++ case LEU: case LTU: case GEU: case GTU: ++ if (!MEDIUM_UINT(value)) ++ cmp1 = force_reg (mode, cmp1); ++ break; ++ default: ++ abort (); ++ } ++ } ++ ++ /* Generate compare instruction */ ++ emit_move_insn (result, gen_rtx_fmt_ee (code, mode, cmp0, cmp1)); ++ } ++} ++ ++/* Generate and emit RTL to save or restore callee save registers */ ++static void ++expand_save_restore (struct lm32_frame_info *info, int op) ++{ ++ unsigned int reg_save_mask = info->reg_save_mask; ++ int regno; ++ HOST_WIDE_INT offset; ++ rtx insn; ++ ++ /* Callee saves are below locals and above outgoing arguments */ ++ offset = info->args_size + info->callee_size; ++ for (regno = 0; regno <= 31; regno++) ++ { ++ if ((reg_save_mask & (1 << regno)) != 0) ++ { ++ if (op == 0) ++ { ++ insn = emit_move_insn (gen_rtx_MEM (word_mode, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (offset))), ++ gen_rtx_REG (word_mode, regno)); ++ } ++ else ++ { ++ insn = emit_move_insn (gen_rtx_REG (word_mode, regno), ++ gen_rtx_MEM (word_mode, ++ gen_rtx_PLUS (Pmode, ++ stack_pointer_rtx, ++ GEN_INT (offset)))); ++ } ++ ++ /* only prologue instructions which set the sp fp or save a ++ register should be marked as frame related */ ++ if (op==0) ++ RTX_FRAME_RELATED_P (insn) = 1; ++ offset -= UNITS_PER_WORD; ++ } ++ } ++} ++ ++static void ++stack_adjust (HOST_WIDE_INT amount) ++{ ++ rtx insn; ++ ++ if (!MEDIUM_INT (amount)) ++ { ++ /* r10 is caller saved so it can be used as a temp reg */ ++ rtx r10; ++ r10 = gen_rtx_REG (word_mode, 10); ++ insn = emit_move_insn (r10, GEN_INT (amount)); ++ if (amount < 0) ++ RTX_FRAME_RELATED_P (insn) = 1; ++ insn = emit_add (stack_pointer_rtx, stack_pointer_rtx, r10); ++ if (amount < 0) ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ else ++ { ++ insn = emit_add (stack_pointer_rtx, ++ stack_pointer_rtx, ++ GEN_INT (amount)); ++ if (amount < 0) ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++} ++ ++ ++/* Create and emit instructions for a functions prologue */ ++void ++lm32_expand_prologue (void) ++{ ++ rtx insn; ++ ++ lm32_compute_frame_size (get_frame_size ()); ++ ++ if (current_frame_info.total_size > 0) ++ { ++ /* Add space on stack new frame */ ++ stack_adjust (-current_frame_info.total_size); ++ ++ /* Save callee save registers */ ++ if (current_frame_info.reg_save_mask != 0) ++ expand_save_restore (¤t_frame_info, 0); ++ ++ /* Setup frame pointer if it's needed */ ++ if (frame_pointer_needed == 1) ++ { ++ /* Load offset - Don't use total_size, as that includes pretend_size, which isn't part of this frame? */ ++ insn = emit_move_insn (frame_pointer_rtx, GEN_INT ( current_frame_info.args_size ++ + current_frame_info.callee_size ++ + current_frame_info.locals_size)); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ ++ /* Add in sp */ ++ insn = emit_add (frame_pointer_rtx, ++ frame_pointer_rtx, ++ stack_pointer_rtx); ++ RTX_FRAME_RELATED_P (insn) = 1; ++ } ++ ++ /* Prevent prologue from being scheduled into function body */ ++ emit_insn (gen_blockage ()); ++ } ++} ++ ++/* Create an emit instructions for a functions epilogue */ ++void ++lm32_expand_epilogue (void) ++{ ++ rtx ra_rtx = gen_rtx_REG (Pmode, RA_REGNUM); ++ ++ lm32_compute_frame_size (get_frame_size ()); ++ ++ if (current_frame_info.total_size > 0) ++ { ++ /* Prevent stack code from being reordered */ ++ emit_insn (gen_blockage ()); ++ ++ /* Restore callee save registers */ ++ if (current_frame_info.reg_save_mask != 0) ++ expand_save_restore (¤t_frame_info, 1); ++ ++ /* Deallocate stack */ ++ stack_adjust (current_frame_info.total_size); ++ ++ /* Return to calling function */ ++ emit_jump_insn (gen_return_internalsi (ra_rtx)); ++ } ++ else ++ { ++ /* Return to calling function */ ++ emit_jump_insn (gen_return_internalsi (ra_rtx)); ++ } ++} ++ ++/* Return the bytes needed to compute the frame pointer from the current ++ stack pointer. */ ++HOST_WIDE_INT ++lm32_compute_frame_size (int size) ++{ ++ int regno; ++ HOST_WIDE_INT total_size, locals_size, args_size, pretend_size, callee_size; ++ unsigned int reg_save_mask; ++ ++ locals_size = size; ++ args_size = crtl->outgoing_args_size; ++ pretend_size = crtl->args.pretend_args_size; ++ callee_size = 0; ++ reg_save_mask = 0; ++ ++ /* Build mask that actually determines which regsiters we save ++ and calculate size required to store them in the stack. */ ++ for (regno = 1; regno < SP_REGNUM; regno++) ++ { ++ if (df_regs_ever_live_p(regno) && !call_used_regs[regno]) ++ { ++ reg_save_mask |= 1 << regno; ++ callee_size += UNITS_PER_WORD; ++ } ++ } ++ if (df_regs_ever_live_p(RA_REGNUM) || !current_function_is_leaf || !optimize) ++ { ++ reg_save_mask |= 1 << RA_REGNUM; ++ callee_size += UNITS_PER_WORD; ++ } ++ if (!(reg_save_mask & (1 << FP_REGNUM)) && frame_pointer_needed) ++ { ++ reg_save_mask |= 1 << FP_REGNUM; ++ callee_size += UNITS_PER_WORD; ++ } ++ ++ /* Compute total frame size */ ++ total_size = pretend_size + args_size + locals_size + callee_size; ++ ++ /* Align frame to appropriate boundary */ ++ total_size = (total_size+3) & ~3; ++ ++ /* Save computed information. */ ++ current_frame_info.total_size = total_size; ++ current_frame_info.callee_size = callee_size; ++ current_frame_info.pretend_size = pretend_size; ++ current_frame_info.locals_size = locals_size; ++ current_frame_info.args_size = args_size; ++ current_frame_info.reg_save_mask = reg_save_mask; ++ ++ return total_size; ++} ++ ++void ++lm32_print_operand (FILE *file, rtx op, int letter) ++{ ++ register enum rtx_code code; ++ ++ if (! op) ++ { ++ error ("PRINT_OPERAND null pointer"); ++ abort (); ++ } ++ ++ code = GET_CODE (op); ++ ++ if (code == SIGN_EXTEND) ++ op = XEXP (op, 0), code = GET_CODE (op); ++ else if (code == REG || code == SUBREG) ++ { ++ int regnum; ++ ++ if (code == REG) ++ regnum = REGNO (op); ++ else ++ regnum = true_regnum (op); ++ ++ if ( (letter == 'H' && !WORDS_BIG_ENDIAN) ++ || (letter == 'L' && WORDS_BIG_ENDIAN)) ++ { ++ abort(); ++ regnum++; ++ } ++ ++ fprintf (file, "%s", reg_names[regnum]); ++ } ++ else if (code == MEM) ++ output_address (XEXP (op, 0)); ++ else if (letter == 'z' && GET_CODE (op) == CONST_INT && INTVAL (op) == 0) ++ fprintf (file, "%s", reg_names[0]); ++ else if (GET_CODE (op) == CONST_DOUBLE) ++ { ++ if ((CONST_DOUBLE_LOW (op) != 0) || (CONST_DOUBLE_HIGH (op) != 0)) ++ output_operand_lossage ("Only 0.0 can be loaded as an immediate"); ++ else ++ fprintf (file, "0"); ++ } ++ else if (code == EQ) ++ fprintf (file, "e "); ++ else if (code == NE) ++ fprintf (file, "ne "); ++ else if (code == GT) ++ fprintf (file, "g "); ++ else if (code == GTU) ++ fprintf (file, "gu "); ++ else if (code == LT) ++ fprintf (file, "l "); ++ else if (code == LTU) ++ fprintf (file, "lu "); ++ else if (code == GE) ++ fprintf (file, "ge "); ++ else if (code == GEU) ++ fprintf (file, "geu"); ++ else if (code == LE) ++ fprintf (file, "le "); ++ else if (code == LEU) ++ fprintf (file, "leu"); ++ else ++ output_addr_const (file, op); ++} ++ ++/* A C compound statement to output to stdio stream STREAM the ++ assembler syntax for an instruction operand that is a memory ++ reference whose address is ADDR. ADDR is an RTL expression. ++ ++ On some machines, the syntax for a symbolic address depends on ++ the section that the address refers to. On these machines, ++ define the macro `ENCODE_SECTION_INFO' to store the information ++ into the `symbol_ref', and then check for it here. */ ++ ++void ++lm32_print_operand_address (FILE *file, rtx addr) ++{ ++ switch (GET_CODE (addr)) ++ { ++ case REG: ++ fprintf (file, "(%s+0)", reg_names [REGNO (addr)]); ++ break; ++ ++ case MEM: ++ output_address (XEXP (addr, 0)); ++ break; ++ ++ case PLUS: ++ { ++ rtx arg0 = XEXP (addr, 0); ++ rtx arg1 = XEXP (addr, 1); ++ ++ if (GET_CODE (arg0) == REG && CONSTANT_P (arg1)) ++ { ++ if (GET_CODE(arg1) == CONST_INT) ++ fprintf (file, "(%s+%ld)", reg_names [REGNO (arg0)], INTVAL (arg1)); ++ else ++ { ++ fprintf (file, "(%s+", reg_names [REGNO (arg0)]); ++ output_addr_const (file, arg1); ++ fprintf (file, ")"); ++ } ++ } ++ else if (CONSTANT_P (arg0) && CONSTANT_P (arg1)) ++ output_addr_const (file, addr); ++ else ++ abort_with_insn (addr, "bad operand"); ++ } ++ break; ++ ++ case SYMBOL_REF: ++ if (SYMBOL_REF_SMALL_P (addr)) ++ { ++ fprintf (file, "gp("); ++ output_addr_const (file, addr); ++ fprintf (file, ")"); ++ } ++ else ++ abort_with_insn (addr, "can't use non gp relative absolute address"); ++ break; ++ ++ default: ++ abort_with_insn (addr, "invalid addressing mode"); ++ break; ++ } ++} ++ ++/* Determine where to put an argument to a function. ++ Value is zero to push the argument on the stack, ++ or a hard register in which to store the argument. ++ ++ MODE is the argument's machine mode. ++ TYPE is the data type of the argument (as a tree). ++ This is null for libcalls where that information may ++ not be available. ++ CUM is a variable of type CUMULATIVE_ARGS which gives info about ++ the preceding args and about the function being called. ++ NAMED is nonzero if this argument is a named parameter ++ (otherwise it is an extra parameter matching an ellipsis). */ ++ ++rtx ++lm32_function_arg (CUMULATIVE_ARGS cum, enum machine_mode mode, ++ tree type, int named) ++{ ++ if (mode == VOIDmode) ++ /* Compute operand 2 of the call insn. */ ++ return GEN_INT (0); ++ ++ if (targetm.calls.must_pass_in_stack (mode, type)) ++ return NULL_RTX; ++ ++ if (!named || (cum + LM32_NUM_REGS2(mode, type) > LM32_NUM_ARG_REGS)) ++ return NULL_RTX; ++ ++ return gen_rtx_REG (mode, cum + LM32_FIRST_ARG_REG); ++} ++ ++HOST_WIDE_INT ++lm32_compute_initial_elimination_offset (int from, int to) ++{ ++ HOST_WIDE_INT offset = 0; ++ ++ switch (from) ++ { ++ /*case FRAME_POINTER_REGNUM: - Same as ARG_POINTER_REGNUM */ ++ case ARG_POINTER_REGNUM: ++ switch (to) ++ { ++ case FRAME_POINTER_REGNUM: ++ offset = 0; ++ break; ++ case STACK_POINTER_REGNUM: ++ offset = lm32_compute_frame_size (get_frame_size ()) - current_frame_info.pretend_size; ++ break; ++ default: ++ abort (); ++ } ++ break; ++ default: ++ abort (); ++ } ++ ++ return offset; ++} ++ ++static void ++lm32_setup_incoming_varargs (CUMULATIVE_ARGS *cum, enum machine_mode mode, ++ tree type, int *pretend_size, int no_rtl) ++{ ++ int first_anon_arg; ++ tree fntype; ++ int stdarg_p; ++ ++ fntype = TREE_TYPE (current_function_decl); ++ stdarg_p = (TYPE_ARG_TYPES (fntype) != 0 ++ && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype))) ++ != void_type_node)); ++ ++ if (stdarg_p) ++ first_anon_arg = *cum + LM32_FIRST_ARG_REG; ++ else ++ { ++ /* this is the common case, we have been passed details setup ++ for the last named argument, we want to skip over the ++ registers, if any used in passing this named paramter in ++ order to determine which is the first registers used to pass ++ anonymous arguments */ ++ int size; ++ ++ if (mode==BLKmode) ++ size = int_size_in_bytes (type); ++ else ++ size = GET_MODE_SIZE (mode); ++ ++ first_anon_arg = *cum + LM32_FIRST_ARG_REG + ((size + UNITS_PER_WORD - 1) / UNITS_PER_WORD); ++ } ++ ++ if ((first_anon_arg < (LM32_FIRST_ARG_REG + LM32_NUM_ARG_REGS)) && !no_rtl) ++ { ++ int first_reg_offset = first_anon_arg; ++ int size = LM32_FIRST_ARG_REG + LM32_NUM_ARG_REGS - first_anon_arg; ++ rtx regblock; ++ ++ regblock = gen_rtx_MEM (BLKmode, ++ plus_constant (arg_pointer_rtx, ++ FIRST_PARM_OFFSET (0))); ++ move_block_from_reg (first_reg_offset, regblock, size); ++ ++ *pretend_size = size * UNITS_PER_WORD; ++ } ++} ++ ++/* Abort after printing out a specific insn. */ ++static void ++abort_with_insn (rtx insn, const char *reason) ++{ ++ error (reason); ++ debug_rtx (insn); ++ abort (); ++} ++ ++/* Override command line options */ ++void ++lm32_override_options (void) ++{ ++ /* We must have sign-extend enabled if barrel-shift isn't */ ++ if (!MASK_BARREL_SHIFT_ENABLED) ++ { ++ warning (0, "neither -mbarrel-shift-enabled nor -msign-extend-enabled specified. Assuming -msign-extend-enabled"); ++ target_flags |= MASK_SIGN_EXTEND_ENABLED; ++ } ++} ++ ++/* Return nonzero if this function is known to have a null epilogue. ++ This allows the optimizer to omit jumps to jumps if no stack ++ was created. */ ++int ++lm32_can_use_return (void) ++{ ++ if (!reload_completed) ++ return 0; ++ ++ if (df_regs_ever_live_p(RA_REGNUM) || crtl->profile) ++ return 0; ++ ++ if (lm32_compute_frame_size (get_frame_size ()) != 0) ++ return 0; ++ ++ return 1; ++} ++ ++/* Support function to determine the return address of the function ++ 'count' frames back up the stack. */ ++rtx ++lm32_return_addr_rtx (int count, rtx frame) ++{ ++ rtx r; ++ if (count == 0) ++ { ++ /* *mjs* This test originally used leaf_function_p (), we now use ++ the regs_ever_live test which I *think* is more accurate. */ ++ if (!df_regs_ever_live_p(RA_REGNUM)) ++ { ++ r = gen_rtx_REG (Pmode, RA_REGNUM); ++ } ++ else ++ { ++ r = gen_rtx_MEM (Pmode, ++ gen_rtx_PLUS (Pmode, frame, ++ GEN_INT(- 2 * UNITS_PER_WORD))); ++ set_mem_alias_set (r, get_frame_alias_set ()); ++ } ++ } ++ else if (flag_omit_frame_pointer) ++ r = NULL_RTX; ++ else ++ { ++ r = gen_rtx_MEM (Pmode, ++ gen_rtx_PLUS (Pmode, frame, ++ GEN_INT(- 2 * UNITS_PER_WORD))); ++ set_mem_alias_set (r, get_frame_alias_set ()); ++ } ++ return r; ++} ++ ++/* Return true if EXP should be placed in the small data section. */ ++ ++static bool ++lm32_in_small_data_p (const_tree exp) ++{ ++ /* We want to merge strings, so we never consider them small data. */ ++ if (TREE_CODE (exp) == STRING_CST) ++ return false; ++ ++ /* Functions are never in the small data area. Duh. */ ++ if (TREE_CODE (exp) == FUNCTION_DECL) ++ return false; ++ ++ if (TREE_CODE (exp) == VAR_DECL && DECL_SECTION_NAME (exp)) ++ { ++ const char *section = TREE_STRING_POINTER (DECL_SECTION_NAME (exp)); ++ if (strcmp (section, ".sdata") == 0 ++ || strcmp (section, ".sbss") == 0) ++ return true; ++ } ++ else ++ { ++ HOST_WIDE_INT size = int_size_in_bytes (TREE_TYPE (exp)); ++ ++ /* If this is an incomplete type with size 0, then we can't put it ++ in sdata because it might be too big when completed. */ ++ if (size > 0 && (unsigned HOST_WIDE_INT) size <= g_switch_value) ++ return true; ++ } ++ ++ return false; ++} ++ ++/* Emit straight-line code to move LENGTH bytes from SRC to DEST. ++ Assume that the areas do not overlap. */ ++ ++static void ++lm32_block_move_inline (rtx dest, rtx src, HOST_WIDE_INT length, HOST_WIDE_INT alignment) ++{ ++ HOST_WIDE_INT offset, delta; ++ unsigned HOST_WIDE_INT bits; ++ int i; ++ enum machine_mode mode; ++ rtx *regs; ++ ++ /* Work out how many bits to move at a time. */ ++ switch (alignment) ++ { ++ case 1: ++ bits = 8; ++ break; ++ case 2: ++ bits = 16; ++ break; ++ case 4: ++ bits = 32; ++ break; ++ default: ++ abort (); ++ } ++ ++ mode = mode_for_size (bits, MODE_INT, 0); ++ delta = bits / BITS_PER_UNIT; ++ ++ /* Allocate a buffer for the temporary registers. */ ++ regs = alloca (sizeof (rtx) * length / delta); ++ ++ /* Load as many BITS-sized chunks as possible. */ ++ for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++) ++ { ++ regs[i] = gen_reg_rtx (mode); ++ emit_move_insn (regs[i], adjust_address (src, mode, offset)); ++ } ++ ++ /* Copy the chunks to the destination. */ ++ for (offset = 0, i = 0; offset + delta <= length; offset += delta, i++) ++ emit_move_insn (adjust_address (dest, mode, offset), regs[i]); ++ ++ /* Mop up any left-over bytes. */ ++ if (offset < length) ++ { ++ src = adjust_address (src, BLKmode, offset); ++ dest = adjust_address (dest, BLKmode, offset); ++ move_by_pieces (dest, src, length - offset, ++ MIN (MEM_ALIGN (src), MEM_ALIGN (dest)), 0); ++ } ++} ++ ++/* Expand string/block move operations. ++ ++ operands[0] is the pointer to the destination. ++ operands[1] is the pointer to the source. ++ operands[2] is the number of bytes to move. ++ operands[3] is the alignment. */ ++ ++int ++lm32_expand_block_move (rtx *operands) ++{ ++ if ((GET_CODE (operands[2]) == CONST_INT) && (INTVAL (operands[2]) <= 32)) ++ { ++ lm32_block_move_inline (operands[0], operands[1], INTVAL (operands[2]), INTVAL (operands[3])); ++ return 1; ++ } ++ return 0; ++} ++ ++/* Return TRUE if X references a SYMBOL_REF or LABEL_REF whose symbol ++ isn't protected by a PIC unspec. */ ++int ++nonpic_symbol_mentioned_p (rtx x) ++{ ++ register const char *fmt; ++ register int i; ++ ++ if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == LABEL_REF ++ || GET_CODE (x) == PC) ++ return 1; ++ ++ /* We don't want to look into the possible MEM location of a ++ CONST_DOUBLE, since we're not going to use it, in general. */ ++ if (GET_CODE (x) == CONST_DOUBLE) ++ return 0; ++ ++ if (GET_CODE (x) == UNSPEC) ++ return 0; ++ ++ fmt = GET_RTX_FORMAT (GET_CODE (x)); ++ for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) ++ { ++ if (fmt[i] == 'E') ++ { ++ register int j; ++ ++ for (j = XVECLEN (x, i) - 1; j >= 0; j--) ++ if (nonpic_symbol_mentioned_p (XVECEXP (x, i, j))) ++ return 1; ++ } ++ else if (fmt[i] == 'e' && nonpic_symbol_mentioned_p (XEXP (x, i))) ++ return 1; ++ } ++ ++ return 0; ++} +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/lm32.h gcc-4.4.3/gcc/config/lm32/lm32.h +--- gcc-4.4.3.orig/gcc/config/lm32/lm32.h 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/lm32.h 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,657 @@ ++/* Definitions of target machine for GNU compiler, Lattice Mico32 architecture. ++ Contributed by Jon Beniston ++ ++ Copyright (C) 2008 Free Software Foundation, Inc. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/*-------------------------------*/ ++/* Run-time Target Specification */ ++/*-------------------------------*/ ++ ++/* Print subsidiary information on the compiler version in use. */ ++#ifndef TARGET_VERSION ++#define TARGET_VERSION fprintf (stderr, " (LatticeMico32)") ++#endif ++ ++/* Target CPU builtins. */ ++#define TARGET_CPU_CPP_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("__lm32__"); \ ++ builtin_define_std ("lm32"); \ ++ builtin_assert ("cpu=lm32"); \ ++ builtin_assert ("machine=lm32"); \ ++ } \ ++ while (0) ++ ++#define CPP_SPEC "\ ++%{mmultiply-enabled:-D__multiply_enabled__} \ ++%{mdivide-enabled:-D__divide_enabled__} \ ++%{mbarrel-shift-enabled:-D__barrel_shift_enabled__} \ ++%{msign-extend-enabled:-D__sign_extend_enabled__} \ ++%{muser-enabled:-D__user_enabled__} \ ++" ++ ++#undef ASM_SPEC ++#define ASM_SPEC "\ ++%{mmultiply-enabled} \ ++%{mdivide-enabled} \ ++%{mbarrel-shift-enabled} \ ++%{msign-extend-enabled} \ ++%{muser-extend-enabled} \ ++%{v} \ ++" ++ ++/* Let link script define all link options. ++ Default to using simulator link script. */ ++ ++#undef STARTFILE_SPEC ++#define STARTFILE_SPEC "" ++#undef ENDFILE_SPEC ++#define ENDFILE_SPEC "" ++#undef LIB_SPEC ++#define LIB_SPEC "%{!T*:-T sim.ld}" ++ ++#define OVERRIDE_OPTIONS lm32_override_options() ++ ++extern int target_flags; ++ ++/* Add -G xx support. */ ++ ++#undef SWITCH_TAKES_ARG ++#define SWITCH_TAKES_ARG(CHAR) \ ++(DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G') ++ ++#undef CC1_SPEC ++#define CC1_SPEC "%{G*}" ++ ++extern struct rtx_def *lm32_compare_op0; ++extern struct rtx_def *lm32_compare_op1; ++ ++/*---------------------------------*/ ++/* Target machine storage layout. */ ++/*---------------------------------*/ ++ ++#define BITS_BIG_ENDIAN 0 ++#define BYTES_BIG_ENDIAN 1 ++#define WORDS_BIG_ENDIAN 1 ++#define LIBGCC2_WORDS_BIG_ENDIAN 1 ++ ++#define BITS_PER_UNIT 8 ++#define BITS_PER_WORD 32 ++#define UNITS_PER_WORD 4 ++ ++#define POINTER_SIZE 32 ++ ++#define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ ++do { \ ++ if (GET_MODE_CLASS (MODE) == MODE_INT \ ++ && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \ ++ (MODE) = word_mode; \ ++} while (0) ++ ++#define PARM_BOUNDARY 32 ++ ++#define STACK_BOUNDARY 32 ++ ++#define BIGGEST_ALIGNMENT 64 ++ ++#define FUNCTION_BOUNDARY 32 ++ ++#define EMPTY_FIELD_BOUNDARY 32 ++ ++#define STRICT_ALIGNMENT 1 ++ ++#define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT ++ ++/* Make strings word-aligned so strcpy from constants will be faster. */ ++#define CONSTANT_ALIGNMENT(EXP, ALIGN) \ ++ (TREE_CODE (EXP) == STRING_CST \ ++ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) ++ ++/* Make arrays and structures word-aligned to allow faster copying etc. */ ++#define DATA_ALIGNMENT(TYPE, ALIGN) \ ++ ((((ALIGN) < BITS_PER_WORD) \ ++ && (TREE_CODE (TYPE) == ARRAY_TYPE \ ++ || TREE_CODE (TYPE) == UNION_TYPE \ ++ || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN)) ++ ++/* We need this for the same reason as DATA_ALIGNMENT, namely to cause ++ character arrays to be word-aligned so that `strcpy' calls that copy ++ constants to character arrays can be done inline, and 'strcmp' can be ++ optimised to use word loads. */ ++#define LOCAL_ALIGNMENT(TYPE, ALIGN) \ ++ DATA_ALIGNMENT (TYPE, ALIGN) ++ ++/*----------------------------------------*/ ++/* Layout of source language data types. */ ++/*----------------------------------------*/ ++ ++#define INT_TYPE_SIZE 32 ++#define SHORT_TYPE_SIZE 16 ++#define LONG_TYPE_SIZE 32 ++#define LONG_LONG_TYPE_SIZE 64 ++ ++#define FLOAT_TYPE_SIZE 32 ++#define DOUBLE_TYPE_SIZE 64 ++#define LONG_DOUBLE_TYPE_SIZE 64 ++ ++#define DEFAULT_SIGNED_CHAR 0 ++ ++#define SIZE_TYPE "unsigned int" ++ ++#define PTRDIFF_TYPE "int" ++ ++/*---------------------------*/ ++/* Standard register usage. */ ++/*---------------------------*/ ++ ++#define FIRST_PSEUDO_REGISTER 32 ++ ++#define RV_REGNUM 1 ++#define GP_REGNUM 26 ++#define FP_REGNUM 27 ++#define SP_REGNUM 28 ++#define RA_REGNUM 29 ++ ++#define G_REG_P(X) ((X)<32) ++#define PSEUDO_REG_P(X) ((X)>=FIRST_PSEUDO_REGISTER) ++ ++#define FIXED_REGISTERS \ ++{ 1, 0, 0, 0, 0, 0, 0, 0, \ ++ 0, 0, 0, 0, 0, 0, 0, 0, \ ++ 0, 0, 0, 0, 0, 0, 0, 0, \ ++ 0, 0, 1, 0, 1, 0, 1, 1} ++ ++#define CALL_USED_REGISTERS \ ++{ 1, 1, 1, 1, 1, 1, 1, 1, \ ++ 1, 1, 1, 0, 0, 0, 0, 0, \ ++ 0, 0, 0, 0, 0, 0, 0, 0, \ ++ 0, 0, 1, 0, 1, 0, 1, 1} ++ ++#define HARD_REGNO_NREGS(REGNO, MODE) \ ++ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) ++ ++#define HARD_REGNO_MODE_OK(REGNO, MODE) G_REG_P(REGNO) ++ ++#define MODES_TIEABLE_P(MODE1, MODE2) \ ++( GET_MODE_CLASS (MODE1) == MODE_INT \ ++ && GET_MODE_CLASS (MODE2) == MODE_INT \ ++ && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \ ++ && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD) ++ ++#define AVOID_CCMODE_COPIES ++ ++/*----------------------------------*/ ++/* Register classes and constants. */ ++/*----------------------------------*/ ++ ++enum reg_class { ++ NO_REGS, ++ GENERAL_REGS, ++ ALL_REGS, ++ LIM_REG_CLASSES ++}; ++ ++#define N_REG_CLASSES (int) LIM_REG_CLASSES ++ ++#define REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" } ++ ++#define REG_CLASS_CONTENTS \ ++{ {0x00000000}, \ ++ {0xffffffff}, \ ++ {0xffffffff} \ ++} ++ ++#define REGNO_REG_CLASS(REGNO) \ ++ (G_REG_P(REGNO) ? GENERAL_REGS : NO_REGS) ++ ++#define CLASS_MAX_NREGS(CLASS, MODE) \ ++ ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) ++ ++#define INDEX_REG_CLASS NO_REGS ++ ++#define BASE_REG_CLASS GENERAL_REGS ++ ++#define REG_CLASS_FROM_LETTER(C) NO_REGS ++ ++#ifdef REG_OK_STRICT ++#define REGNO_OK_FOR_BASE_P(REGNO) \ ++(G_REG_P (REGNO) || G_REG_P (reg_renumber[REGNO])) ++#else ++#define REGNO_OK_FOR_BASE_P(REGNO) \ ++(G_REG_P (REGNO) || PSEUDO_REG_P (REGNO)) ++#endif ++ ++#define REGNO_OK_FOR_INDEX_P(REGNO) 0 ++ ++#define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS) ++ ++/* The letters I, J, K, L, M, N, O, P in a register constraint string ++ can be used to stand for particular ranges of immediate operands. ++ This macro defines what the ranges are. ++ C is the letter, and VALUE is a constant value. ++ Return 1 if VALUE is in the range specified by C. ++ ++ Lattice usage: ++ ++ J - 0 ++ K - 16-bit signed ++ L - 16-bit unsigned ++ M - 32-bit signed ++ */ ++#define MEDIUM_INT(X) ((((HOST_WIDE_INT)(X)) >= -32768) && (((HOST_WIDE_INT)(X)) < 32768)) ++#define MEDIUM_UINT(X) (((unsigned HOST_WIDE_INT)(X)) < 65536) ++#define LARGE_INT(X) \ ++((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \ ++ && (X) <= (unsigned HOST_WIDE_INT) 0xffffffff) ++ ++#define CONST_OK_FOR_LETTER_P(VALUE, C) \ ++( (C) == 'J' ? (VALUE) == 0 \ ++ : (C) == 'K' ? MEDIUM_INT (VALUE) \ ++ : (C) == 'L' ? MEDIUM_UINT (VALUE) \ ++ : (C) == 'M' ? LARGE_INT (VALUE) \ ++ : 0 \ ++) ++ ++#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0 ++ ++/*----------------------------------------*/ ++/* Stack Layout and Calling Conventions. */ ++/*----------------------------------------*/ ++ ++#define STACK_GROWS_DOWNWARD 1 ++ ++#define FRAME_GROWS_DOWNWARD 1 ++ ++#define STACK_POINTER_OFFSET (UNITS_PER_WORD) ++ ++#define STARTING_FRAME_OFFSET (UNITS_PER_WORD) ++ ++#define FIRST_PARM_OFFSET(FNDECL) (UNITS_PER_WORD) ++ ++#define STACK_POINTER_REGNUM SP_REGNUM ++ ++#define FRAME_POINTER_REGNUM FP_REGNUM ++ ++#define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM ++ ++#define FRAME_POINTER_REQUIRED (cfun->calls_alloca) ++ ++#define RETURN_ADDR_RTX(count, frame) \ ++ lm32_return_addr_rtx (count, frame) ++ ++/* FIXME! */ ++#define STATIC_CHAIN_REGNUM 3 ++ ++#define ELIMINABLE_REGS \ ++{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ ++ { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ ++} ++ ++#define CAN_ELIMINATE(FROM, TO) \ ++ (((TO) == STACK_POINTER_REGNUM && frame_pointer_needed) ? 0 : 1) ++ ++#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ ++ (OFFSET) = lm32_compute_initial_elimination_offset (FROM, TO) ++ ++/*-----------------------------*/ ++/* Function argument passing. */ ++/*-----------------------------*/ ++ ++#define ACCUMULATE_OUTGOING_ARGS 1 ++ ++#define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0 ++ ++/*--------------------------------*/ ++/* Passing Arguments in Registers */ ++/*--------------------------------*/ ++ ++/* The first argument register */ ++#define LM32_FIRST_ARG_REG 1 ++ ++/* The number of (integer) argument register available. */ ++#define LM32_NUM_ARG_REGS 8 ++ ++#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ ++ lm32_function_arg ((CUM), (MODE), (TYPE), (NAMED)) ++ ++#define CUMULATIVE_ARGS int ++ ++#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT,N_NAMED_ARGS) \ ++ (CUM) = 0 ++ ++#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ ++ (CUM) += LM32_NUM_REGS2 (MODE, TYPE) ++ ++#define FUNCTION_ARG_REGNO_P(r) (((r) >= 1) && ((r) <= LM32_NUM_ARG_REGS)) ++ ++/*--------------------*/ ++/* Function results. */ ++/*--------------------*/ ++ ++#define FUNCTION_VALUE(VALTYPE, FUNC) \ ++ gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \ ++ && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \ ++ ? word_mode \ ++ : TYPE_MODE (VALTYPE), \ ++ RV_REGNUM) ++ ++#define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RV_REGNUM) ++ ++#define FUNCTION_VALUE_REGNO_P(N) ((N) == RV_REGNUM) ++ ++#define RETURN_IN_MEMORY(TYPE) lm32_return_in_memory (TYPE) ++ ++#define DEFAULT_PCC_STRUCT_RETURN 0 ++ ++/* Convert from bytes to ints. */ ++#define LM32_NUM_INTS(X) (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) ++ ++/* The number of (integer) registers required to hold a quantity of ++ type MODE. */ ++#define LM32_NUM_REGS(MODE) LM32_NUM_INTS (GET_MODE_SIZE (MODE)) ++ ++/* The number of (integer) registers required to hold a quantity of ++ TYPE MODE. */ ++#define LM32_NUM_REGS2(MODE, TYPE) \ ++ LM32_NUM_INTS ((MODE) == BLKmode ? \ ++ int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) ++ ++#define STRUCT_VALUE 0 ++ ++/*---------------------------*/ ++/* Function entry and exit. */ ++/*---------------------------*/ ++ ++/*-------------*/ ++/* Profiling. */ ++/*-------------*/ ++ ++#define FUNCTION_PROFILER(FILE, LABELNO) ++ ++/*---------------*/ ++/* Trampolines. */ ++/*---------------*/ ++ ++#define INITIALIZE_TRAMPOLINE ++#define TRAMPOLINE_SIZE 0 ++ ++/*---------------------*/ ++/* Addressing Modes. */ ++/*---------------------*/ ++ ++#define CONSTANT_ADDRESS_P(X) \ ++ ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ ++ || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \ ++ || (GET_CODE (X) == CONST))) ++ ++#define MAX_REGS_PER_ADDRESS 1 ++ ++#ifdef REG_OK_STRICT ++#define REG_OK_FOR_FRAME_PTR_P(X) (REGNO (X) == FRAME_POINTER_REGNUM) ++#else ++#define REG_OK_FOR_FRAME_PTR_P(X) (REGNO (X) == FRAME_POINTER_REGNUM) ++#endif ++ ++#define RTX_OK_FOR_BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X)) ++#define RTX_OK_FOR_STACK_P(X) (REG_P (X) && (REGNO (X) == STACK_POINTER_REGNUM)) ++#define CONST_OK_FOR_BASE_OFFSET(X, MODE) const_ok_for_base_offset ((X), (MODE)) ++ ++#define LEGITIMATE_BASE_INDEX_P(ADDR, MODE) \ ++( GET_CODE (ADDR)==PLUS \ ++ && RTX_OK_FOR_BASE_P (XEXP (ADDR, 0)) \ ++ && GET_CODE (XEXP (ADDR, 1)) == CONST_INT \ ++ && CONST_OK_FOR_BASE_OFFSET (XEXP ((ADDR), 1), (MODE))) ++ ++#define LEGITIMATE_GPREL_P(ADDR) \ ++( GET_CODE (ADDR) == SYMBOL_REF \ ++ && SYMBOL_REF_SMALL_P (ADDR)) ++ ++#ifdef REG_OK_STRICT ++#define REG_OK_FOR_BASE_P(X) (G_REG_P (REGNO (X))) ++#else ++#define REG_OK_FOR_BASE_P(X) (G_REG_P (REGNO (X)) || PSEUDO_REG_P (REGNO (X))) ++#endif ++ ++#ifdef REG_OK_STRICT ++#define REG_OK_FOR_INDEX_P(X) (G_REG_P (REGNO (X))) ++#else ++#define REG_OK_FOR_INDEX_P(X) (G_REG_P (REGNO (X)) || PSEUDO_REG_P (REGNO (X))) ++#endif ++ ++#define GO_IF_LEGITIMATE_ADDRESS(m,x,l) \ ++{ \ ++ if (RTX_OK_FOR_BASE_P (x)) goto l; /* (rM) */ \ ++ else if (LEGITIMATE_BASE_INDEX_P (x, m)) goto l; /* (rM)+literal) */ \ ++ else if (LEGITIMATE_GPREL_P (x)) goto l; \ ++} ++ ++#define ARM_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \ ++do { \ ++ if (flag_pic) \ ++ X = lm32_legitimize_pic_address (OLDX, MODE, NULL_RTX); \ ++} while (0) ++ ++#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ ++ if (GET_CODE (ADDR) == PLUS) goto LABEL; \ ++ ++#define LEGITIMATE_CONSTANT_P(X) 1 ++ ++/*-------------------------*/ ++/* Condition Code Status. */ ++/*-------------------------*/ ++ ++#define REVERSIBLE_CC_MODE(MODE) 1 ++ ++/*---------*/ ++/* Costs. */ ++/*---------*/ ++ ++#define SLOW_BYTE_ACCESS 1 ++ ++#define NO_FUNCTION_CSE ++ ++#define BRANCH_COST(speed_p, predictable_p) 4 ++ ++#define MOVE_RATIO(speed) (speed ? 24 : 3) ++ ++/*------------*/ ++/* Sections. */ ++/*------------*/ ++ ++#define TEXT_SECTION_ASM_OP "\t.section\t.text" ++#define DATA_SECTION_ASM_OP "\t.section\t.data" ++#define SDATA_SECTION_ASM_OP "\t.section\t.sdata,\"aw\"" ++#define BSS_SECTION_ASM_OP "\t.section\t.bss" ++#define SBSS_SECTION_ASM_OP "\t.section\t.sbss,\"aw\"" ++ ++/*-------*/ ++/* PIC. */ ++/*-------*/ ++ ++#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? GP_REGNUM : INVALID_REGNUM) ++ ++#define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) ++ ++#define LEGITIMATE_PIC_OPERAND_P(X) \ ++ (!(nonpic_symbol_mentioned_p (X))) ++ ++/*-------------*/ ++/* Assembler. */ ++/*-------------*/ ++ ++#define ASM_COMMENT_START "#" ++ ++#define ASM_APP_ON "#APP\n" ++ ++#define ASM_APP_OFF "#NO_APP\n" ++ ++#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \ ++ do { \ ++ fputc ( '\t', FILE); \ ++ assemble_name (FILE, LABEL1); \ ++ fputs ( " = ", FILE); \ ++ assemble_name (FILE, LABEL2); \ ++ fputc ( '\n', FILE); \ ++ } while (0) ++ ++/* Override default implementation in elfos.h to support -G. */ ++#undef ASM_OUTPUT_ALIGNED_LOCAL ++#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \ ++do { \ ++ if ((SIZE) <= g_switch_value) \ ++ switch_to_section (sbss_section); \ ++ else \ ++ switch_to_section (bss_section); \ ++ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \ ++ if (!flag_inhibit_size_directive) \ ++ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \ ++ ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \ ++ ASM_OUTPUT_LABEL(FILE, NAME); \ ++ ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \ ++} while (0) ++ ++/* Override default implementation in elfos.h to support -G. */ ++#undef ASM_OUTPUT_ALIGNED_COMMON ++#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \ ++do \ ++{ \ ++ if ((SIZE) <= g_switch_value) \ ++ { \ ++ switch_to_section (sbss_section); \ ++ (*targetm.asm_out.globalize_label) (FILE, NAME); \ ++ ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object"); \ ++ if (!flag_inhibit_size_directive) \ ++ ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME, SIZE); \ ++ ASM_OUTPUT_ALIGN ((FILE), exact_log2((ALIGN) / BITS_PER_UNIT)); \ ++ ASM_OUTPUT_LABEL(FILE, NAME); \ ++ ASM_OUTPUT_SKIP((FILE), (SIZE) ? (SIZE) : 1); \ ++ } \ ++ else \ ++ { \ ++ switch_to_section (bss_section); \ ++ fprintf ((FILE), "%s", COMMON_ASM_OP); \ ++ assemble_name ((FILE), (NAME)); \ ++ fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT); \ ++ } \ ++} \ ++while (0) ++ ++#define ASM_OUTPUT_LABEL(FILE, NAME) \ ++ do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) ++ ++#define ASM_OUTPUT_LABELREF(FILE,NAME) \ ++ do { \ ++ const char *xname = (NAME); \ ++ if (xname[0] == '@') \ ++ xname += 1; \ ++ if (xname[0] == '*') \ ++ xname += 1; \ ++ fputs (xname, FILE); \ ++ } while (0) ++ ++#define ASM_OUTPUT_SYMBOL_REF(STREAM, SYMBOL) \ ++ do { \ ++ assemble_name (STREAM, XSTR (SYMBOL, 0)); \ ++ } while (0) ++ ++#define GLOBAL_ASM_OP "\t.global\t" ++ ++#define REGISTER_NAMES \ ++{ \ ++ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ ++ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \ ++ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \ ++ "r24", "r25", "gp", "fp", "sp", "ra", "ea", "ba"} ++ ++#define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \ ++ (((CHAR) == '&') || ((CHAR) == '@') || ((CHAR) == '*')) ++ ++#define PRINT_OPERAND(FILE, X, CODE) \ ++ lm32_print_operand (FILE, X, CODE) ++ ++#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \ ++ lm32_print_operand_address (FILE, ADDR) ++ ++#ifndef LOCAL_LABEL_PREFIX ++#define LOCAL_LABEL_PREFIX "." ++#endif ++ ++#define ASM_OUTPUT_ALIGN(FILE,LOG) \ ++ do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", (1 << (LOG))); } while (0) ++ ++#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ ++do { \ ++ char label[64]; \ ++ ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ ++ fprintf (FILE, "\n\t.word\t"); \ ++ assemble_name (FILE, label); \ ++ fprintf (FILE, "\n"); \ ++} while (0) ++ ++#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ ++do { \ ++ char label[64]; \ ++ fprintf (FILE, "\t.word\t("); \ ++ ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ ++ assemble_name (FILE, label); \ ++ fprintf (FILE, "-"); \ ++ ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \ ++ assemble_name (FILE, label); \ ++ fprintf (FILE, ")\n"); \ ++} while (0) ++ ++/*-------------*/ ++/* Debugging. */ ++/*-------------*/ ++ ++#define DBX_REGISTER_NUMBER(REGNO) (REGNO) ++ ++#define CAN_DEBUG_WITHOUT_FP ++ ++#define DEFAULT_GDB_EXTENSIONS 1 ++ ++/*--------*/ ++/* Misc. */ ++/*--------*/ ++ ++#define CASE_VECTOR_MODE Pmode ++ ++#define WORD_REGISTER_OPERATIONS ++ ++#define LOAD_EXTEND_OP(MODE) ZERO_EXTEND ++ ++#define SHORT_IMMEDIATES_SIGN_EXTEND ++ ++#define MOVE_MAX UNITS_PER_WORD ++#define MAX_MOVE_MAX 4 ++ ++#define SHIFT_COUNT_TRUNCATED 1 ++ ++#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 ++ ++#define Pmode SImode ++ ++#define FUNCTION_MODE SImode ++ ++#ifndef NO_IMPLICIT_EXTERN_C ++#define NO_IMPLICIT_EXTERN_C ++#endif ++ ++#define STORE_FLAG_VALUE 1 +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/lm32.md gcc-4.4.3/gcc/config/lm32/lm32.md +--- gcc-4.4.3.orig/gcc/config/lm32/lm32.md 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/lm32.md 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,1233 @@ ++;; Machine description of the Lattice Mico32 architecture for GNU C compiler. ++;; Contributed by Jon Beniston ++ ++;; This file is part of GCC. ++ ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published ++;; by the Free Software Foundation; either version 3, or (at your ++;; option) any later version. ++ ++;; GCC is distributed in the hope that it will be useful, but WITHOUT ++;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++;; License for more details. ++ ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++;; Include predicate definitions ++(include "predicates.md") ++ ++;; Register numbers ++(define_constants ++ [(RA_REGNUM 29) ; return address register. ++ ] ++) ++ ++;; LM32 specific volatile operations ++(define_constants ++ [(UNSPECV_BLOCKAGE 1)] ; use to prevent scheduler from optimising accross bounaries ++) ++ ++;; LM32 specific operations ++(define_constants ++ [(UNSPEC_GOT 2) ++ (UNSPEC_GOTOFF_HI16 3) ++ (UNSPEC_GOTOFF_LO16 4)] ++) ++ ++;; --------------------------------- ++;; instruction types ++;; --------------------------------- ++ ++(define_attr "type" ++ "unknown,load,store,arith,compare,shift,multiply,divide,call,icall,ubranch,uibranch,cbranch" ++ (const_string "unknown")) ++ ++;; --------------------------------- ++;; instruction lengths ++;; --------------------------------- ++ ++; All instructions are 4 bytes ++; Except for branches that are out of range, and have to be implemented ++; as two instructions ++(define_attr "length" "" ++ (cond [ ++ (eq_attr "type" "cbranch") ++ (if_then_else ++ (lt (abs (minus (match_dup 2) (pc))) ++ (const_int 32768) ++ ) ++ (const_int 4) ++ (const_int 8) ++ ) ++ ] ++ (const_int 4)) ++) ++ ++;; --------------------------------- ++;; scheduling ++;; --------------------------------- ++ ++(define_automaton "lm32") ++ ++(define_cpu_unit "x" "lm32") ++(define_cpu_unit "m" "lm32") ++(define_cpu_unit "w" "lm32") ++ ++(define_insn_reservation "singlecycle" 1 ++ (eq_attr "type" "store,arith,call,icall,ubranch,uibranch,cbranch") ++ "x") ++ ++(define_insn_reservation "twocycle" 2 ++ (eq_attr "type" "compare,shift,divide") ++ "x,m") ++ ++(define_insn_reservation "threecycle" 3 ++ (eq_attr "type" "load,multiply") ++ "x,m,w") ++ ++;; --------------------------------- ++;; mov ++;; --------------------------------- ++ ++(define_expand "movqi" ++ [(set (match_operand:QI 0 "general_operand" "") ++ (match_operand:QI 1 "general_operand" ""))] ++ "" ++ " ++{ ++ if (can_create_pseudo_p ()) ++ { ++ if (GET_CODE (operand0) == MEM) ++ { ++ /* Source operand for store must be in a register */ ++ operands[1] = force_reg (QImode, operands[1]); ++ } ++ } ++ if ( GET_CODE (operands[1]) == CONST_INT ++ && GET_CODE (operands[0]) == REG) ++ { ++ operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0); ++ emit_insn (gen_movsi (operands[0], operands[1])); ++ DONE; ++ } ++}") ++ ++(define_expand "movhi" ++ [(set (match_operand:HI 0 "general_operand" "") ++ (match_operand:HI 1 "general_operand" ""))] ++ "" ++ " ++{ ++ if (can_create_pseudo_p ()) ++ { ++ if (GET_CODE (operands[0]) == MEM) ++ { ++ /* Source operand for store must be in a register */ ++ operands[1] = force_reg (HImode, operands[1]); ++ } ++ } ++ if (GET_CODE (operands[1]) == CONST_INT) ++ { ++ operands[0] = gen_rtx_SUBREG (SImode, operands[0], 0); ++ if (MEDIUM_INT (INTVAL (operands[1]))) ++ emit_insn (gen_movsi_kimm (operands[0], operands[1])); ++ else if (MEDIUM_UINT (INTVAL (operands[1]))) ++ emit_insn (gen_movsi_limm (operands[0], operands[1])); ++ else ++ { ++ emit_insn (gen_movsi_imm_hi (operands[0], GEN_INT (INTVAL (operands[1])))); ++ emit_insn (gen_movsi_imm_lo (operands[0], operands[0], GEN_INT (INTVAL (operands[1])))); ++ } ++ DONE; ++ } ++}") ++ ++(define_expand "movsi" ++ [(set (match_operand:SI 0 "general_operand" "") ++ (match_operand:SI 1 "general_operand" ""))] ++ "" ++ " ++{ ++ if (can_create_pseudo_p ()) ++ { ++ if (GET_CODE (operands[0]) == MEM ++ || (GET_CODE (operands[0]) == SUBREG ++ && GET_CODE (SUBREG_REG (operands[0])) == MEM)) ++ { ++ /* Source operand for store must be in a register */ ++ operands[1] = force_reg (SImode, operands[1]); ++ } ++ } ++ ++ if (flag_pic && symbolic_operand (operands[1], SImode)) ++ { ++ if (GET_CODE (operands[1]) == LABEL_REF ++ || (GET_CODE (operands[1]) == SYMBOL_REF ++ && SYMBOL_REF_LOCAL_P (operands[1]) ++ && !SYMBOL_REF_WEAK (operands[1]))) ++ { ++ emit_insn (gen_movsi_gotoff_hi16 (operands[0], operands[1])); ++ emit_insn (gen_addsi3 (operands[0], operands[0], pic_offset_table_rtx)); ++ emit_insn (gen_movsi_gotoff_lo16 (operands[0], operands[0], operands[1])); ++ } ++ else ++ { ++ emit_insn (gen_movsi_got (operands[0], operands[1])); ++ } ++ crtl->uses_pic_offset_table = 1; ++ DONE; ++ } ++ else if (flag_pic && GET_CODE (operands[1]) == CONST) ++ { ++ rtx op = XEXP (operands[1], 0); ++ if (GET_CODE (op) == PLUS) ++ { ++ rtx arg0 = XEXP (op, 0); ++ rtx arg1 = XEXP (op, 1); ++ if (GET_CODE (arg0) == LABEL_REF ++ || (GET_CODE (arg0) == SYMBOL_REF ++ && SYMBOL_REF_LOCAL_P (arg0) ++ && !SYMBOL_REF_WEAK (arg0))) ++ { ++ emit_insn (gen_movsi_gotoff_hi16 (operands[0], arg0)); ++ emit_insn (gen_addsi3 (operands[0], operands[0], pic_offset_table_rtx)); ++ emit_insn (gen_movsi_gotoff_lo16 (operands[0], operands[0], arg0)); ++ } ++ else ++ { ++ emit_insn (gen_movsi_got (operands[0], arg0)); ++ } ++ emit_insn (gen_addsi3 (operands[0], operands[0], arg1)); ++ crtl->uses_pic_offset_table = 1; ++ DONE; ++ } ++ } ++ else if (!flag_pic && ( GET_CODE (operands[1]) == SYMBOL_REF ++ && SYMBOL_REF_SMALL_P (operands[1]) ++ ) ++ ) ++ { ++ emit_insn (gen_movsi_reloc_gprel (operands[0], operands[1])); ++ DONE; ++ } ++ else if (!flag_pic && ( GET_CODE (operands[1]) == LABEL_REF ++ || GET_CODE (operands[1]) == SYMBOL_REF ++ || GET_CODE (operands[1]) == CONST ++ ) ++ ) ++ { ++ emit_insn (gen_movsi_reloc_hi (operands[0], operands[1])); ++ emit_insn (gen_movsi_reloc_lo (operands[0], operands[0], operands[1])); ++ DONE; ++ } ++ else if (GET_CODE (operands[1]) == CONST_INT) ++ { ++ if (MEDIUM_INT (INTVAL (operands[1]))) ++ emit_insn (gen_movsi_kimm (operands[0], operands[1])); ++ else if (MEDIUM_UINT (INTVAL (operands[1]))) ++ emit_insn (gen_movsi_limm (operands[0], operands[1])); ++ else ++ { ++ emit_insn (gen_movsi_imm_hi (operands[0], GEN_INT (INTVAL (operands[1])))); ++ emit_insn (gen_movsi_imm_lo (operands[0], operands[0], GEN_INT (INTVAL (operands[1])))); ++ } ++ DONE; ++ } ++}") ++ ++;;(define_expand "movmemsi" ++;; [(parallel [(set (match_operand:BLK 0 "general_operand" "") ++;; (match_operand:BLK 1 "general_operand" "")) ++;; (use (match_operand:SI 2 "" "")) ++;; (use (match_operand:SI 3 "const_int_operand" ""))])] ++;; "" ++;;{ ++;; if (!lm32_expand_block_move (operands)) ++;; FAIL; ++;; DONE; ++;;}) ++ ++;; --------------------------------- ++;; load/stores/moves ++;; --------------------------------- ++ ++(define_insn "movsi_kimm" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (match_operand:SI 1 "constant_K_operand" "K"))] ++ "" ++ "addi %0, r0, %1" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "movsi_limm" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (match_operand:SI 1 "constant_L_operand" "L"))] ++ "" ++ "ori %0, r0, %1" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "movsi_imm_hi" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (high:SI (match_operand:SI 1 "immediate_operand" "i")))] ++ "" ++ "orhi %0, r0, hi(%1)" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "movsi_imm_lo" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (lo_sum:SI (match_operand:SI 1 "register_operand" "0") ++ (match_operand:SI 2 "immediate_operand" "i")))] ++ "" ++ "ori %0, %0, lo(%2)" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "movsi_reloc_gprel" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (match_operand:SI 1 "reloc_operand" "i"))] ++ "GET_CODE (operands[1]) == SYMBOL_REF && SYMBOL_REF_SMALL_P (operands[1])" ++ "mva %0, gp(%1)" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "movsi_got" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (unspec:SI [(match_operand 1 "" "")] UNSPEC_GOT))] ++ "flag_pic" ++ "lw %0, (gp+got(%1))" ++ [(set_attr "type" "load")] ++) ++ ++(define_insn "movsi_gotoff_hi16" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (unspec:SI [(match_operand 1 "" "")] UNSPEC_GOTOFF_HI16))] ++ "flag_pic" ++ "orhi %0, r0, gotoffhi16(%1)" ++ [(set_attr "type" "load")] ++) ++ ++(define_insn "movsi_gotoff_lo16" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (unspec:SI [(plus:SI (match_operand:SI 1 "register_operand" "0") ++ (match_operand 2 "" ""))] UNSPEC_GOTOFF_LO16))] ++ "flag_pic" ++ "addi %0, %1, gotofflo16(%2)" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "movsi_reloc_hi" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (high:SI (match_operand:SI 1 "reloc_operand" "i")))] ++ "!flag_pic" ++ "orhi %0, r0, hi(%1)" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "movsi_reloc_lo" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (lo_sum:SI (match_operand:SI 1 "register_operand" "0") ++ (match_operand:SI 2 "reloc_operand" "i")))] ++ "!flag_pic" ++ "ori %0, %0, lo(%2)" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "*movqi_insn" ++ [(set (match_operand:QI 0 "register_or_memory_operand" "=r,r,m") ++ (match_operand:QI 1 "register_or_memory_operand" "m,r,r"))] ++ "" ++ "@ ++ lbu %0, %1 ++ or %0, %1, r0 ++ sb %0, %1" ++ [(set_attr "type" "load,arith,store")] ++) ++ ++(define_insn "*movhi_insn" ++ [(set (match_operand:HI 0 "register_or_memory_operand" "=r,r,m") ++ (match_operand:HI 1 "register_or_memory_operand" "m,r,r"))] ++ "" ++ "@ ++ lhu %0, %1 ++ or %0, %1, r0 ++ sh %0, %1" ++ [(set_attr "type" "load,arith,store")] ++) ++ ++(define_insn "*movsi_insn" ++ [(set (match_operand:SI 0 "register_or_memory_operand" "=r,r,m") ++ (match_operand:SI 1 "register_or_memory_operand" "m,r,r"))] ++ "" ++ "@ ++ lw %0, %1 ++ or %0, %1, r0 ++ sw %0, %1" ++ [(set_attr "type" "load,arith,store")] ++) ++ ++;; --------------------------------- ++;; sign and zero extension ++;; --------------------------------- ++ ++(define_insn "*extendqihi2" ++ [(set (match_operand:HI 0 "register_operand" "=r,r") ++ (sign_extend:HI (match_operand:QI 1 "register_or_memory_operand" "m,r")))] ++ "TARGET_SIGN_EXTEND_ENABLED || (GET_CODE (operands[1]) != REG)" ++ "@ ++ lb %0, %1 ++ sextb %0, %1" ++ [(set_attr "type" "load,arith")] ++) ++ ++(define_insn "zero_extendqihi2" ++ [(set (match_operand:HI 0 "register_operand" "=r,r") ++ (zero_extend:HI (match_operand:QI 1 "register_or_memory_operand" "m,r")))] ++ "" ++ "@ ++ lbu %0, %1 ++ andi %0, %1, 0xff" ++ [(set_attr "type" "load,arith")] ++) ++ ++(define_insn "*extendqisi2" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (sign_extend:SI (match_operand:QI 1 "register_or_memory_operand" "m,r")))] ++ "TARGET_SIGN_EXTEND_ENABLED || (GET_CODE (operands[1]) != REG)" ++ "@ ++ lb %0, %1 ++ sextb %0, %1" ++ [(set_attr "type" "load,arith")] ++) ++ ++(define_insn "zero_extendqisi2" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (zero_extend:SI (match_operand:QI 1 "register_or_memory_operand" "m,r")))] ++ "" ++ "@ ++ lbu %0, %1 ++ andi %0, %1, 0xff" ++ [(set_attr "type" "load,arith")] ++) ++ ++(define_insn "*extendhisi2" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (sign_extend:SI (match_operand:HI 1 "register_or_memory_operand" "m,r")))] ++ "TARGET_SIGN_EXTEND_ENABLED || (GET_CODE (operands[1]) != REG)" ++ "@ ++ lh %0, %1 ++ sexth %0, %1" ++ [(set_attr "type" "load,arith")] ++) ++ ++(define_insn "zero_extendhisi2" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (zero_extend:SI (match_operand:HI 1 "register_or_memory_operand" "m,r")))] ++ "" ++ "@ ++ lhu %0, %1 ++ andi %0, %1, 0xffff" ++ [(set_attr "type" "load,arith")] ++) ++ ++;; --------------------------------- ++;; compare ++;; --------------------------------- ++ ++(define_expand "cmpsi" ++ [(set (cc0) ++ (compare:CC (match_operand:SI 0 "register_operand" "") ++ (match_operand:SI 1 "register_or_K_operand" "")))] ++ "" ++ " ++{ ++ lm32_compare_op0 = operands[0]; ++ lm32_compare_op1 = operands[1]; ++ DONE; ++}") ++ ++ ++(define_expand "tstsi" ++ [(set (cc0) ++ (match_operand:SI 0 "register_operand" ""))] ++ "" ++ " ++{ ++ lm32_compare_op0 = operands[0]; ++ lm32_compare_op1 = const0_rtx; ++ DONE; ++}") ++ ++(define_expand "seq" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (eq:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (EQ, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_insn "*seq" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (eq:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,K")))] ++ "" ++ "@ ++ cmpe %0, %z1, %2 ++ cmpei %0, %z1, %2" ++ [(set_attr "type" "compare")] ++) ++ ++(define_expand "sne" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (ne:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (NE, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_insn "*sne" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (ne:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,K")))] ++ "" ++ "@ ++ cmpne %0, %z1, %2 ++ cmpnei %0, %z1, %2" ++ [(set_attr "type" "compare")] ++) ++ ++(define_expand "sgt" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (gt:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (GT, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_insn "*sgt" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (gt:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,K")))] ++ "" ++ "@ ++ cmpg %0, %z1, %2 ++ cmpgi %0, %z1, %2" ++ [(set_attr "type" "compare")] ++) ++ ++(define_expand "slt" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (lt:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (LT, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_expand "sge" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (ge:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (GE, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_insn "*sge" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (ge:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,K")))] ++ "" ++ "@ ++ cmpge %0, %z1, %2 ++ cmpgei %0, %z1, %2" ++ [(set_attr "type" "compare")] ++) ++ ++(define_expand "sle" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (le:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (LE, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_expand "sgtu" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (gtu:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (GTU, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_insn "*sgtu" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (gtu:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,L")))] ++ "" ++ "@ ++ cmpgu %0, %z1, %2 ++ cmpgui %0, %z1, %2" ++ [(set_attr "type" "compare")] ++) ++ ++(define_expand "sltu" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (ltu:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (LTU, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_expand "sgeu" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (geu:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (GEU, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++(define_insn "*sgeu" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (geu:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,L")))] ++ "" ++ "@ ++ cmpgeu %0, %z1, %2 ++ cmpgeui %0, %z1, %2" ++ [(set_attr "type" "compare")] ++) ++ ++(define_expand "sleu" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (leu:SI (match_dup 1) ++ (match_dup 2)))] ++ "" ++{ ++ operands[1] = lm32_compare_op0; ++ operands[2] = lm32_compare_op1; ++ gen_int_relational (LEU, operands[0], operands[1], operands[2], NULL_RTX); ++ DONE; ++}) ++ ++;; --------------------------------- ++;; unconditional branch ++;; --------------------------------- ++ ++(define_insn "jump" ++ [(set (pc) (label_ref (match_operand 0 "" "")))] ++ "" ++ "bi %0" ++ [(set_attr "type" "ubranch")] ++) ++ ++(define_expand "indirect_jump" ++ [(set (pc) (match_operand 0 "register_operand" ""))] ++ "" ++ " ++{ ++ emit_jump_insn (gen_indirect_jumpsi (operands[0])); ++ DONE; ++}") ++ ++(define_insn "indirect_jumpsi" ++ [(set (pc) (match_operand:SI 0 "register_operand" "r"))] ++ "" ++ "b %0" ++ [(set_attr "type" "uibranch")] ++) ++ ++;; --------------------------------- ++;; conditional branch ++;; --------------------------------- ++ ++(define_expand "beq" ++ [(set (pc) ++ (if_then_else (eq:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (EQ, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "bne" ++ [(set (pc) ++ (if_then_else (ne:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (NE, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "bgt" ++ [(set (pc) ++ (if_then_else (gt:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (GT, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "bge" ++ [(set (pc) ++ (if_then_else (ge:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (GE, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "ble" ++ [(set (pc) ++ (if_then_else (le:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (LE, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "blt" ++ [(set (pc) ++ (if_then_else (lt:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (LT, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "bgtu" ++ [(set (pc) ++ (if_then_else (gtu:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (GTU, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "bgeu" ++ [(set (pc) ++ (if_then_else (geu:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (GEU, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "bleu" ++ [(set (pc) ++ (if_then_else (leu:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (LEU, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_expand "bltu" ++ [(set (pc) ++ (if_then_else (ltu:CC (cc0) ++ (const_int 0)) ++ (label_ref (match_operand 0 "" "")) ++ (pc)))] ++ "" ++ " ++{ ++ gen_int_relational (LTU, NULL_RTX, lm32_compare_op0, lm32_compare_op1, operands[0]); ++ DONE; ++}") ++ ++(define_insn "*beq" ++ [(set (pc) ++ (if_then_else (eq:SI (match_operand:SI 0 "register_or_zero_operand" "rJ") ++ (match_operand:SI 1 "register_or_zero_operand" "rJ")) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++{ ++ return get_attr_length (insn) == 4 ++ ? "be %z0,%z1,%2" ++ : "bne %z0,%z1,8\n\tbi %2"; ++} ++ [(set_attr "type" "cbranch")]) ++ ++(define_insn "*bne" ++ [(set (pc) ++ (if_then_else (ne:SI (match_operand:SI 0 "register_or_zero_operand" "rJ") ++ (match_operand:SI 1 "register_or_zero_operand" "rJ")) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++{ ++ return get_attr_length (insn) == 4 ++ ? "bne %z0,%z1,%2" ++ : "be %z0,%z1,8\n\tbi %2"; ++} ++ [(set_attr "type" "cbranch")]) ++ ++(define_insn "*bgt" ++ [(set (pc) ++ (if_then_else (gt:SI (match_operand:SI 0 "register_or_zero_operand" "rJ") ++ (match_operand:SI 1 "register_or_zero_operand" "rJ")) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++{ ++ return get_attr_length (insn) == 4 ++ ? "bg %z0,%z1,%2" ++ : "bge %z1,%z0,8\n\tbi %2"; ++} ++ [(set_attr "type" "cbranch")]) ++ ++(define_insn "*bge" ++ [(set (pc) ++ (if_then_else (ge:SI (match_operand:SI 0 "register_or_zero_operand" "rJ") ++ (match_operand:SI 1 "register_or_zero_operand" "rJ")) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++{ ++ return get_attr_length (insn) == 4 ++ ? "bge %z0,%z1,%2" ++ : "bg %z1,%z0,8\n\tbi %2"; ++} ++ [(set_attr "type" "cbranch")]) ++ ++(define_insn "*bgtu" ++ [(set (pc) ++ (if_then_else (gtu:SI (match_operand:SI 0 "register_or_zero_operand" "rJ") ++ (match_operand:SI 1 "register_or_zero_operand" "rJ")) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++{ ++ return get_attr_length (insn) == 4 ++ ? "bgu %z0,%z1,%2" ++ : "bgeu %z1,%z0,8\n\tbi %2"; ++} ++ [(set_attr "type" "cbranch")]) ++ ++(define_insn "*bgeu" ++ [(set (pc) ++ (if_then_else (geu:SI (match_operand:SI 0 "register_or_zero_operand" "rJ") ++ (match_operand:SI 1 "register_or_zero_operand" "rJ")) ++ (label_ref (match_operand 2 "" "")) ++ (pc)))] ++ "" ++{ ++ return get_attr_length (insn) == 4 ++ ? "bgeu %z0,%z1,%2" ++ : "bgu %z1,%z0,8\n\tbi %2"; ++} ++ [(set_attr "type" "cbranch")]) ++ ++;; --------------------------------- ++;; call ++;; --------------------------------- ++ ++(define_expand "call" ++ [(parallel [(call (match_operand 0 "memory_operand" "m") ++ (match_operand 1 "" "")) ++ (clobber (reg:SI RA_REGNUM)) ++ ])] ++ "" ++ " ++{ ++ rtx addr = XEXP (operands[0], 0); ++ if (!CONSTANT_ADDRESS_P (addr)) ++ { ++ emit_call_insn (gen_call_via_regsi (addr, operands[1])); ++ DONE; ++ } ++}") ++ ++(define_insn "call_via_regsi" ++ [(call (mem:SI (match_operand:SI 0 "register_operand" "r")) ++ (match_operand 1 "" "")) ++ (clobber (reg:SI RA_REGNUM))] ++ "" ++ "call %0" ++ [(set_attr "type" "icall")] ++) ++ ++(define_insn "*call_via_labelsi" ++ [(call (mem:SI (match_operand:SI 0 "symbolic_operand" "X")) ++ (match_operand 1 "" "")) ++ (clobber (reg:SI RA_REGNUM))] ++ "" ++ "calli %0" ++ [(set_attr "type" "call")] ++) ++ ++(define_expand "call_value" ++ [(parallel [(set (match_operand 0 "register_operand" "=r") ++ (call (match_operand 1 "memory_operand" "m") ++ (match_operand 2 "" ""))) ++ (clobber (reg:SI RA_REGNUM)) ++ ])] ++ "" ++ " ++{ ++ rtx addr = XEXP (operands[1], 0); ++ if (!CONSTANT_ADDRESS_P (addr)) ++ { ++ emit_call_insn (gen_call_value_via_regsi (operands[0], addr, operands[2])); ++ DONE; ++ } ++}") ++ ++(define_insn "call_value_via_regsi" ++ [(set (match_operand 0 "register_operand" "=r") ++ (call (mem:SI (match_operand:SI 1 "register_operand" "r")) ++ (match_operand 2 "" ""))) ++ (clobber (reg:SI RA_REGNUM))] ++ "" ++ "call %1" ++ [(set_attr "type" "icall")] ++) ++ ++(define_insn "*call_value_via_labelsi" ++ [(set (match_operand 0 "register_operand" "=r") ++ (call (mem:SI (match_operand:SI 1 "symbolic_operand" "X")) ++ (match_operand 2 "" ""))) ++ (clobber (reg:SI RA_REGNUM))] ++ "" ++ "calli %1" ++ [(set_attr "type" "call")] ++) ++ ++(define_insn "return_internalsi" ++ [(use (match_operand:SI 0 "register_operand" "r")) ++ (return)] ++ "" ++ "b %0" ++ [(set_attr "type" "uibranch")] ++) ++ ++(define_insn "return" ++ [(return)] ++ "lm32_can_use_return ()" ++ "ret" ++ [(set_attr "type" "uibranch")] ++) ++ ++;; --------------------------------- ++;; switch/case statements ++;; --------------------------------- ++ ++(define_expand "tablejump" ++ [(set (pc) (match_operand 0 "register_operand" "")) ++ (use (label_ref (match_operand 1 "" "")))] ++ "" ++ " ++{ ++ rtx target = operands[0]; ++ if (flag_pic) ++ { ++ /* For PIC, the table entry is relative to the start of the table. */ ++ rtx label = gen_reg_rtx (SImode); ++ target = gen_reg_rtx (SImode); ++ emit_move_insn (label, gen_rtx_LABEL_REF (SImode, operands[1])); ++ emit_insn (gen_addsi3 (target, operands[0], label)); ++ } ++ emit_jump_insn (gen_tablejumpsi (target, operands[1])); ++ DONE; ++}") ++ ++(define_insn "tablejumpsi" ++ [(set (pc) (match_operand:SI 0 "register_operand" "r")) ++ (use (label_ref (match_operand 1 "" "")))] ++ "" ++ "b %0" ++ [(set_attr "type" "ubranch")] ++) ++ ++;; --------------------------------- ++;; arithmetic ++;; --------------------------------- ++ ++(define_insn "addsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (plus:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,K")))] ++ "" ++ "@ ++ add %0, %z1, %2 ++ addi %0, %z1, %2" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "subsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (minus:SI (match_operand:SI 1 "register_or_zero_operand" "rJ") ++ (match_operand:SI 2 "register_or_zero_operand" "rJ")))] ++ "" ++ "sub %0, %z1, %z2" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "mulsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (mult:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_K_operand" "r,K")))] ++ "TARGET_MULTIPLY_ENABLED" ++ "@ ++ mul %0, %z1, %2 ++ muli %0, %z1, %2" ++ [(set_attr "type" "multiply")] ++) ++ ++(define_insn "udivsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (udiv:SI (match_operand:SI 1 "register_or_zero_operand" "rJ") ++ (match_operand:SI 2 "register_operand" "r")))] ++ "TARGET_DIVIDE_ENABLED" ++ "divu %0, %z1, %2" ++ [(set_attr "type" "divide")] ++) ++ ++(define_insn "umodsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (umod:SI (match_operand:SI 1 "register_or_zero_operand" "rJ") ++ (match_operand:SI 2 "register_operand" "r")))] ++ "TARGET_DIVIDE_ENABLED" ++ "modu %0, %z1, %2" ++ [(set_attr "type" "divide")] ++) ++ ++;; --------------------------------- ++;; negation and inversion ++;; --------------------------------- ++ ++(define_insn "negsi2" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (neg:SI (match_operand:SI 1 "register_or_zero_operand" "rJ")))] ++ "" ++ "sub %0, r0, %z1" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "one_cmplsi2" ++ [(set (match_operand:SI 0 "register_operand" "=r") ++ (not:SI (match_operand:SI 1 "register_or_zero_operand" "rJ")))] ++ "" ++ "not %0, %z1" ++ [(set_attr "type" "arith")] ++) ++ ++;; --------------------------------- ++;; logical ++;; --------------------------------- ++ ++(define_insn "andsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (and:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L")))] ++ "" ++ "@ ++ and %0, %z1, %2 ++ andi %0, %z1, %2" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "iorsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (ior:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L")))] ++ "" ++ "@ ++ or %0, %z1, %2 ++ ori %0, %z1, %2" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "xorsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (xor:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L")))] ++ "" ++ "@ ++ xor %0, %z1, %2 ++ xori %0, %z1, %2" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "*norsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (not:SI (ior:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L"))))] ++ "" ++ "@ ++ nor %0, %z1, %2 ++ nori %0, %z1, %2" ++ [(set_attr "type" "arith")] ++) ++ ++(define_insn "*xnorsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (not:SI (xor:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L"))))] ++ "" ++ "@ ++ xnor %0, %z1, %2 ++ xnori %0, %z1, %2" ++ [(set_attr "type" "arith")] ++) ++ ++;; --------------------------------- ++;; shifts ++;; --------------------------------- ++ ++(define_insn "ashlsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (ashift:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L")))] ++ "TARGET_BARREL_SHIFT_ENABLED" ++ "@ ++ sl %0, %z1, %2 ++ sli %0, %z1, %2" ++ [(set_attr "type" "shift")] ++) ++ ++(define_insn "ashrsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (ashiftrt:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L")))] ++ "TARGET_BARREL_SHIFT_ENABLED" ++ "@ ++ sr %0, %z1, %2 ++ sri %0, %z1, %2" ++ [(set_attr "type" "shift")] ++) ++ ++(define_insn "lshrsi3" ++ [(set (match_operand:SI 0 "register_operand" "=r,r") ++ (lshiftrt:SI (match_operand:SI 1 "register_or_zero_operand" "rJ,rJ") ++ (match_operand:SI 2 "register_or_L_operand" "r,L")))] ++ "TARGET_BARREL_SHIFT_ENABLED" ++ "@ ++ sru %0, %z1, %2 ++ srui %0, %z1, %2" ++ [(set_attr "type" "shift")] ++) ++ ++;; --------------------------------- ++;; function entry / exit ++;; --------------------------------- ++ ++(define_expand "prologue" ++ [(const_int 1)] ++ "" ++ " ++{ ++ lm32_expand_prologue (); ++ DONE; ++}") ++ ++(define_expand "epilogue" ++ [(return)] ++ "" ++ " ++{ ++ lm32_expand_epilogue (); ++ DONE; ++}") ++ ++;; --------------------------------- ++;; nop ++;; --------------------------------- ++ ++(define_insn "nop" ++ [(const_int 0)] ++ "" ++ "nop" ++ [(set_attr "type" "arith")] ++) ++ ++;; --------------------------------- ++;; blockage ++;; --------------------------------- ++ ++;; used to stop the scheduler from ++;; scheduling code across certain boundaries ++ ++(define_insn "blockage" ++ [(unspec_volatile [(const_int 0)] UNSPECV_BLOCKAGE)] ++ "" ++ "" ++ [(set_attr "length" "0")] ++) ++ +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/lm32.opt gcc-4.4.3/gcc/config/lm32/lm32.opt +--- gcc-4.4.3.orig/gcc/config/lm32/lm32.opt 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/lm32.opt 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,40 @@ ++; Options for the Lattice Mico32 port of the compiler. ++; Contributed by Jon Beniston ++; ++; Copyright (C) 2008 Free Software Foundation, Inc. ++; ++; This file is part of GCC. ++; ++; GCC is free software; you can redistribute it and/or modify it ++; under the terms of the GNU General Public License as published ++; by the Free Software Foundation; either version 3, or (at your ++; option) any later version. ++; ++; GCC is distributed in the hope that it will be useful, but WITHOUT ++; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++; License for more details. ++; ++; You should have received a copy of the GNU General Public License ++; along with GCC; see the file COPYING3. If not see ++; . ++ ++mmultiply-enabled ++Target Report Mask(MULTIPLY_ENABLED) ++Enable multiply instructions ++ ++mdivide-enabled ++Target Report Mask(DIVIDE_ENABLED) ++Enable divide and modulus instructions ++ ++mbarrel-shift-enabled ++Target Report Mask(BARREL_SHIFT_ENABLED) ++Enable barrel shift instructions ++ ++msign-extend-enabled ++Target Report Mask(SIGN_EXTEND_ENABLED) ++Enable sign extend instructions ++ ++muser-enabled ++Target Report Mask(USER_ENABLED) ++Enable user-defined instructions +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/lm32-protos.h gcc-4.4.3/gcc/config/lm32/lm32-protos.h +--- gcc-4.4.3.orig/gcc/config/lm32/lm32-protos.h 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/lm32-protos.h 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,52 @@ ++/* Prototypes of target machine functions, Lattice Mico32 architecture. ++ Contributed by Jon Beniston ++ ++ Copyright (C) 2008 Free Software Foundation, Inc. ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++extern int lm32_return_in_memory (tree type); ++extern void lm32_declare_object (FILE *stream, char *name, char *init_string, ++ char *final_string, int size); ++extern int symbolic_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED); ++extern int register_or_zero_operand (rtx op, enum machine_mode mode); ++extern int register_or_K_operand (rtx op, enum machine_mode mode); ++extern int constant_K_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED); ++extern int register_or_L_operand (rtx op, enum machine_mode mode); ++extern int constant_L_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED); ++extern int register_or_memory_operand (rtx op, enum machine_mode mode); ++extern int register_operand (rtx op, enum machine_mode mode); ++extern int const_ok_for_base_offset (rtx op, enum machine_mode mode); ++extern void lm32_expand_prologue (void); ++extern void lm32_expand_epilogue (void); ++extern HOST_WIDE_INT lm32_compute_frame_size (int size); ++extern void lm32_print_operand (FILE *file, rtx op, int letter); ++extern void lm32_print_operand_address (FILE *file, rtx addr); ++extern rtx lm32_function_arg (CUMULATIVE_ARGS cum, enum machine_mode mode, ++ tree type, int named); ++extern void lm32_override_options (void); ++extern HOST_WIDE_INT lm32_compute_initial_elimination_offset (int from, ++ int to); ++extern int lm32_can_use_return (void); ++extern rtx lm32_return_addr_rtx (int count, rtx frame); ++#ifdef RTX_CODE ++extern void gen_int_relational (enum rtx_code code, rtx result, rtx cmp0, ++ rtx cmp1, rtx destination); ++#endif ++extern int lm32_expand_block_move (rtx *); ++extern int nonpic_symbol_mentioned_p (rtx); ++extern rtx lm32_legitimize_pic_address (rtx, enum machine_mode, rtx); +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/predicates.md gcc-4.4.3/gcc/config/lm32/predicates.md +--- gcc-4.4.3.orig/gcc/config/lm32/predicates.md 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/predicates.md 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,58 @@ ++;; Predicate definitions for Lattice Mico32. ++;; Contributed by Jon Beniston ++;; ++;; Copyright (C) 2008 Free Software Foundation, Inc. ++;; ++;; This file is part of GCC. ++;; ++;; GCC is free software; you can redistribute it and/or modify it ++;; under the terms of the GNU General Public License as published ++;; by the Free Software Foundation; either version 3, or (at your ++;; option) any later version. ++;; ++;; GCC is distributed in the hope that it will be useful, but WITHOUT ++;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++;; License for more details. ++;; ++;; You should have received a copy of the GNU General Public License ++;; along with GCC; see the file COPYING3. If not see ++;; . ++ ++(define_predicate "const0_operand" ++ (and (match_code "const_int,const_double,const_vector") ++ (match_test "op == CONST0_RTX (GET_MODE (op))"))) ++ ++(define_predicate "constant_K_operand" ++ (and (match_code "const_int") ++ (match_test "MEDIUM_INT (INTVAL (op))"))) ++ ++(define_predicate "constant_L_operand" ++ (and (match_code "const_int") ++ (match_test "MEDIUM_UINT (INTVAL (op))"))) ++ ++(define_predicate "register_or_zero_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "const0_operand"))) ++ ++(define_predicate "register_or_memory_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "memory_operand"))) ++ ++(define_predicate "register_or_K_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "constant_K_operand"))) ++ ++(define_predicate "register_or_L_operand" ++ (ior (match_operand 0 "register_operand") ++ (match_operand 0 "constant_L_operand"))) ++ ++(define_predicate "reloc_operand" ++ (ior (ior (match_code "label_ref") ++ (match_code "symbol_ref")) ++ (match_code "const"))) ++ ++(define_predicate "symbolic_operand" ++ (ior (match_code "label_ref") ++ (match_code "symbol_ref"))) ++ +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/rtems.h gcc-4.4.3/gcc/config/lm32/rtems.h +--- gcc-4.4.3.orig/gcc/config/lm32/rtems.h 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/rtems.h 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,32 @@ ++/* Definitions for rtems targeting a lm32 using ELF. ++ Copyright (C) 2009, Free Software Foundation, Inc. ++ ++This file is part of GCC. ++ ++GCC is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 3, or (at your option) ++any later version. ++ ++GCC is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++You should have received a copy of the GNU General Public License ++along with GCC; see the file COPYING3. If not see ++. */ ++ ++/* Target OS builtins. */ ++#undef TARGET_OS_CPP_BUILTINS ++#define TARGET_OS_CPP_BUILTINS() \ ++ do \ ++ { \ ++ builtin_define ("__rtems__"); \ ++ builtin_define ("__USE_INIT_FINI__"); \ ++ builtin_assert ("system=rtems"); \ ++ } \ ++ while (0) ++ ++/* Use the default */ ++#undef LINK_GCC_C_SEQUENCE_SPEC +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/sfp-machine.h gcc-4.4.3/gcc/config/lm32/sfp-machine.h +--- gcc-4.4.3.orig/gcc/config/lm32/sfp-machine.h 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/sfp-machine.h 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,51 @@ ++#define _FP_W_TYPE_SIZE 32 ++#define _FP_W_TYPE unsigned long ++#define _FP_WS_TYPE signed long ++#define _FP_I_TYPE long ++ ++#define _FP_MUL_MEAT_S(R,X,Y) \ ++ _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) ++#define _FP_MUL_MEAT_D(R,X,Y) \ ++ _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) ++#define _FP_MUL_MEAT_Q(R,X,Y) \ ++ _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) ++ ++#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y) ++#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) ++#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) ++ ++#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) ++#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 ++#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 ++#define _FP_NANSIGN_S 0 ++#define _FP_NANSIGN_D 0 ++#define _FP_NANSIGN_Q 0 ++ ++#define _FP_KEEPNANFRACP 1 ++ ++/* Someone please check this. */ ++#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ ++ do { \ ++ if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \ ++ && !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \ ++ { \ ++ R##_s = Y##_s; \ ++ _FP_FRAC_COPY_##wc(R,Y); \ ++ } \ ++ else \ ++ { \ ++ R##_s = X##_s; \ ++ _FP_FRAC_COPY_##wc(R,X); \ ++ } \ ++ R##_c = FP_CLS_NAN; \ ++ } while (0) ++ ++#define __LITTLE_ENDIAN 1234 ++#define __BIG_ENDIAN 4321 ++ ++#define __BYTE_ORDER __BIG_ENDIAN ++ ++/* Define ALIASNAME as a strong alias for NAME. */ ++# define strong_alias(name, aliasname) _strong_alias(name, aliasname) ++# define _strong_alias(name, aliasname) \ ++ extern __typeof (name) aliasname __attribute__ ((alias (#name))); +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/t-fprules-softfp gcc-4.4.3/gcc/config/lm32/t-fprules-softfp +--- gcc-4.4.3.orig/gcc/config/lm32/t-fprules-softfp 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/t-fprules-softfp 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,5 @@ ++softfp_float_modes := sf df ++softfp_int_modes := si di ++softfp_extensions := sfdf ++softfp_truncations := dfsf ++softfp_machine_header := lm32/sfp-machine.h +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/t-lm32 gcc-4.4.3/gcc/config/lm32/t-lm32 +--- gcc-4.4.3.orig/gcc/config/lm32/t-lm32 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/t-lm32 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,19 @@ ++LIB1ASMSRC = lm32/lib1funcs.S ++LIB1ASMFUNCS = _ashlsi3 _ashrsi3 _lshrsi3 ++ ++LM32_LIB1CSRC = $(srcdir)/config/lm32/arithmetic.c ++LIB2FUNCS_EXTRA = _mulsi3.c \ ++ _udivmodsi4.c _divsi3.c _modsi3.c _udivsi3.c _umodsi3.c ++# Size optimised versions: _ashlsi3.c _ashrsi3.c _lshrsi3.c ++ ++# The fixed-point arithmetic code is in one file ++# similar to libgcc2.c (or the old libgcc1.c). We need to ++# "split it up" with one file per define. ++$(LIB2FUNCS_EXTRA): $(LM32_LIB1CSRC) ++ name=`echo $@ | sed -e 's,.*/,,' | sed -e 's,.c$$,,'`; \ ++ echo "#define L$$name" > tmp-$@ \ ++ && echo '#include "$<"' >> tmp-$@ \ ++ && mv -f tmp-$@ $@ ++ ++MULTILIB_OPTIONS = mmultiply-enabled mbarrel-shift-enabled ++# Don't bother building multilib with mdivide-enabled, not much of a gain +diff -Naur gcc-4.4.3.orig/gcc/config/lm32/uclinux-elf.h gcc-4.4.3/gcc/config/lm32/uclinux-elf.h +--- gcc-4.4.3.orig/gcc/config/lm32/uclinux-elf.h 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/config/lm32/uclinux-elf.h 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,85 @@ ++/* Definitions for LM32 running Linux-based GNU systems using ELF ++ Copyright (C) 1993, 1994, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, ++ 2008 Free Software Foundation, Inc. ++ Contributed by Philip Blundell ++ ++ This file is part of GCC. ++ ++ GCC is free software; you can redistribute it and/or modify it ++ under the terms of the GNU General Public License as published ++ by the Free Software Foundation; either version 3, or (at your ++ option) any later version. ++ ++ GCC is distributed in the hope that it will be useful, but WITHOUT ++ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY ++ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public ++ License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with GCC; see the file COPYING3. If not see ++ . */ ++ ++/* elfos.h should have already been included. Now just override ++ any conflicting definitions and add any extras. */ ++ ++/* Run-time Target Specification. */ ++#undef TARGET_VERSION ++#define TARGET_VERSION fputs (" (LM32 GNU/Linux with ELF)", stderr); ++ ++/* Do not assume anything about header files. */ ++#undef NO_IMPLICIT_EXTERN_C ++#define NO_IMPLICIT_EXTERN_C ++ ++/* The GNU C++ standard library requires that these macros be defined. */ ++#undef CPLUSPLUS_CPP_SPEC ++#define CPLUSPLUS_CPP_SPEC "-D_GNU_SOURCE %(cpp)" ++ ++/* Now we define the strings used to build the spec file. */ ++#undef LIB_SPEC ++#define LIB_SPEC \ ++ "%{pthread:-lpthread} \ ++ %{shared:-lc} \ ++ %{!shared:-lc} " ++ ++#define LIBGCC_SPEC "-lgcc" ++ ++/* Provide a STARTFILE_SPEC appropriate for GNU/Linux. Here we add ++ the GNU/Linux magical crtbegin.o file (see crtstuff.c) which ++ provides part of the support for getting C++ file-scope static ++ object constructed before entering `main'. */ ++ ++#undef STARTFILE_SPEC ++#define STARTFILE_SPEC \ ++ "%{!shared: \ ++ %{pg:gcrt1.o%s} %{!pg:%{p:gcrt1.o%s} \ ++ %{!p:%{profile:gcrt1.o%s} \ ++ %{!profile:crt1.o%s}}}} \ ++ crti.o%s %{!shared:crtbegin.o%s} %{shared:crtbeginS.o%s}" ++ ++/* Provide a ENDFILE_SPEC appropriate for GNU/Linux. Here we tack on ++ the GNU/Linux magical crtend.o file (see crtstuff.c) which ++ provides part of the support for getting C++ file-scope static ++ object constructed before entering `main', followed by a normal ++ GNU/Linux "finalizer" file, `crtn.o'. */ ++ ++#undef ENDFILE_SPEC ++#define ENDFILE_SPEC \ ++ "%{!shared:crtend.o%s} %{shared:crtendS.o%s} crtn.o%s" ++ ++#undef LINK_SPEC ++#define LINK_SPEC "%{h*} %{version:-v} \ ++ %{b} %{Wl,*:%*} \ ++ %{static:-Bstatic} \ ++ %{shared:-shared} \ ++ %{symbolic:-Bsymbolic} \ ++ %{rdynamic:-export-dynamic} \ ++ %{!dynamic-linker:-dynamic-linker /lib/ld-linux.so.2}" ++ ++#define TARGET_OS_CPP_BUILTINS() LINUX_TARGET_OS_CPP_BUILTINS() ++ ++#define LINK_GCC_C_SEQUENCE_SPEC \ ++ "%{static:--start-group} %G %L %{static:--end-group}%{!static:%G}" ++ ++#undef CC1_SPEC ++#define CC1_SPEC "%{G*} %{!fno-PIC:-fPIC}" ++ +diff -Naur gcc-4.4.3.orig/gcc/config/m32c/rtems.h gcc-4.4.3/gcc/config/m32c/rtems.h +--- gcc-4.4.3.orig/gcc/config/m32c/rtems.h 2008-12-01 17:34:42.000000000 +0100 ++++ gcc-4.4.3/gcc/config/m32c/rtems.h 2010-01-21 15:55:24.000000000 +0100 +@@ -29,5 +29,9 @@ + } \ + while (0) + +-/* Use the default */ ++/* Use the defaults */ + #undef LINK_GCC_C_SEQUENCE_SPEC ++ ++#undef WCHAR_TYPE ++ ++#undef WCHAR_TYPE_SIZE +diff -Naur gcc-4.4.3.orig/gcc/config/m68k/rtemself.h gcc-4.4.3/gcc/config/m68k/rtemself.h +--- gcc-4.4.3.orig/gcc/config/m68k/rtemself.h 2007-08-02 12:49:31.000000000 +0200 ++++ gcc-4.4.3/gcc/config/m68k/rtemself.h 2010-01-21 15:55:24.000000000 +0100 +@@ -31,3 +31,8 @@ + builtin_assert ("system=rtems"); \ + } \ + while (0) ++ ++/* Use the defaults */ ++#undef WCHAR_TYPE ++ ++#undef WCHAR_TYPE_SIZE +diff -Naur gcc-4.4.3.orig/gcc/config/mips/elf.h gcc-4.4.3/gcc/config/mips/elf.h +--- gcc-4.4.3.orig/gcc/config/mips/elf.h 2007-08-02 12:49:31.000000000 +0200 ++++ gcc-4.4.3/gcc/config/mips/elf.h 2010-01-21 15:55:24.000000000 +0100 +@@ -48,6 +48,4 @@ + #undef ENDFILE_SPEC + #define ENDFILE_SPEC "crtend%O%s crtn%O%s" + +-#define NO_IMPLICIT_EXTERN_C 1 +- + #define HANDLE_PRAGMA_PACK_PUSH_POP 1 +diff -Naur gcc-4.4.3.orig/gcc/config/rs6000/rtems.h gcc-4.4.3/gcc/config/rs6000/rtems.h +--- gcc-4.4.3.orig/gcc/config/rs6000/rtems.h 2007-08-02 12:49:31.000000000 +0200 ++++ gcc-4.4.3/gcc/config/rs6000/rtems.h 2010-01-21 15:55:24.000000000 +0100 +@@ -49,8 +49,22 @@ + %{mcpu=604: %{!Dppc*: %{!Dmpc*: -Dmpc604} } } \ + %{mcpu=750: %{!Dppc*: %{!Dmpc*: -Dmpc750} } } \ + %{mcpu=821: %{!Dppc*: %{!Dmpc*: -Dmpc821} } } \ +-%{mcpu=860: %{!Dppc*: %{!Dmpc*: -Dmpc860} } }" ++%{mcpu=860: %{!Dppc*: %{!Dmpc*: -Dmpc860} } } \ ++%{mcpu=8540: %{!Dppc*: %{!Dmpc*: -Dppc8540} } }" + + #undef SUBSUBTARGET_EXTRA_SPECS + #define SUBSUBTARGET_EXTRA_SPECS \ + { "cpp_os_rtems", CPP_OS_RTEMS_SPEC } ++ ++#undef SUBSUBTARGET_OVERRIDE_OPTIONS ++#define SUBSUBTARGET_OVERRIDE_OPTIONS \ ++ do { \ ++ if (TARGET_E500) \ ++ { \ ++ rs6000_float_gprs = 1; \ ++ } \ ++ } while(0) ++ ++#undef WCHAR_TYPE ++ ++#undef WCHAR_TYPE_SIZE +diff -Naur gcc-4.4.3.orig/gcc/config/rs6000/t-rtems gcc-4.4.3/gcc/config/rs6000/t-rtems +--- gcc-4.4.3.orig/gcc/config/rs6000/t-rtems 2009-03-25 13:54:16.000000000 +0100 ++++ gcc-4.4.3/gcc/config/rs6000/t-rtems 2010-01-21 15:55:24.000000000 +0100 +@@ -1,12 +1,12 @@ + # Multilibs for powerpc RTEMS targets. + + MULTILIB_OPTIONS = \ +-mcpu=403/mcpu=505/mcpu=601/mcpu=603e/mcpu=604/mcpu=860/mcpu=7400 \ ++mcpu=403/mcpu=505/mcpu=601/mcpu=603e/mcpu=604/mcpu=860/mcpu=7400/mcpu=8540 \ + Dmpc8260 \ + msoft-float + + MULTILIB_DIRNAMES = \ +-m403 m505 m601 m603e m604 m860 m7400 \ ++m403 m505 m601 m603e m604 m860 m7400 m8540 \ + mpc8260 \ + nof + +@@ -29,6 +29,10 @@ + # Map 750 to . + MULTILIB_MATCHES += mcpu?750= + ++# Map e500, 8548 to 8540 ++MULTILIB_MATCHES += mcpu?8540=mcpu?e500 ++MULTILIB_MATCHES += mcpu?8540=mcpu?8548 ++ + # Soft-float only, default implies msoft-float + # NOTE: Must match with MULTILIB_MATCHES_FLOAT and MULTILIB_MATCHES + MULTILIB_SOFTFLOAT_ONLY = \ +@@ -62,3 +66,4 @@ + MULTILIB_EXCEPTIONS += *mcpu=750/Dmpc* + MULTILIB_EXCEPTIONS += *mcpu=860/Dmpc* + MULTILIB_EXCEPTIONS += *mcpu=7400/Dmpc* ++MULTILIB_EXCEPTIONS += *mcpu=8540/Dmpc* +diff -Naur gcc-4.4.3.orig/gcc/config/rtems.h gcc-4.4.3/gcc/config/rtems.h +--- gcc-4.4.3.orig/gcc/config/rtems.h 2007-08-02 12:49:31.000000000 +0200 ++++ gcc-4.4.3/gcc/config/rtems.h 2010-02-10 14:59:13.000000000 +0100 +@@ -38,6 +38,5 @@ + #undef LIB_SPEC + #define LIB_SPEC "%{!qrtems: " STD_LIB_SPEC "} " \ + "%{!nostdlib: %{qrtems: --start-group \ +- %{!qrtems_debug: -lrtemsbsp -lrtemscpu} \ +- %{qrtems_debug: -lrtemsbsp_g -lrtemscpu_g} \ ++ -lrtemsbsp -lrtemscpu \ + -lc -lgcc --end-group %{!qnolinkcmds: -T linkcmds%s}}}" +diff -Naur gcc-4.4.3.orig/gcc/config/sh/rtemself.h gcc-4.4.3/gcc/config/sh/rtemself.h +--- gcc-4.4.3.orig/gcc/config/sh/rtemself.h 2007-08-02 12:49:31.000000000 +0200 ++++ gcc-4.4.3/gcc/config/sh/rtemself.h 2010-01-21 15:55:24.000000000 +0100 +@@ -24,3 +24,8 @@ + builtin_define( "__rtems__" ); \ + builtin_assert( "system=rtems" ); \ + } while (0) ++ ++/* Use the defaults */ ++#undef WCHAR_TYPE ++ ++#undef WCHAR_TYPE_SIZE +diff -Naur gcc-4.4.3.orig/gcc/config/sparc/rtemself.h gcc-4.4.3/gcc/config/sparc/rtemself.h +--- gcc-4.4.3.orig/gcc/config/sparc/rtemself.h 2007-08-02 12:49:31.000000000 +0200 ++++ gcc-4.4.3/gcc/config/sparc/rtemself.h 2010-01-21 15:55:24.000000000 +0100 +@@ -29,5 +29,9 @@ + } \ + while (0) + +-/* Use the default */ ++/* Use the defaults */ + #undef LINK_GCC_C_SEQUENCE_SPEC ++ ++#undef WCHAR_TYPE ++ ++#undef WCHAR_TYPE_SIZE +diff -Naur gcc-4.4.3.orig/gcc/config.gcc gcc-4.4.3/gcc/config.gcc +--- gcc-4.4.3.orig/gcc/config.gcc 2010-01-04 16:13:08.000000000 +0100 ++++ gcc-4.4.3/gcc/config.gcc 2010-01-21 15:55:24.000000000 +0100 +@@ -1364,6 +1364,23 @@ + out_file=iq2000/iq2000.c + md_file=iq2000/iq2000.md + ;; ++lm32-*-elf*) ++ tm_file="dbxelf.h elfos.h ${tm_file}" ++ tmake_file="lm32/t-lm32" ++ tmake_file="${tmake_file} lm32/t-fprules-softfp soft-fp/t-softfp" ++ ;; ++lm32-*-rtems*) ++ tm_file="dbxelf.h elfos.h ${tm_file} lm32/rtems.h rtems.h" ++ tmake_file="lm32/t-lm32" ++ tmake_file="${tmake_file} lm32/t-fprules-softfp soft-fp/t-softfp" ++ tmake_file="${tmake_file} t-rtems" ++ extra_parts="crtbegin.o crtend.o crti.o crtn.o" ++ ;; ++lm32-*-uclinux*) ++ tm_file="dbxelf.h elfos.h ${tm_file} linux.h lm32/uclinux-elf.h" ++ tmake_file="lm32/t-lm32" ++ tmake_file="${tmake_file} lm32/t-fprules-softfp soft-fp/t-softfp" ++ ;; + m32r-*-elf*) + tm_file="dbxelf.h elfos.h svr4.h ${tm_file}" + extra_parts="crtinit.o crtfini.o" +diff -Naur gcc-4.4.3.orig/gcc/doc/contrib.texi gcc-4.4.3/gcc/doc/contrib.texi +--- gcc-4.4.3.orig/gcc/doc/contrib.texi 2009-02-20 16:20:38.000000000 +0100 ++++ gcc-4.4.3/gcc/doc/contrib.texi 2010-01-21 15:55:24.000000000 +0100 +@@ -55,7 +55,7 @@ + Wolfgang Bangerth for processing tons of bug reports. + + @item +-Jon Beniston for his Microsoft Windows port of Java. ++Jon Beniston for his Microsoft Windows port of Java and port to Lattice Mico32. + + @item + Daniel Berlin for better DWARF2 support, faster/better optimizations, +diff -Naur gcc-4.4.3.orig/gcc/doc/install.texi gcc-4.4.3/gcc/doc/install.texi +--- gcc-4.4.3.orig/gcc/doc/install.texi 2009-09-12 20:57:06.000000000 +0200 ++++ gcc-4.4.3/gcc/doc/install.texi 2010-01-21 15:55:24.000000000 +0100 +@@ -2658,6 +2658,10 @@ + @item + @uref{#iq2000-x-elf,,iq2000-*-elf} + @item ++@uref{#lm32-x-elf,,lm32-*-elf} ++@item ++@uref{#lm32-x-uclinux,,lm32-*-uclinux} ++@item + @uref{#m32c-x-elf,,m32c-*-elf} + @item + @uref{#m32r-x-elf,,m32r-*-elf} +@@ -3450,6 +3454,20 @@ + @html +
+ @end html ++@heading @anchor{lm32-x-elf}lm32-*-elf ++Lattice Mico32 processor. ++This configuration is intended for embedded systems. ++ ++@html ++
++@end html ++@heading @anchor{lm32-x-uclinux}lm32-*-uclinux ++Lattice Mico32 processor. ++This configuration is intended for embedded systems running uClinux. ++ ++@html ++
++@end html + @heading @anchor{m32c-x-elf}m32c-*-elf + Renesas M32C processor. + This configuration is intended for embedded systems. +diff -Naur gcc-4.4.3.orig/gcc/doc/invoke.texi gcc-4.4.3/gcc/doc/invoke.texi +--- gcc-4.4.3.orig/gcc/doc/invoke.texi 2009-10-21 17:44:23.000000000 +0200 ++++ gcc-4.4.3/gcc/doc/invoke.texi 2010-01-21 15:55:24.000000000 +0100 +@@ -606,6 +606,10 @@ + -mno-sched-prefer-non-control-spec-insns @gol + -mno-sched-count-spec-in-critical-path} + ++@emph{LM32 Options} ++@gccoptlist{-mbarrel-shift-enabled -mdivide-enabled -mmultiply-enabled @gol ++-msign-extend-enabled -muser-enabled} ++ + @emph{M32R/D Options} + @gccoptlist{-m32r2 -m32rx -m32r @gol + -mdebug @gol +@@ -8854,6 +8858,7 @@ + * i386 and x86-64 Options:: + * i386 and x86-64 Windows Options:: + * IA-64 Options:: ++* LM32 Options:: + * M32C Options:: + * M32R/D Options:: + * M680x0 Options:: +@@ -11838,6 +11843,35 @@ + + @end table + ++@node LM32 Options ++@subsection LM32 Options ++@cindex LM32 options ++ ++These @option{-m} options are defined for the Lattice Mico32 architecture: ++ ++@table @gcctabopt ++@item -mbarrel-shift-enabled ++@opindex mbarrel-shift-enabled ++Enable barrel-shift instructions. ++ ++@item -mdivide-enabled ++@opindex mdivide-enabled ++Enable divide and modulus instructions. ++ ++@item -mmultiply-enabled ++@opindex multiply-enabled ++Enable multiply instructions. ++ ++@item -msign-extend-enabled ++@opindex msign-extend-enabled ++Enable sign extend instructions. ++ ++@item -muser-enabled ++@opindex muser-enabled ++Enable user-defined instructions. ++ ++@end table ++ + @node M32R/D Options + @subsection M32R/D Options + @cindex M32R/D options +diff -Naur gcc-4.4.3.orig/gcc/doc/invoke.texi.orig gcc-4.4.3/gcc/doc/invoke.texi.orig +--- gcc-4.4.3.orig/gcc/doc/invoke.texi.orig 1970-01-01 01:00:00.000000000 +0100 ++++ gcc-4.4.3/gcc/doc/invoke.texi.orig 2010-01-21 15:55:24.000000000 +0100 +@@ -0,0 +1,16650 @@ ++@c Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, ++@c 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 ++@c Free Software Foundation, Inc. ++@c This is part of the GCC manual. ++@c For copying conditions, see the file gcc.texi. ++ ++@ignore ++@c man begin INCLUDE ++@include gcc-vers.texi ++@c man end ++ ++@c man begin COPYRIGHT ++Copyright @copyright{} 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998, ++1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 ++Free Software Foundation, Inc. ++ ++Permission is granted to copy, distribute and/or modify this document ++under the terms of the GNU Free Documentation License, Version 1.2 or ++any later version published by the Free Software Foundation; with the ++Invariant Sections being ``GNU General Public License'' and ``Funding ++Free Software'', the Front-Cover texts being (a) (see below), and with ++the Back-Cover Texts being (b) (see below). A copy of the license is ++included in the gfdl(7) man page. ++ ++(a) The FSF's Front-Cover Text is: ++ ++ A GNU Manual ++ ++(b) The FSF's Back-Cover Text is: ++ ++ You have freedom to copy and modify this GNU Manual, like GNU ++ software. Copies published by the Free Software Foundation raise ++ funds for GNU development. ++@c man end ++@c Set file name and title for the man page. ++@setfilename gcc ++@settitle GNU project C and C++ compiler ++@c man begin SYNOPSIS ++gcc [@option{-c}|@option{-S}|@option{-E}] [@option{-std=}@var{standard}] ++ [@option{-g}] [@option{-pg}] [@option{-O}@var{level}] ++ [@option{-W}@var{warn}@dots{}] [@option{-pedantic}] ++ [@option{-I}@var{dir}@dots{}] [@option{-L}@var{dir}@dots{}] ++ [@option{-D}@var{macro}[=@var{defn}]@dots{}] [@option{-U}@var{macro}] ++ [@option{-f}@var{option}@dots{}] [@option{-m}@var{machine-option}@dots{}] ++ [@option{-o} @var{outfile}] [@@@var{file}] @var{infile}@dots{} ++ ++Only the most useful options are listed here; see below for the ++remainder. @samp{g++} accepts mostly the same options as @samp{gcc}. ++@c man end ++@c man begin SEEALSO ++gpl(7), gfdl(7), fsf-funding(7), ++cpp(1), gcov(1), as(1), ld(1), gdb(1), adb(1), dbx(1), sdb(1) ++and the Info entries for @file{gcc}, @file{cpp}, @file{as}, ++@file{ld}, @file{binutils} and @file{gdb}. ++@c man end ++@c man begin BUGS ++For instructions on reporting bugs, see ++@w{@value{BUGURL}}. ++@c man end ++@c man begin AUTHOR ++See the Info entry for @command{gcc}, or ++@w{@uref{http://gcc.gnu.org/onlinedocs/gcc/Contributors.html}}, ++for contributors to GCC@. ++@c man end ++@end ignore ++ ++@node Invoking GCC ++@chapter GCC Command Options ++@cindex GCC command options ++@cindex command options ++@cindex options, GCC command ++ ++@c man begin DESCRIPTION ++When you invoke GCC, it normally does preprocessing, compilation, ++assembly and linking. The ``overall options'' allow you to stop this ++process at an intermediate stage. For example, the @option{-c} option ++says not to run the linker. Then the output consists of object files ++output by the assembler. ++ ++Other options are passed on to one stage of processing. Some options ++control the preprocessor and others the compiler itself. Yet other ++options control the assembler and linker; most of these are not ++documented here, since you rarely need to use any of them. ++ ++@cindex C compilation options ++Most of the command line options that you can use with GCC are useful ++for C programs; when an option is only useful with another language ++(usually C++), the explanation says so explicitly. If the description ++for a particular option does not mention a source language, you can use ++that option with all supported languages. ++ ++@cindex C++ compilation options ++@xref{Invoking G++,,Compiling C++ Programs}, for a summary of special ++options for compiling C++ programs. ++ ++@cindex grouping options ++@cindex options, grouping ++The @command{gcc} program accepts options and file names as operands. Many ++options have multi-letter names; therefore multiple single-letter options ++may @emph{not} be grouped: @option{-dv} is very different from @w{@samp{-d ++-v}}. ++ ++@cindex order of options ++@cindex options, order ++You can mix options and other arguments. For the most part, the order ++you use doesn't matter. Order does matter when you use several ++options of the same kind; for example, if you specify @option{-L} more ++than once, the directories are searched in the order specified. Also, ++the placement of the @option{-l} option is significant. ++ ++Many options have long names starting with @samp{-f} or with ++@samp{-W}---for example, ++@option{-fmove-loop-invariants}, @option{-Wformat} and so on. Most of ++these have both positive and negative forms; the negative form of ++@option{-ffoo} would be @option{-fno-foo}. This manual documents ++only one of these two forms, whichever one is not the default. ++ ++@c man end ++ ++@xref{Option Index}, for an index to GCC's options. ++ ++@menu ++* Option Summary:: Brief list of all options, without explanations. ++* Overall Options:: Controlling the kind of output: ++ an executable, object files, assembler files, ++ or preprocessed source. ++* Invoking G++:: Compiling C++ programs. ++* C Dialect Options:: Controlling the variant of C language compiled. ++* C++ Dialect Options:: Variations on C++. ++* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C ++ and Objective-C++. ++* Language Independent Options:: Controlling how diagnostics should be ++ formatted. ++* Warning Options:: How picky should the compiler be? ++* Debugging Options:: Symbol tables, measurements, and debugging dumps. ++* Optimize Options:: How much optimization? ++* Preprocessor Options:: Controlling header files and macro definitions. ++ Also, getting dependency information for Make. ++* Assembler Options:: Passing options to the assembler. ++* Link Options:: Specifying libraries and so on. ++* Directory Options:: Where to find header files and libraries. ++ Where to find the compiler executable files. ++* Spec Files:: How to pass switches to sub-processes. ++* Target Options:: Running a cross-compiler, or an old version of GCC. ++* Submodel Options:: Specifying minor hardware or convention variations, ++ such as 68010 vs 68020. ++* Code Gen Options:: Specifying conventions for function calls, data layout ++ and register usage. ++* Environment Variables:: Env vars that affect GCC. ++* Precompiled Headers:: Compiling a header once, and using it many times. ++* Running Protoize:: Automatically adding or removing function prototypes. ++@end menu ++ ++@c man begin OPTIONS ++ ++@node Option Summary ++@section Option Summary ++ ++Here is a summary of all the options, grouped by type. Explanations are ++in the following sections. ++ ++@table @emph ++@item Overall Options ++@xref{Overall Options,,Options Controlling the Kind of Output}. ++@gccoptlist{-c -S -E -o @var{file} -combine -pipe -pass-exit-codes @gol ++-x @var{language} -v -### --help@r{[}=@var{class}@r{[},@dots{}@r{]]} --target-help @gol ++--version -wrapper@@@var{file}} ++ ++@item C Language Options ++@xref{C Dialect Options,,Options Controlling C Dialect}. ++@gccoptlist{-ansi -std=@var{standard} -fgnu89-inline @gol ++-aux-info @var{filename} @gol ++-fno-asm -fno-builtin -fno-builtin-@var{function} @gol ++-fhosted -ffreestanding -fopenmp -fms-extensions @gol ++-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol ++-fallow-single-precision -fcond-mismatch -flax-vector-conversions @gol ++-fsigned-bitfields -fsigned-char @gol ++-funsigned-bitfields -funsigned-char} ++ ++@item C++ Language Options ++@xref{C++ Dialect Options,,Options Controlling C++ Dialect}. ++@gccoptlist{-fabi-version=@var{n} -fno-access-control -fcheck-new @gol ++-fconserve-space -ffriend-injection @gol ++-fno-elide-constructors @gol ++-fno-enforce-eh-specs @gol ++-ffor-scope -fno-for-scope -fno-gnu-keywords @gol ++-fno-implicit-templates @gol ++-fno-implicit-inline-templates @gol ++-fno-implement-inlines -fms-extensions @gol ++-fno-nonansi-builtins -fno-operator-names @gol ++-fno-optional-diags -fpermissive @gol ++-frepo -fno-rtti -fstats -ftemplate-depth-@var{n} @gol ++-fno-threadsafe-statics -fuse-cxa-atexit -fno-weak -nostdinc++ @gol ++-fno-default-inline -fvisibility-inlines-hidden @gol ++-fvisibility-ms-compat @gol ++-Wabi -Wctor-dtor-privacy @gol ++-Wnon-virtual-dtor -Wreorder @gol ++-Weffc++ -Wstrict-null-sentinel @gol ++-Wno-non-template-friend -Wold-style-cast @gol ++-Woverloaded-virtual -Wno-pmf-conversions @gol ++-Wsign-promo} ++ ++@item Objective-C and Objective-C++ Language Options ++@xref{Objective-C and Objective-C++ Dialect Options,,Options Controlling ++Objective-C and Objective-C++ Dialects}. ++@gccoptlist{-fconstant-string-class=@var{class-name} @gol ++-fgnu-runtime -fnext-runtime @gol ++-fno-nil-receivers @gol ++-fobjc-call-cxx-cdtors @gol ++-fobjc-direct-dispatch @gol ++-fobjc-exceptions @gol ++-fobjc-gc @gol ++-freplace-objc-classes @gol ++-fzero-link @gol ++-gen-decls @gol ++-Wassign-intercept @gol ++-Wno-protocol -Wselector @gol ++-Wstrict-selector-match @gol ++-Wundeclared-selector} ++ ++@item Language Independent Options ++@xref{Language Independent Options,,Options to Control Diagnostic Messages Formatting}. ++@gccoptlist{-fmessage-length=@var{n} @gol ++-fdiagnostics-show-location=@r{[}once@r{|}every-line@r{]} @gol ++-fdiagnostics-show-option} ++ ++@item Warning Options ++@xref{Warning Options,,Options to Request or Suppress Warnings}. ++@gccoptlist{-fsyntax-only -pedantic -pedantic-errors @gol ++-w -Wextra -Wall -Waddress -Waggregate-return -Warray-bounds @gol ++-Wno-attributes -Wno-builtin-macro-redefined @gol ++-Wc++-compat -Wc++0x-compat -Wcast-align -Wcast-qual @gol ++-Wchar-subscripts -Wclobbered -Wcomment @gol ++-Wconversion -Wcoverage-mismatch -Wno-deprecated @gol ++-Wno-deprecated-declarations -Wdisabled-optimization @gol ++-Wno-div-by-zero -Wempty-body -Wenum-compare -Wno-endif-labels @gol ++-Werror -Werror=* @gol ++-Wfatal-errors -Wfloat-equal -Wformat -Wformat=2 @gol ++-Wno-format-contains-nul -Wno-format-extra-args -Wformat-nonliteral @gol ++-Wformat-security -Wformat-y2k @gol ++-Wframe-larger-than=@var{len} -Wignored-qualifiers @gol ++-Wimplicit -Wimplicit-function-declaration -Wimplicit-int @gol ++-Winit-self -Winline @gol ++-Wno-int-to-pointer-cast -Wno-invalid-offsetof @gol ++-Winvalid-pch -Wlarger-than=@var{len} -Wunsafe-loop-optimizations @gol ++-Wlogical-op -Wlong-long @gol ++-Wmain -Wmissing-braces -Wmissing-field-initializers @gol ++-Wmissing-format-attribute -Wmissing-include-dirs @gol ++-Wmissing-noreturn -Wno-mudflap @gol ++-Wno-multichar -Wnonnull -Wno-overflow @gol ++-Woverlength-strings -Wpacked -Wpacked-bitfield-compat -Wpadded @gol ++-Wparentheses -Wpedantic-ms-format -Wno-pedantic-ms-format @gol ++-Wpointer-arith -Wno-pointer-to-int-cast @gol ++-Wredundant-decls @gol ++-Wreturn-type -Wsequence-point -Wshadow @gol ++-Wsign-compare -Wsign-conversion -Wstack-protector @gol ++-Wstrict-aliasing -Wstrict-aliasing=n @gol ++-Wstrict-overflow -Wstrict-overflow=@var{n} @gol ++-Wswitch -Wswitch-default -Wswitch-enum -Wsync-nand @gol ++-Wsystem-headers -Wtrigraphs -Wtype-limits -Wundef -Wuninitialized @gol ++-Wunknown-pragmas -Wno-pragmas -Wunreachable-code @gol ++-Wunused -Wunused-function -Wunused-label -Wunused-parameter @gol ++-Wunused-value -Wunused-variable @gol ++-Wvariadic-macros -Wvla @gol ++-Wvolatile-register-var -Wwrite-strings} ++ ++@item C and Objective-C-only Warning Options ++@gccoptlist{-Wbad-function-cast -Wmissing-declarations @gol ++-Wmissing-parameter-type -Wmissing-prototypes -Wnested-externs @gol ++-Wold-style-declaration -Wold-style-definition @gol ++-Wstrict-prototypes -Wtraditional -Wtraditional-conversion @gol ++-Wdeclaration-after-statement -Wpointer-sign} ++ ++@item Debugging Options ++@xref{Debugging Options,,Options for Debugging Your Program or GCC}. ++@gccoptlist{-d@var{letters} -dumpspecs -dumpmachine -dumpversion @gol ++-fdbg-cnt-list -fdbg-cnt=@var{counter-value-list} @gol ++-fdump-noaddr -fdump-unnumbered @gol ++-fdump-translation-unit@r{[}-@var{n}@r{]} @gol ++-fdump-class-hierarchy@r{[}-@var{n}@r{]} @gol ++-fdump-ipa-all -fdump-ipa-cgraph -fdump-ipa-inline @gol ++-fdump-statistics @gol ++-fdump-tree-all @gol ++-fdump-tree-original@r{[}-@var{n}@r{]} @gol ++-fdump-tree-optimized@r{[}-@var{n}@r{]} @gol ++-fdump-tree-cfg -fdump-tree-vcg -fdump-tree-alias @gol ++-fdump-tree-ch @gol ++-fdump-tree-ssa@r{[}-@var{n}@r{]} -fdump-tree-pre@r{[}-@var{n}@r{]} @gol ++-fdump-tree-ccp@r{[}-@var{n}@r{]} -fdump-tree-dce@r{[}-@var{n}@r{]} @gol ++-fdump-tree-gimple@r{[}-raw@r{]} -fdump-tree-mudflap@r{[}-@var{n}@r{]} @gol ++-fdump-tree-dom@r{[}-@var{n}@r{]} @gol ++-fdump-tree-dse@r{[}-@var{n}@r{]} @gol ++-fdump-tree-phiopt@r{[}-@var{n}@r{]} @gol ++-fdump-tree-forwprop@r{[}-@var{n}@r{]} @gol ++-fdump-tree-copyrename@r{[}-@var{n}@r{]} @gol ++-fdump-tree-nrv -fdump-tree-vect @gol ++-fdump-tree-sink @gol ++-fdump-tree-sra@r{[}-@var{n}@r{]} @gol ++-fdump-tree-fre@r{[}-@var{n}@r{]} @gol ++-fdump-tree-vrp@r{[}-@var{n}@r{]} @gol ++-ftree-vectorizer-verbose=@var{n} @gol ++-fdump-tree-storeccp@r{[}-@var{n}@r{]} @gol ++-feliminate-dwarf2-dups -feliminate-unused-debug-types @gol ++-feliminate-unused-debug-symbols -femit-class-debug-always @gol ++-fmem-report -fpre-ipa-mem-report -fpost-ipa-mem-report -fprofile-arcs @gol ++-frandom-seed=@var{string} -fsched-verbose=@var{n} @gol ++-fsel-sched-verbose -fsel-sched-dump-cfg -fsel-sched-pipelining-verbose @gol ++-ftest-coverage -ftime-report -fvar-tracking @gol ++-g -g@var{level} -gcoff -gdwarf-2 @gol ++-ggdb -gstabs -gstabs+ -gvms -gxcoff -gxcoff+ @gol ++-fno-merge-debug-strings -fno-dwarf2-cfi-asm @gol ++-fdebug-prefix-map=@var{old}=@var{new} @gol ++-femit-struct-debug-baseonly -femit-struct-debug-reduced @gol ++-femit-struct-debug-detailed@r{[}=@var{spec-list}@r{]} @gol ++-p -pg -print-file-name=@var{library} -print-libgcc-file-name @gol ++-print-multi-directory -print-multi-lib @gol ++-print-prog-name=@var{program} -print-search-dirs -Q @gol ++-print-sysroot -print-sysroot-headers-suffix @gol ++-save-temps -time} ++ ++@item Optimization Options ++@xref{Optimize Options,,Options that Control Optimization}. ++@gccoptlist{ ++-falign-functions[=@var{n}] -falign-jumps[=@var{n}] @gol ++-falign-labels[=@var{n}] -falign-loops[=@var{n}] -fassociative-math @gol ++-fauto-inc-dec -fbranch-probabilities -fbranch-target-load-optimize @gol ++-fbranch-target-load-optimize2 -fbtr-bb-exclusive -fcaller-saves @gol ++-fcheck-data-deps -fconserve-stack -fcprop-registers -fcrossjumping @gol ++-fcse-follow-jumps -fcse-skip-blocks -fcx-fortran-rules -fcx-limited-range @gol ++-fdata-sections -fdce -fdce @gol ++-fdelayed-branch -fdelete-null-pointer-checks -fdse -fdse @gol ++-fearly-inlining -fexpensive-optimizations -ffast-math @gol ++-ffinite-math-only -ffloat-store -fforward-propagate @gol ++-ffunction-sections -fgcse -fgcse-after-reload -fgcse-las -fgcse-lm @gol ++-fgcse-sm -fif-conversion -fif-conversion2 -findirect-inlining @gol ++-finline-functions -finline-functions-called-once -finline-limit=@var{n} @gol ++-finline-small-functions -fipa-cp -fipa-cp-clone -fipa-matrix-reorg -fipa-pta @gol ++-fipa-pure-const -fipa-reference -fipa-struct-reorg @gol ++-fipa-type-escape -fira-algorithm=@var{algorithm} @gol ++-fira-region=@var{region} -fira-coalesce -fno-ira-share-save-slots @gol ++-fno-ira-share-spill-slots -fira-verbose=@var{n} @gol ++-fivopts -fkeep-inline-functions -fkeep-static-consts @gol ++-floop-block -floop-interchange -floop-strip-mine @gol ++-fmerge-all-constants -fmerge-constants -fmodulo-sched @gol ++-fmodulo-sched-allow-regmoves -fmove-loop-invariants -fmudflap @gol ++-fmudflapir -fmudflapth -fno-branch-count-reg -fno-default-inline @gol ++-fno-defer-pop -fno-function-cse -fno-guess-branch-probability @gol ++-fno-inline -fno-math-errno -fno-peephole -fno-peephole2 @gol ++-fno-sched-interblock -fno-sched-spec -fno-signed-zeros @gol ++-fno-toplevel-reorder -fno-trapping-math -fno-zero-initialized-in-bss @gol ++-fomit-frame-pointer -foptimize-register-move -foptimize-sibling-calls @gol ++-fpeel-loops -fpredictive-commoning -fprefetch-loop-arrays @gol ++-fprofile-correction -fprofile-dir=@var{path} -fprofile-generate @gol ++-fprofile-generate=@var{path} @gol ++-fprofile-use -fprofile-use=@var{path} -fprofile-values @gol ++-freciprocal-math -fregmove -frename-registers -freorder-blocks @gol ++-freorder-blocks-and-partition -freorder-functions @gol ++-frerun-cse-after-loop -freschedule-modulo-scheduled-loops @gol ++-frounding-math -frtl-abstract-sequences -fsched2-use-superblocks @gol ++-fsched2-use-traces -fsched-spec-load -fsched-spec-load-dangerous @gol ++-fsched-stalled-insns-dep[=@var{n}] -fsched-stalled-insns[=@var{n}] @gol ++-fschedule-insns -fschedule-insns2 -fsection-anchors -fsee @gol ++-fselective-scheduling -fselective-scheduling2 @gol ++-fsel-sched-pipelining -fsel-sched-pipelining-outer-loops @gol ++-fsignaling-nans -fsingle-precision-constant -fsplit-ivs-in-unroller @gol ++-fsplit-wide-types -fstack-protector -fstack-protector-all @gol ++-fstrict-aliasing -fstrict-overflow -fthread-jumps -ftracer @gol ++-ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop @gol ++-ftree-copyrename -ftree-dce @gol ++-ftree-dominator-opts -ftree-dse -ftree-fre -ftree-loop-im @gol ++-ftree-loop-distribution @gol ++-ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol ++-ftree-parallelize-loops=@var{n} -ftree-pre -ftree-reassoc @gol ++-ftree-sink -ftree-sra -ftree-switch-conversion @gol ++-ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp @gol ++-funit-at-a-time -funroll-all-loops -funroll-loops @gol ++-funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops @gol ++-fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb @gol ++-fwhole-program @gol ++--param @var{name}=@var{value} ++-O -O0 -O1 -O2 -O3 -Os} ++ ++@item Preprocessor Options ++@xref{Preprocessor Options,,Options Controlling the Preprocessor}. ++@gccoptlist{-A@var{question}=@var{answer} @gol ++-A-@var{question}@r{[}=@var{answer}@r{]} @gol ++-C -dD -dI -dM -dN @gol ++-D@var{macro}@r{[}=@var{defn}@r{]} -E -H @gol ++-idirafter @var{dir} @gol ++-include @var{file} -imacros @var{file} @gol ++-iprefix @var{file} -iwithprefix @var{dir} @gol ++-iwithprefixbefore @var{dir} -isystem @var{dir} @gol ++-imultilib @var{dir} -isysroot @var{dir} @gol ++-M -MM -MF -MG -MP -MQ -MT -nostdinc @gol ++-P -fworking-directory -remap @gol ++-trigraphs -undef -U@var{macro} -Wp,@var{option} @gol ++-Xpreprocessor @var{option}} ++ ++@item Assembler Option ++@xref{Assembler Options,,Passing Options to the Assembler}. ++@gccoptlist{-Wa,@var{option} -Xassembler @var{option}} ++ ++@item Linker Options ++@xref{Link Options,,Options for Linking}. ++@gccoptlist{@var{object-file-name} -l@var{library} @gol ++-nostartfiles -nodefaultlibs -nostdlib -pie -rdynamic @gol ++-s -static -static-libgcc -shared -shared-libgcc -symbolic @gol ++-T @var{script} -Wl,@var{option} -Xlinker @var{option} @gol ++-u @var{symbol}} ++ ++@item Directory Options ++@xref{Directory Options,,Options for Directory Search}. ++@gccoptlist{-B@var{prefix} -I@var{dir} -iquote@var{dir} -L@var{dir} ++-specs=@var{file} -I- --sysroot=@var{dir}} ++ ++@item Target Options ++@c I wrote this xref this way to avoid overfull hbox. -- rms ++@xref{Target Options}. ++@gccoptlist{-V @var{version} -b @var{machine}} ++ ++@item Machine Dependent Options ++@xref{Submodel Options,,Hardware Models and Configurations}. ++@c This list is ordered alphanumerically by subsection name. ++@c Try and put the significant identifier (CPU or system) first, ++@c so users have a clue at guessing where the ones they want will be. ++ ++@emph{ARC Options} ++@gccoptlist{-EB -EL @gol ++-mmangle-cpu -mcpu=@var{cpu} -mtext=@var{text-section} @gol ++-mdata=@var{data-section} -mrodata=@var{readonly-data-section}} ++ ++@emph{ARM Options} ++@gccoptlist{-mapcs-frame -mno-apcs-frame @gol ++-mabi=@var{name} @gol ++-mapcs-stack-check -mno-apcs-stack-check @gol ++-mapcs-float -mno-apcs-float @gol ++-mapcs-reentrant -mno-apcs-reentrant @gol ++-msched-prolog -mno-sched-prolog @gol ++-mlittle-endian -mbig-endian -mwords-little-endian @gol ++-mfloat-abi=@var{name} -msoft-float -mhard-float -mfpe @gol ++-mthumb-interwork -mno-thumb-interwork @gol ++-mcpu=@var{name} -march=@var{name} -mfpu=@var{name} @gol ++-mstructure-size-boundary=@var{n} @gol ++-mabort-on-noreturn @gol ++-mlong-calls -mno-long-calls @gol ++-msingle-pic-base -mno-single-pic-base @gol ++-mpic-register=@var{reg} @gol ++-mnop-fun-dllimport @gol ++-mcirrus-fix-invalid-insns -mno-cirrus-fix-invalid-insns @gol ++-mpoke-function-name @gol ++-mthumb -marm @gol ++-mtpcs-frame -mtpcs-leaf-frame @gol ++-mcaller-super-interworking -mcallee-super-interworking @gol ++-mtp=@var{name} @gol ++-mword-relocations @gol ++-mfix-cortex-m3-ldrd} ++ ++@emph{AVR Options} ++@gccoptlist{-mmcu=@var{mcu} -msize -mno-interrupts @gol ++-mcall-prologues -mno-tablejump -mtiny-stack -mint8} ++ ++@emph{Blackfin Options} ++@gccoptlist{-mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @gol ++-msim -momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol ++-mspecld-anomaly -mno-specld-anomaly -mcsync-anomaly -mno-csync-anomaly @gol ++-mlow-64k -mno-low64k -mstack-check-l1 -mid-shared-library @gol ++-mno-id-shared-library -mshared-library-id=@var{n} @gol ++-mleaf-id-shared-library -mno-leaf-id-shared-library @gol ++-msep-data -mno-sep-data -mlong-calls -mno-long-calls @gol ++-mfast-fp -minline-plt -mmulticore -mcorea -mcoreb -msdram @gol ++-micplb} ++ ++@emph{CRIS Options} ++@gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol ++-mmax-stack-frame=@var{n} -melinux-stacksize=@var{n} @gol ++-metrax4 -metrax100 -mpdebug -mcc-init -mno-side-effects @gol ++-mstack-align -mdata-align -mconst-align @gol ++-m32-bit -m16-bit -m8-bit -mno-prologue-epilogue -mno-gotplt @gol ++-melf -maout -melinux -mlinux -sim -sim2 @gol ++-mmul-bug-workaround -mno-mul-bug-workaround} ++ ++@emph{CRX Options} ++@gccoptlist{-mmac -mpush-args} ++ ++@emph{Darwin Options} ++@gccoptlist{-all_load -allowable_client -arch -arch_errors_fatal @gol ++-arch_only -bind_at_load -bundle -bundle_loader @gol ++-client_name -compatibility_version -current_version @gol ++-dead_strip @gol ++-dependency-file -dylib_file -dylinker_install_name @gol ++-dynamic -dynamiclib -exported_symbols_list @gol ++-filelist -flat_namespace -force_cpusubtype_ALL @gol ++-force_flat_namespace -headerpad_max_install_names @gol ++-iframework @gol ++-image_base -init -install_name -keep_private_externs @gol ++-multi_module -multiply_defined -multiply_defined_unused @gol ++-noall_load -no_dead_strip_inits_and_terms @gol ++-nofixprebinding -nomultidefs -noprebind -noseglinkedit @gol ++-pagezero_size -prebind -prebind_all_twolevel_modules @gol ++-private_bundle -read_only_relocs -sectalign @gol ++-sectobjectsymbols -whyload -seg1addr @gol ++-sectcreate -sectobjectsymbols -sectorder @gol ++-segaddr -segs_read_only_addr -segs_read_write_addr @gol ++-seg_addr_table -seg_addr_table_filename -seglinkedit @gol ++-segprot -segs_read_only_addr -segs_read_write_addr @gol ++-single_module -static -sub_library -sub_umbrella @gol ++-twolevel_namespace -umbrella -undefined @gol ++-unexported_symbols_list -weak_reference_mismatches @gol ++-whatsloaded -F -gused -gfull -mmacosx-version-min=@var{version} @gol ++-mkernel -mone-byte-bool} ++ ++@emph{DEC Alpha Options} ++@gccoptlist{-mno-fp-regs -msoft-float -malpha-as -mgas @gol ++-mieee -mieee-with-inexact -mieee-conformant @gol ++-mfp-trap-mode=@var{mode} -mfp-rounding-mode=@var{mode} @gol ++-mtrap-precision=@var{mode} -mbuild-constants @gol ++-mcpu=@var{cpu-type} -mtune=@var{cpu-type} @gol ++-mbwx -mmax -mfix -mcix @gol ++-mfloat-vax -mfloat-ieee @gol ++-mexplicit-relocs -msmall-data -mlarge-data @gol ++-msmall-text -mlarge-text @gol ++-mmemory-latency=@var{time}} ++ ++@emph{DEC Alpha/VMS Options} ++@gccoptlist{-mvms-return-codes} ++ ++@emph{FR30 Options} ++@gccoptlist{-msmall-model -mno-lsim} ++ ++@emph{FRV Options} ++@gccoptlist{-mgpr-32 -mgpr-64 -mfpr-32 -mfpr-64 @gol ++-mhard-float -msoft-float @gol ++-malloc-cc -mfixed-cc -mdword -mno-dword @gol ++-mdouble -mno-double @gol ++-mmedia -mno-media -mmuladd -mno-muladd @gol ++-mfdpic -minline-plt -mgprel-ro -multilib-library-pic @gol ++-mlinked-fp -mlong-calls -malign-labels @gol ++-mlibrary-pic -macc-4 -macc-8 @gol ++-mpack -mno-pack -mno-eflags -mcond-move -mno-cond-move @gol ++-moptimize-membar -mno-optimize-membar @gol ++-mscc -mno-scc -mcond-exec -mno-cond-exec @gol ++-mvliw-branch -mno-vliw-branch @gol ++-mmulti-cond-exec -mno-multi-cond-exec -mnested-cond-exec @gol ++-mno-nested-cond-exec -mtomcat-stats @gol ++-mTLS -mtls @gol ++-mcpu=@var{cpu}} ++ ++@emph{GNU/Linux Options} ++@gccoptlist{-muclibc} ++ ++@emph{H8/300 Options} ++@gccoptlist{-mrelax -mh -ms -mn -mint32 -malign-300} ++ ++@emph{HPPA Options} ++@gccoptlist{-march=@var{architecture-type} @gol ++-mbig-switch -mdisable-fpregs -mdisable-indexing @gol ++-mfast-indirect-calls -mgas -mgnu-ld -mhp-ld @gol ++-mfixed-range=@var{register-range} @gol ++-mjump-in-delay -mlinker-opt -mlong-calls @gol ++-mlong-load-store -mno-big-switch -mno-disable-fpregs @gol ++-mno-disable-indexing -mno-fast-indirect-calls -mno-gas @gol ++-mno-jump-in-delay -mno-long-load-store @gol ++-mno-portable-runtime -mno-soft-float @gol ++-mno-space-regs -msoft-float -mpa-risc-1-0 @gol ++-mpa-risc-1-1 -mpa-risc-2-0 -mportable-runtime @gol ++-mschedule=@var{cpu-type} -mspace-regs -msio -mwsio @gol ++-munix=@var{unix-std} -nolibdld -static -threads} ++ ++@emph{i386 and x86-64 Options} ++@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol ++-mfpmath=@var{unit} @gol ++-masm=@var{dialect} -mno-fancy-math-387 @gol ++-mno-fp-ret-in-387 -msoft-float @gol ++-mno-wide-multiply -mrtd -malign-double @gol ++-mpreferred-stack-boundary=@var{num} ++-mincoming-stack-boundary=@var{num} ++-mcld -mcx16 -msahf -mrecip @gol ++-mmmx -msse -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx @gol ++-maes -mpclmul @gol ++-msse4a -m3dnow -mpopcnt -mabm -msse5 @gol ++-mthreads -mno-align-stringops -minline-all-stringops @gol ++-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol ++-mpush-args -maccumulate-outgoing-args -m128bit-long-double @gol ++-m96bit-long-double -mregparm=@var{num} -msseregparm @gol ++-mveclibabi=@var{type} -mpc32 -mpc64 -mpc80 -mstackrealign @gol ++-momit-leaf-frame-pointer -mno-red-zone -mno-tls-direct-seg-refs @gol ++-mcmodel=@var{code-model} @gol ++-m32 -m64 -mlarge-data-threshold=@var{num} @gol ++-mfused-madd -mno-fused-madd -msse2avx} ++ ++@emph{IA-64 Options} ++@gccoptlist{-mbig-endian -mlittle-endian -mgnu-as -mgnu-ld -mno-pic @gol ++-mvolatile-asm-stop -mregister-names -mno-sdata @gol ++-mconstant-gp -mauto-pic -minline-float-divide-min-latency @gol ++-minline-float-divide-max-throughput @gol ++-minline-int-divide-min-latency @gol ++-minline-int-divide-max-throughput @gol ++-minline-sqrt-min-latency -minline-sqrt-max-throughput @gol ++-mno-dwarf2-asm -mearly-stop-bits @gol ++-mfixed-range=@var{register-range} -mtls-size=@var{tls-size} @gol ++-mtune=@var{cpu-type} -mt -pthread -milp32 -mlp64 @gol ++-mno-sched-br-data-spec -msched-ar-data-spec -mno-sched-control-spec @gol ++-msched-br-in-data-spec -msched-ar-in-data-spec -msched-in-control-spec @gol ++-msched-ldc -mno-sched-control-ldc -mno-sched-spec-verbose @gol ++-mno-sched-prefer-non-data-spec-insns @gol ++-mno-sched-prefer-non-control-spec-insns @gol ++-mno-sched-count-spec-in-critical-path} ++ ++@emph{M32R/D Options} ++@gccoptlist{-m32r2 -m32rx -m32r @gol ++-mdebug @gol ++-malign-loops -mno-align-loops @gol ++-missue-rate=@var{number} @gol ++-mbranch-cost=@var{number} @gol ++-mmodel=@var{code-size-model-type} @gol ++-msdata=@var{sdata-type} @gol ++-mno-flush-func -mflush-func=@var{name} @gol ++-mno-flush-trap -mflush-trap=@var{number} @gol ++-G @var{num}} ++ ++@emph{M32C Options} ++@gccoptlist{-mcpu=@var{cpu} -msim -memregs=@var{number}} ++ ++@emph{M680x0 Options} ++@gccoptlist{-march=@var{arch} -mcpu=@var{cpu} -mtune=@var{tune} ++-m68000 -m68020 -m68020-40 -m68020-60 -m68030 -m68040 @gol ++-m68060 -mcpu32 -m5200 -m5206e -m528x -m5307 -m5407 @gol ++-mcfv4e -mbitfield -mno-bitfield -mc68000 -mc68020 @gol ++-mnobitfield -mrtd -mno-rtd -mdiv -mno-div -mshort @gol ++-mno-short -mhard-float -m68881 -msoft-float -mpcrel @gol ++-malign-int -mstrict-align -msep-data -mno-sep-data @gol ++-mshared-library-id=n -mid-shared-library -mno-id-shared-library @gol ++-mxgot -mno-xgot} ++ ++@emph{M68hc1x Options} ++@gccoptlist{-m6811 -m6812 -m68hc11 -m68hc12 -m68hcs12 @gol ++-mauto-incdec -minmax -mlong-calls -mshort @gol ++-msoft-reg-count=@var{count}} ++ ++@emph{MCore Options} ++@gccoptlist{-mhardlit -mno-hardlit -mdiv -mno-div -mrelax-immediates @gol ++-mno-relax-immediates -mwide-bitfields -mno-wide-bitfields @gol ++-m4byte-functions -mno-4byte-functions -mcallgraph-data @gol ++-mno-callgraph-data -mslow-bytes -mno-slow-bytes -mno-lsim @gol ++-mlittle-endian -mbig-endian -m210 -m340 -mstack-increment} ++ ++@emph{MIPS Options} ++@gccoptlist{-EL -EB -march=@var{arch} -mtune=@var{arch} @gol ++-mips1 -mips2 -mips3 -mips4 -mips32 -mips32r2 @gol ++-mips64 -mips64r2 @gol ++-mips16 -mno-mips16 -mflip-mips16 @gol ++-minterlink-mips16 -mno-interlink-mips16 @gol ++-mabi=@var{abi} -mabicalls -mno-abicalls @gol ++-mshared -mno-shared -mplt -mno-plt -mxgot -mno-xgot @gol ++-mgp32 -mgp64 -mfp32 -mfp64 -mhard-float -msoft-float @gol ++-msingle-float -mdouble-float -mdsp -mno-dsp -mdspr2 -mno-dspr2 @gol ++-mfpu=@var{fpu-type} @gol ++-msmartmips -mno-smartmips @gol ++-mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol ++-mips3d -mno-mips3d -mmt -mno-mt -mllsc -mno-llsc @gol ++-mlong64 -mlong32 -msym32 -mno-sym32 @gol ++-G@var{num} -mlocal-sdata -mno-local-sdata @gol ++-mextern-sdata -mno-extern-sdata -mgpopt -mno-gopt @gol ++-membedded-data -mno-embedded-data @gol ++-muninit-const-in-rodata -mno-uninit-const-in-rodata @gol ++-mcode-readable=@var{setting} @gol ++-msplit-addresses -mno-split-addresses @gol ++-mexplicit-relocs -mno-explicit-relocs @gol ++-mcheck-zero-division -mno-check-zero-division @gol ++-mdivide-traps -mdivide-breaks @gol ++-mmemcpy -mno-memcpy -mlong-calls -mno-long-calls @gol ++-mmad -mno-mad -mfused-madd -mno-fused-madd -nocpp @gol ++-mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol ++-mfix-r10000 -mno-fix-r10000 -mfix-vr4120 -mno-fix-vr4120 @gol ++-mfix-vr4130 -mno-fix-vr4130 -mfix-sb1 -mno-fix-sb1 @gol ++-mflush-func=@var{func} -mno-flush-func @gol ++-mbranch-cost=@var{num} -mbranch-likely -mno-branch-likely @gol ++-mfp-exceptions -mno-fp-exceptions @gol ++-mvr4130-align -mno-vr4130-align} ++ ++@emph{MMIX Options} ++@gccoptlist{-mlibfuncs -mno-libfuncs -mepsilon -mno-epsilon -mabi=gnu @gol ++-mabi=mmixware -mzero-extend -mknuthdiv -mtoplevel-symbols @gol ++-melf -mbranch-predict -mno-branch-predict -mbase-addresses @gol ++-mno-base-addresses -msingle-exit -mno-single-exit} ++ ++@emph{MN10300 Options} ++@gccoptlist{-mmult-bug -mno-mult-bug @gol ++-mam33 -mno-am33 @gol ++-mam33-2 -mno-am33-2 @gol ++-mreturn-pointer-on-d0 @gol ++-mno-crt0 -mrelax} ++ ++@emph{PDP-11 Options} ++@gccoptlist{-mfpu -msoft-float -mac0 -mno-ac0 -m40 -m45 -m10 @gol ++-mbcopy -mbcopy-builtin -mint32 -mno-int16 @gol ++-mint16 -mno-int32 -mfloat32 -mno-float64 @gol ++-mfloat64 -mno-float32 -mabshi -mno-abshi @gol ++-mbranch-expensive -mbranch-cheap @gol ++-msplit -mno-split -munix-asm -mdec-asm} ++ ++@emph{picoChip Options} ++@gccoptlist{-mae=@var{ae_type} -mvliw-lookahead=@var{N} ++-msymbol-as-address -mno-inefficient-warnings} ++ ++@emph{PowerPC Options} ++See RS/6000 and PowerPC Options. ++ ++@emph{RS/6000 and PowerPC Options} ++@gccoptlist{-mcpu=@var{cpu-type} @gol ++-mtune=@var{cpu-type} @gol ++-mpower -mno-power -mpower2 -mno-power2 @gol ++-mpowerpc -mpowerpc64 -mno-powerpc @gol ++-maltivec -mno-altivec @gol ++-mpowerpc-gpopt -mno-powerpc-gpopt @gol ++-mpowerpc-gfxopt -mno-powerpc-gfxopt @gol ++-mmfcrf -mno-mfcrf -mpopcntb -mno-popcntb -mfprnd -mno-fprnd @gol ++-mcmpb -mno-cmpb -mmfpgpr -mno-mfpgpr -mhard-dfp -mno-hard-dfp @gol ++-mnew-mnemonics -mold-mnemonics @gol ++-mfull-toc -mminimal-toc -mno-fp-in-toc -mno-sum-in-toc @gol ++-m64 -m32 -mxl-compat -mno-xl-compat -mpe @gol ++-malign-power -malign-natural @gol ++-msoft-float -mhard-float -mmultiple -mno-multiple @gol ++-msingle-float -mdouble-float -msimple-fpu @gol ++-mstring -mno-string -mupdate -mno-update @gol ++-mavoid-indexed-addresses -mno-avoid-indexed-addresses @gol ++-mfused-madd -mno-fused-madd -mbit-align -mno-bit-align @gol ++-mstrict-align -mno-strict-align -mrelocatable @gol ++-mno-relocatable -mrelocatable-lib -mno-relocatable-lib @gol ++-mtoc -mno-toc -mlittle -mlittle-endian -mbig -mbig-endian @gol ++-mdynamic-no-pic -maltivec -mswdiv @gol ++-mprioritize-restricted-insns=@var{priority} @gol ++-msched-costly-dep=@var{dependence_type} @gol ++-minsert-sched-nops=@var{scheme} @gol ++-mcall-sysv -mcall-netbsd @gol ++-maix-struct-return -msvr4-struct-return @gol ++-mabi=@var{abi-type} -msecure-plt -mbss-plt @gol ++-misel -mno-isel @gol ++-misel=yes -misel=no @gol ++-mspe -mno-spe @gol ++-mspe=yes -mspe=no @gol ++-mpaired @gol ++-mgen-cell-microcode -mwarn-cell-microcode @gol ++-mvrsave -mno-vrsave @gol ++-mmulhw -mno-mulhw @gol ++-mdlmzb -mno-dlmzb @gol ++-mfloat-gprs=yes -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double @gol ++-mprototype -mno-prototype @gol ++-msim -mmvme -mads -myellowknife -memb -msdata @gol ++-msdata=@var{opt} -mvxworks -G @var{num} -pthread} ++ ++@emph{S/390 and zSeries Options} ++@gccoptlist{-mtune=@var{cpu-type} -march=@var{cpu-type} @gol ++-mhard-float -msoft-float -mhard-dfp -mno-hard-dfp @gol ++-mlong-double-64 -mlong-double-128 @gol ++-mbackchain -mno-backchain -mpacked-stack -mno-packed-stack @gol ++-msmall-exec -mno-small-exec -mmvcle -mno-mvcle @gol ++-m64 -m31 -mdebug -mno-debug -mesa -mzarch @gol ++-mtpf-trace -mno-tpf-trace -mfused-madd -mno-fused-madd @gol ++-mwarn-framesize -mwarn-dynamicstack -mstack-size -mstack-guard} ++ ++@emph{Score Options} ++@gccoptlist{-meb -mel @gol ++-mnhwloop @gol ++-muls @gol ++-mmac @gol ++-mscore5 -mscore5u -mscore7 -mscore7d} ++ ++@emph{SH Options} ++@gccoptlist{-m1 -m2 -m2e -m3 -m3e @gol ++-m4-nofpu -m4-single-only -m4-single -m4 @gol ++-m4a-nofpu -m4a-single-only -m4a-single -m4a -m4al @gol ++-m5-64media -m5-64media-nofpu @gol ++-m5-32media -m5-32media-nofpu @gol ++-m5-compact -m5-compact-nofpu @gol ++-mb -ml -mdalign -mrelax @gol ++-mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave @gol ++-mieee -mbitops -misize -minline-ic_invalidate -mpadstruct -mspace @gol ++-mprefergot -musermode -multcost=@var{number} -mdiv=@var{strategy} @gol ++-mdivsi3_libfunc=@var{name} -mfixed-range=@var{register-range} @gol ++-madjust-unroll -mindexed-addressing -mgettrcost=@var{number} -mpt-fixed @gol ++-minvalid-symbols} ++ ++@emph{SPARC Options} ++@gccoptlist{-mcpu=@var{cpu-type} @gol ++-mtune=@var{cpu-type} @gol ++-mcmodel=@var{code-model} @gol ++-m32 -m64 -mapp-regs -mno-app-regs @gol ++-mfaster-structs -mno-faster-structs @gol ++-mfpu -mno-fpu -mhard-float -msoft-float @gol ++-mhard-quad-float -msoft-quad-float @gol ++-mimpure-text -mno-impure-text -mlittle-endian @gol ++-mstack-bias -mno-stack-bias @gol ++-munaligned-doubles -mno-unaligned-doubles @gol ++-mv8plus -mno-v8plus -mvis -mno-vis ++-threads -pthreads -pthread} ++ ++@emph{SPU Options} ++@gccoptlist{-mwarn-reloc -merror-reloc @gol ++-msafe-dma -munsafe-dma @gol ++-mbranch-hints @gol ++-msmall-mem -mlarge-mem -mstdmain @gol ++-mfixed-range=@var{register-range}} ++ ++@emph{System V Options} ++@gccoptlist{-Qy -Qn -YP,@var{paths} -Ym,@var{dir}} ++ ++@emph{V850 Options} ++@gccoptlist{-mlong-calls -mno-long-calls -mep -mno-ep @gol ++-mprolog-function -mno-prolog-function -mspace @gol ++-mtda=@var{n} -msda=@var{n} -mzda=@var{n} @gol ++-mapp-regs -mno-app-regs @gol ++-mdisable-callt -mno-disable-callt @gol ++-mv850e1 @gol ++-mv850e @gol ++-mv850 -mbig-switch} ++ ++@emph{VAX Options} ++@gccoptlist{-mg -mgnu -munix} ++ ++@emph{VxWorks Options} ++@gccoptlist{-mrtp -non-static -Bstatic -Bdynamic @gol ++-Xbind-lazy -Xbind-now} ++ ++@emph{x86-64 Options} ++See i386 and x86-64 Options. ++ ++@emph{i386 and x86-64 Windows Options} ++@gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll ++-mnop-fun-dllimport -mthread -mwin32 -mwindows} ++ ++@emph{Xstormy16 Options} ++@gccoptlist{-msim} ++ ++@emph{Xtensa Options} ++@gccoptlist{-mconst16 -mno-const16 @gol ++-mfused-madd -mno-fused-madd @gol ++-mserialize-volatile -mno-serialize-volatile @gol ++-mtext-section-literals -mno-text-section-literals @gol ++-mtarget-align -mno-target-align @gol ++-mlongcalls -mno-longcalls} ++ ++@emph{zSeries Options} ++See S/390 and zSeries Options. ++ ++@item Code Generation Options ++@xref{Code Gen Options,,Options for Code Generation Conventions}. ++@gccoptlist{-fcall-saved-@var{reg} -fcall-used-@var{reg} @gol ++-ffixed-@var{reg} -fexceptions @gol ++-fnon-call-exceptions -funwind-tables @gol ++-fasynchronous-unwind-tables @gol ++-finhibit-size-directive -finstrument-functions @gol ++-finstrument-functions-exclude-function-list=@var{sym},@var{sym},@dots{} @gol ++-finstrument-functions-exclude-file-list=@var{file},@var{file},@dots{} @gol ++-fno-common -fno-ident @gol ++-fpcc-struct-return -fpic -fPIC -fpie -fPIE @gol ++-fno-jump-tables @gol ++-frecord-gcc-switches @gol ++-freg-struct-return -fshort-enums @gol ++-fshort-double -fshort-wchar @gol ++-fverbose-asm -fpack-struct[=@var{n}] -fstack-check @gol ++-fstack-limit-register=@var{reg} -fstack-limit-symbol=@var{sym} @gol ++-fno-stack-limit -fargument-alias -fargument-noalias @gol ++-fargument-noalias-global -fargument-noalias-anything @gol ++-fleading-underscore -ftls-model=@var{model} @gol ++-ftrapv -fwrapv -fbounds-check @gol ++-fvisibility} ++@end table ++ ++@menu ++* Overall Options:: Controlling the kind of output: ++ an executable, object files, assembler files, ++ or preprocessed source. ++* C Dialect Options:: Controlling the variant of C language compiled. ++* C++ Dialect Options:: Variations on C++. ++* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C ++ and Objective-C++. ++* Language Independent Options:: Controlling how diagnostics should be ++ formatted. ++* Warning Options:: How picky should the compiler be? ++* Debugging Options:: Symbol tables, measurements, and debugging dumps. ++* Optimize Options:: How much optimization? ++* Preprocessor Options:: Controlling header files and macro definitions. ++ Also, getting dependency information for Make. ++* Assembler Options:: Passing options to the assembler. ++* Link Options:: Specifying libraries and so on. ++* Directory Options:: Where to find header files and libraries. ++ Where to find the compiler executable files. ++* Spec Files:: How to pass switches to sub-processes. ++* Target Options:: Running a cross-compiler, or an old version of GCC. ++@end menu ++ ++@node Overall Options ++@section Options Controlling the Kind of Output ++ ++Compilation can involve up to four stages: preprocessing, compilation ++proper, assembly and linking, always in that order. GCC is capable of ++preprocessing and compiling several files either into several ++assembler input files, or into one assembler input file; then each ++assembler input file produces an object file, and linking combines all ++the object files (those newly compiled, and those specified as input) ++into an executable file. ++ ++@cindex file name suffix ++For any given input file, the file name suffix determines what kind of ++compilation is done: ++ ++@table @gcctabopt ++@item @var{file}.c ++C source code which must be preprocessed. ++ ++@item @var{file}.i ++C source code which should not be preprocessed. ++ ++@item @var{file}.ii ++C++ source code which should not be preprocessed. ++ ++@item @var{file}.m ++Objective-C source code. Note that you must link with the @file{libobjc} ++library to make an Objective-C program work. ++ ++@item @var{file}.mi ++Objective-C source code which should not be preprocessed. ++ ++@item @var{file}.mm ++@itemx @var{file}.M ++Objective-C++ source code. Note that you must link with the @file{libobjc} ++library to make an Objective-C++ program work. Note that @samp{.M} refers ++to a literal capital M@. ++ ++@item @var{file}.mii ++Objective-C++ source code which should not be preprocessed. ++ ++@item @var{file}.h ++C, C++, Objective-C or Objective-C++ header file to be turned into a ++precompiled header. ++ ++@item @var{file}.cc ++@itemx @var{file}.cp ++@itemx @var{file}.cxx ++@itemx @var{file}.cpp ++@itemx @var{file}.CPP ++@itemx @var{file}.c++ ++@itemx @var{file}.C ++C++ source code which must be preprocessed. Note that in @samp{.cxx}, ++the last two letters must both be literally @samp{x}. Likewise, ++@samp{.C} refers to a literal capital C@. ++ ++@item @var{file}.mm ++@itemx @var{file}.M ++Objective-C++ source code which must be preprocessed. ++ ++@item @var{file}.mii ++Objective-C++ source code which should not be preprocessed. ++ ++@item @var{file}.hh ++@itemx @var{file}.H ++@itemx @var{file}.hp ++@itemx @var{file}.hxx ++@itemx @var{file}.hpp ++@itemx @var{file}.HPP ++@itemx @var{file}.h++ ++@itemx @var{file}.tcc ++C++ header file to be turned into a precompiled header. ++ ++@item @var{file}.f ++@itemx @var{file}.for ++@itemx @var{file}.ftn ++Fixed form Fortran source code which should not be preprocessed. ++ ++@item @var{file}.F ++@itemx @var{file}.FOR ++@itemx @var{file}.fpp ++@itemx @var{file}.FPP ++@itemx @var{file}.FTN ++Fixed form Fortran source code which must be preprocessed (with the traditional ++preprocessor). ++ ++@item @var{file}.f90 ++@itemx @var{file}.f95 ++@itemx @var{file}.f03 ++@itemx @var{file}.f08 ++Free form Fortran source code which should not be preprocessed. ++ ++@item @var{file}.F90 ++@itemx @var{file}.F95 ++@itemx @var{file}.F03 ++@itemx @var{file}.F08 ++Free form Fortran source code which must be preprocessed (with the ++traditional preprocessor). ++ ++@c FIXME: Descriptions of Java file types. ++@c @var{file}.java ++@c @var{file}.class ++@c @var{file}.zip ++@c @var{file}.jar ++ ++@item @var{file}.ads ++Ada source code file which contains a library unit declaration (a ++declaration of a package, subprogram, or generic, or a generic ++instantiation), or a library unit renaming declaration (a package, ++generic, or subprogram renaming declaration). Such files are also ++called @dfn{specs}. ++ ++@item @var{file}.adb ++Ada source code file containing a library unit body (a subprogram or ++package body). Such files are also called @dfn{bodies}. ++ ++@c GCC also knows about some suffixes for languages not yet included: ++@c Pascal: ++@c @var{file}.p ++@c @var{file}.pas ++@c Ratfor: ++@c @var{file}.r ++ ++@item @var{file}.s ++Assembler code. ++ ++@item @var{file}.S ++@itemx @var{file}.sx ++Assembler code which must be preprocessed. ++ ++@item @var{other} ++An object file to be fed straight into linking. ++Any file name with no recognized suffix is treated this way. ++@end table ++ ++@opindex x ++You can specify the input language explicitly with the @option{-x} option: ++ ++@table @gcctabopt ++@item -x @var{language} ++Specify explicitly the @var{language} for the following input files ++(rather than letting the compiler choose a default based on the file ++name suffix). This option applies to all following input files until ++the next @option{-x} option. Possible values for @var{language} are: ++@smallexample ++c c-header c-cpp-output ++c++ c++-header c++-cpp-output ++objective-c objective-c-header objective-c-cpp-output ++objective-c++ objective-c++-header objective-c++-cpp-output ++assembler assembler-with-cpp ++ada ++f77 f77-cpp-input f95 f95-cpp-input ++java ++@end smallexample ++ ++@item -x none ++Turn off any specification of a language, so that subsequent files are ++handled according to their file name suffixes (as they are if @option{-x} ++has not been used at all). ++ ++@item -pass-exit-codes ++@opindex pass-exit-codes ++Normally the @command{gcc} program will exit with the code of 1 if any ++phase of the compiler returns a non-success return code. If you specify ++@option{-pass-exit-codes}, the @command{gcc} program will instead return with ++numerically highest error produced by any phase that returned an error ++indication. The C, C++, and Fortran frontends return 4, if an internal ++compiler error is encountered. ++@end table ++ ++If you only want some of the stages of compilation, you can use ++@option{-x} (or filename suffixes) to tell @command{gcc} where to start, and ++one of the options @option{-c}, @option{-S}, or @option{-E} to say where ++@command{gcc} is to stop. Note that some combinations (for example, ++@samp{-x cpp-output -E}) instruct @command{gcc} to do nothing at all. ++ ++@table @gcctabopt ++@item -c ++@opindex c ++Compile or assemble the source files, but do not link. The linking ++stage simply is not done. The ultimate output is in the form of an ++object file for each source file. ++ ++By default, the object file name for a source file is made by replacing ++the suffix @samp{.c}, @samp{.i}, @samp{.s}, etc., with @samp{.o}. ++ ++Unrecognized input files, not requiring compilation or assembly, are ++ignored. ++ ++@item -S ++@opindex S ++Stop after the stage of compilation proper; do not assemble. The output ++is in the form of an assembler code file for each non-assembler input ++file specified. ++ ++By default, the assembler file name for a source file is made by ++replacing the suffix @samp{.c}, @samp{.i}, etc., with @samp{.s}. ++ ++Input files that don't require compilation are ignored. ++ ++@item -E ++@opindex E ++Stop after the preprocessing stage; do not run the compiler proper. The ++output is in the form of preprocessed source code, which is sent to the ++standard output. ++ ++Input files which don't require preprocessing are ignored. ++ ++@cindex output file option ++@item -o @var{file} ++@opindex o ++Place output in file @var{file}. This applies regardless to whatever ++sort of output is being produced, whether it be an executable file, ++an object file, an assembler file or preprocessed C code. ++ ++If @option{-o} is not specified, the default is to put an executable ++file in @file{a.out}, the object file for ++@file{@var{source}.@var{suffix}} in @file{@var{source}.o}, its ++assembler file in @file{@var{source}.s}, a precompiled header file in ++@file{@var{source}.@var{suffix}.gch}, and all preprocessed C source on ++standard output. ++ ++@item -v ++@opindex v ++Print (on standard error output) the commands executed to run the stages ++of compilation. Also print the version number of the compiler driver ++program and of the preprocessor and the compiler proper. ++ ++@item -### ++@opindex ### ++Like @option{-v} except the commands are not executed and all command ++arguments are quoted. This is useful for shell scripts to capture the ++driver-generated command lines. ++ ++@item -pipe ++@opindex pipe ++Use pipes rather than temporary files for communication between the ++various stages of compilation. This fails to work on some systems where ++the assembler is unable to read from a pipe; but the GNU assembler has ++no trouble. ++ ++@item -combine ++@opindex combine ++If you are compiling multiple source files, this option tells the driver ++to pass all the source files to the compiler at once (for those ++languages for which the compiler can handle this). This will allow ++intermodule analysis (IMA) to be performed by the compiler. Currently the only ++language for which this is supported is C@. If you pass source files for ++multiple languages to the driver, using this option, the driver will invoke ++the compiler(s) that support IMA once each, passing each compiler all the ++source files appropriate for it. For those languages that do not support ++IMA this option will be ignored, and the compiler will be invoked once for ++each source file in that language. If you use this option in conjunction ++with @option{-save-temps}, the compiler will generate multiple ++pre-processed files ++(one for each source file), but only one (combined) @file{.o} or ++@file{.s} file. ++ ++@item --help ++@opindex help ++Print (on the standard output) a description of the command line options ++understood by @command{gcc}. If the @option{-v} option is also specified ++then @option{--help} will also be passed on to the various processes ++invoked by @command{gcc}, so that they can display the command line options ++they accept. If the @option{-Wextra} option has also been specified ++(prior to the @option{--help} option), then command line options which ++have no documentation associated with them will also be displayed. ++ ++@item --target-help ++@opindex target-help ++Print (on the standard output) a description of target-specific command ++line options for each tool. For some targets extra target-specific ++information may also be printed. ++ ++@item --help=@{@var{class}@r{|[}^@r{]}@var{qualifier}@}@r{[},@dots{}@r{]} ++Print (on the standard output) a description of the command line ++options understood by the compiler that fit into all specified classes ++and qualifiers. These are the supported classes: ++ ++@table @asis ++@item @samp{optimizers} ++This will display all of the optimization options supported by the ++compiler. ++ ++@item @samp{warnings} ++This will display all of the options controlling warning messages ++produced by the compiler. ++ ++@item @samp{target} ++This will display target-specific options. Unlike the ++@option{--target-help} option however, target-specific options of the ++linker and assembler will not be displayed. This is because those ++tools do not currently support the extended @option{--help=} syntax. ++ ++@item @samp{params} ++This will display the values recognized by the @option{--param} ++option. ++ ++@item @var{language} ++This will display the options supported for @var{language}, where ++@var{language} is the name of one of the languages supported in this ++version of GCC. ++ ++@item @samp{common} ++This will display the options that are common to all languages. ++@end table ++ ++These are the supported qualifiers: ++ ++@table @asis ++@item @samp{undocumented} ++Display only those options which are undocumented. ++ ++@item @samp{joined} ++Display options which take an argument that appears after an equal ++sign in the same continuous piece of text, such as: ++@samp{--help=target}. ++ ++@item @samp{separate} ++Display options which take an argument that appears as a separate word ++following the original option, such as: @samp{-o output-file}. ++@end table ++ ++Thus for example to display all the undocumented target-specific ++switches supported by the compiler the following can be used: ++ ++@smallexample ++--help=target,undocumented ++@end smallexample ++ ++The sense of a qualifier can be inverted by prefixing it with the ++@samp{^} character, so for example to display all binary warning ++options (i.e., ones that are either on or off and that do not take an ++argument), which have a description the following can be used: ++ ++@smallexample ++--help=warnings,^joined,^undocumented ++@end smallexample ++ ++The argument to @option{--help=} should not consist solely of inverted ++qualifiers. ++ ++Combining several classes is possible, although this usually ++restricts the output by so much that there is nothing to display. One ++case where it does work however is when one of the classes is ++@var{target}. So for example to display all the target-specific ++optimization options the following can be used: ++ ++@smallexample ++--help=target,optimizers ++@end smallexample ++ ++The @option{--help=} option can be repeated on the command line. Each ++successive use will display its requested class of options, skipping ++those that have already been displayed. ++ ++If the @option{-Q} option appears on the command line before the ++@option{--help=} option, then the descriptive text displayed by ++@option{--help=} is changed. Instead of describing the displayed ++options, an indication is given as to whether the option is enabled, ++disabled or set to a specific value (assuming that the compiler ++knows this at the point where the @option{--help=} option is used). ++ ++Here is a truncated example from the ARM port of @command{gcc}: ++ ++@smallexample ++ % gcc -Q -mabi=2 --help=target -c ++ The following options are target specific: ++ -mabi= 2 ++ -mabort-on-noreturn [disabled] ++ -mapcs [disabled] ++@end smallexample ++ ++The output is sensitive to the effects of previous command line ++options, so for example it is possible to find out which optimizations ++are enabled at @option{-O2} by using: ++ ++@smallexample ++-Q -O2 --help=optimizers ++@end smallexample ++ ++Alternatively you can discover which binary optimizations are enabled ++by @option{-O3} by using: ++ ++@smallexample ++gcc -c -Q -O3 --help=optimizers > /tmp/O3-opts ++gcc -c -Q -O2 --help=optimizers > /tmp/O2-opts ++diff /tmp/O2-opts /tmp/O3-opts | grep enabled ++@end smallexample ++ ++@item --version ++@opindex version ++Display the version number and copyrights of the invoked GCC@. ++ ++@item -wrapper ++@opindex wrapper ++Invoke all subcommands under a wrapper program. It takes a single ++comma separated list as an argument, which will be used to invoke ++the wrapper: ++ ++@smallexample ++gcc -c t.c -wrapper gdb,--args ++@end smallexample ++ ++This will invoke all subprograms of gcc under "gdb --args", ++thus cc1 invocation will be "gdb --args cc1 ...". ++ ++@include @value{srcdir}/../libiberty/at-file.texi ++@end table ++ ++@node Invoking G++ ++@section Compiling C++ Programs ++ ++@cindex suffixes for C++ source ++@cindex C++ source file suffixes ++C++ source files conventionally use one of the suffixes @samp{.C}, ++@samp{.cc}, @samp{.cpp}, @samp{.CPP}, @samp{.c++}, @samp{.cp}, or ++@samp{.cxx}; C++ header files often use @samp{.hh}, @samp{.hpp}, ++@samp{.H}, or (for shared template code) @samp{.tcc}; and ++preprocessed C++ files use the suffix @samp{.ii}. GCC recognizes ++files with these names and compiles them as C++ programs even if you ++call the compiler the same way as for compiling C programs (usually ++with the name @command{gcc}). ++ ++@findex g++ ++@findex c++ ++However, the use of @command{gcc} does not add the C++ library. ++@command{g++} is a program that calls GCC and treats @samp{.c}, ++@samp{.h} and @samp{.i} files as C++ source files instead of C source ++files unless @option{-x} is used, and automatically specifies linking ++against the C++ library. This program is also useful when ++precompiling a C header file with a @samp{.h} extension for use in C++ ++compilations. On many systems, @command{g++} is also installed with ++the name @command{c++}. ++ ++@cindex invoking @command{g++} ++When you compile C++ programs, you may specify many of the same ++command-line options that you use for compiling programs in any ++language; or command-line options meaningful for C and related ++languages; or options that are meaningful only for C++ programs. ++@xref{C Dialect Options,,Options Controlling C Dialect}, for ++explanations of options for languages related to C@. ++@xref{C++ Dialect Options,,Options Controlling C++ Dialect}, for ++explanations of options that are meaningful only for C++ programs. ++ ++@node C Dialect Options ++@section Options Controlling C Dialect ++@cindex dialect options ++@cindex language dialect options ++@cindex options, dialect ++ ++The following options control the dialect of C (or languages derived ++from C, such as C++, Objective-C and Objective-C++) that the compiler ++accepts: ++ ++@table @gcctabopt ++@cindex ANSI support ++@cindex ISO support ++@item -ansi ++@opindex ansi ++In C mode, this is equivalent to @samp{-std=c89}. In C++ mode, it is ++equivalent to @samp{-std=c++98}. ++ ++This turns off certain features of GCC that are incompatible with ISO ++C90 (when compiling C code), or of standard C++ (when compiling C++ code), ++such as the @code{asm} and @code{typeof} keywords, and ++predefined macros such as @code{unix} and @code{vax} that identify the ++type of system you are using. It also enables the undesirable and ++rarely used ISO trigraph feature. For the C compiler, ++it disables recognition of C++ style @samp{//} comments as well as ++the @code{inline} keyword. ++ ++The alternate keywords @code{__asm__}, @code{__extension__}, ++@code{__inline__} and @code{__typeof__} continue to work despite ++@option{-ansi}. You would not want to use them in an ISO C program, of ++course, but it is useful to put them in header files that might be included ++in compilations done with @option{-ansi}. Alternate predefined macros ++such as @code{__unix__} and @code{__vax__} are also available, with or ++without @option{-ansi}. ++ ++The @option{-ansi} option does not cause non-ISO programs to be ++rejected gratuitously. For that, @option{-pedantic} is required in ++addition to @option{-ansi}. @xref{Warning Options}. ++ ++The macro @code{__STRICT_ANSI__} is predefined when the @option{-ansi} ++option is used. Some header files may notice this macro and refrain ++from declaring certain functions or defining certain macros that the ++ISO standard doesn't call for; this is to avoid interfering with any ++programs that might use these names for other things. ++ ++Functions that would normally be built in but do not have semantics ++defined by ISO C (such as @code{alloca} and @code{ffs}) are not built-in ++functions when @option{-ansi} is used. @xref{Other Builtins,,Other ++built-in functions provided by GCC}, for details of the functions ++affected. ++ ++@item -std= ++@opindex std ++Determine the language standard. @xref{Standards,,Language Standards ++Supported by GCC}, for details of these standard versions. This option ++is currently only supported when compiling C or C++. ++ ++The compiler can accept several base standards, such as @samp{c89} or ++@samp{c++98}, and GNU dialects of those standards, such as ++@samp{gnu89} or @samp{gnu++98}. By specifying a base standard, the ++compiler will accept all programs following that standard and those ++using GNU extensions that do not contradict it. For example, ++@samp{-std=c89} turns off certain features of GCC that are ++incompatible with ISO C90, such as the @code{asm} and @code{typeof} ++keywords, but not other GNU extensions that do not have a meaning in ++ISO C90, such as omitting the middle term of a @code{?:} ++expression. On the other hand, by specifying a GNU dialect of a ++standard, all features the compiler support are enabled, even when ++those features change the meaning of the base standard and some ++strict-conforming programs may be rejected. The particular standard ++is used by @option{-pedantic} to identify which features are GNU ++extensions given that version of the standard. For example ++@samp{-std=gnu89 -pedantic} would warn about C++ style @samp{//} ++comments, while @samp{-std=gnu99 -pedantic} would not. ++ ++A value for this option must be provided; possible values are ++ ++@table @samp ++@item c89 ++@itemx iso9899:1990 ++Support all ISO C90 programs (certain GNU extensions that conflict ++with ISO C90 are disabled). Same as @option{-ansi} for C code. ++ ++@item iso9899:199409 ++ISO C90 as modified in amendment 1. ++ ++@item c99 ++@itemx c9x ++@itemx iso9899:1999 ++@itemx iso9899:199x ++ISO C99. Note that this standard is not yet fully supported; see ++@w{@uref{http://gcc.gnu.org/gcc-4.4/c99status.html}} for more information. The ++names @samp{c9x} and @samp{iso9899:199x} are deprecated. ++ ++@item gnu89 ++GNU dialect of ISO C90 (including some C99 features). This ++is the default for C code. ++ ++@item gnu99 ++@itemx gnu9x ++GNU dialect of ISO C99. When ISO C99 is fully implemented in GCC, ++this will become the default. The name @samp{gnu9x} is deprecated. ++ ++@item c++98 ++The 1998 ISO C++ standard plus amendments. Same as @option{-ansi} for ++C++ code. ++ ++@item gnu++98 ++GNU dialect of @option{-std=c++98}. This is the default for ++C++ code. ++ ++@item c++0x ++The working draft of the upcoming ISO C++0x standard. This option ++enables experimental features that are likely to be included in ++C++0x. The working draft is constantly changing, and any feature that is ++enabled by this flag may be removed from future versions of GCC if it is ++not part of the C++0x standard. ++ ++@item gnu++0x ++GNU dialect of @option{-std=c++0x}. This option enables ++experimental features that may be removed in future versions of GCC. ++@end table ++ ++@item -fgnu89-inline ++@opindex fgnu89-inline ++The option @option{-fgnu89-inline} tells GCC to use the traditional ++GNU semantics for @code{inline} functions when in C99 mode. ++@xref{Inline,,An Inline Function is As Fast As a Macro}. This option ++is accepted and ignored by GCC versions 4.1.3 up to but not including ++4.3. In GCC versions 4.3 and later it changes the behavior of GCC in ++C99 mode. Using this option is roughly equivalent to adding the ++@code{gnu_inline} function attribute to all inline functions ++(@pxref{Function Attributes}). ++ ++The option @option{-fno-gnu89-inline} explicitly tells GCC to use the ++C99 semantics for @code{inline} when in C99 or gnu99 mode (i.e., it ++specifies the default behavior). This option was first supported in ++GCC 4.3. This option is not supported in C89 or gnu89 mode. ++ ++The preprocessor macros @code{__GNUC_GNU_INLINE__} and ++@code{__GNUC_STDC_INLINE__} may be used to check which semantics are ++in effect for @code{inline} functions. @xref{Common Predefined ++Macros,,,cpp,The C Preprocessor}. ++ ++@item -aux-info @var{filename} ++@opindex aux-info ++Output to the given filename prototyped declarations for all functions ++declared and/or defined in a translation unit, including those in header ++files. This option is silently ignored in any language other than C@. ++ ++Besides declarations, the file indicates, in comments, the origin of ++each declaration (source file and line), whether the declaration was ++implicit, prototyped or unprototyped (@samp{I}, @samp{N} for new or ++@samp{O} for old, respectively, in the first character after the line ++number and the colon), and whether it came from a declaration or a ++definition (@samp{C} or @samp{F}, respectively, in the following ++character). In the case of function definitions, a K&R-style list of ++arguments followed by their declarations is also provided, inside ++comments, after the declaration. ++ ++@item -fno-asm ++@opindex fno-asm ++Do not recognize @code{asm}, @code{inline} or @code{typeof} as a ++keyword, so that code can use these words as identifiers. You can use ++the keywords @code{__asm__}, @code{__inline__} and @code{__typeof__} ++instead. @option{-ansi} implies @option{-fno-asm}. ++ ++In C++, this switch only affects the @code{typeof} keyword, since ++@code{asm} and @code{inline} are standard keywords. You may want to ++use the @option{-fno-gnu-keywords} flag instead, which has the same ++effect. In C99 mode (@option{-std=c99} or @option{-std=gnu99}), this ++switch only affects the @code{asm} and @code{typeof} keywords, since ++@code{inline} is a standard keyword in ISO C99. ++ ++@item -fno-builtin ++@itemx -fno-builtin-@var{function} ++@opindex fno-builtin ++@cindex built-in functions ++Don't recognize built-in functions that do not begin with ++@samp{__builtin_} as prefix. @xref{Other Builtins,,Other built-in ++functions provided by GCC}, for details of the functions affected, ++including those which are not built-in functions when @option{-ansi} or ++@option{-std} options for strict ISO C conformance are used because they ++do not have an ISO standard meaning. ++ ++GCC normally generates special code to handle certain built-in functions ++more efficiently; for instance, calls to @code{alloca} may become single ++instructions that adjust the stack directly, and calls to @code{memcpy} ++may become inline copy loops. The resulting code is often both smaller ++and faster, but since the function calls no longer appear as such, you ++cannot set a breakpoint on those calls, nor can you change the behavior ++of the functions by linking with a different library. In addition, ++when a function is recognized as a built-in function, GCC may use ++information about that function to warn about problems with calls to ++that function, or to generate more efficient code, even if the ++resulting code still contains calls to that function. For example, ++warnings are given with @option{-Wformat} for bad calls to ++@code{printf}, when @code{printf} is built in, and @code{strlen} is ++known not to modify global memory. ++ ++With the @option{-fno-builtin-@var{function}} option ++only the built-in function @var{function} is ++disabled. @var{function} must not begin with @samp{__builtin_}. If a ++function is named that is not built-in in this version of GCC, this ++option is ignored. There is no corresponding ++@option{-fbuiltin-@var{function}} option; if you wish to enable ++built-in functions selectively when using @option{-fno-builtin} or ++@option{-ffreestanding}, you may define macros such as: ++ ++@smallexample ++#define abs(n) __builtin_abs ((n)) ++#define strcpy(d, s) __builtin_strcpy ((d), (s)) ++@end smallexample ++ ++@item -fhosted ++@opindex fhosted ++@cindex hosted environment ++ ++Assert that compilation takes place in a hosted environment. This implies ++@option{-fbuiltin}. A hosted environment is one in which the ++entire standard library is available, and in which @code{main} has a return ++type of @code{int}. Examples are nearly everything except a kernel. ++This is equivalent to @option{-fno-freestanding}. ++ ++@item -ffreestanding ++@opindex ffreestanding ++@cindex hosted environment ++ ++Assert that compilation takes place in a freestanding environment. This ++implies @option{-fno-builtin}. A freestanding environment ++is one in which the standard library may not exist, and program startup may ++not necessarily be at @code{main}. The most obvious example is an OS kernel. ++This is equivalent to @option{-fno-hosted}. ++ ++@xref{Standards,,Language Standards Supported by GCC}, for details of ++freestanding and hosted environments. ++ ++@item -fopenmp ++@opindex fopenmp ++@cindex openmp parallel ++Enable handling of OpenMP directives @code{#pragma omp} in C/C++ and ++@code{!$omp} in Fortran. When @option{-fopenmp} is specified, the ++compiler generates parallel code according to the OpenMP Application ++Program Interface v2.5 @w{@uref{http://www.openmp.org/}}. This option ++implies @option{-pthread}, and thus is only supported on targets that ++have support for @option{-pthread}. ++ ++@item -fms-extensions ++@opindex fms-extensions ++Accept some non-standard constructs used in Microsoft header files. ++ ++Some cases of unnamed fields in structures and unions are only ++accepted with this option. @xref{Unnamed Fields,,Unnamed struct/union ++fields within structs/unions}, for details. ++ ++@item -trigraphs ++@opindex trigraphs ++Support ISO C trigraphs. The @option{-ansi} option (and @option{-std} ++options for strict ISO C conformance) implies @option{-trigraphs}. ++ ++@item -no-integrated-cpp ++@opindex no-integrated-cpp ++Performs a compilation in two passes: preprocessing and compiling. This ++option allows a user supplied "cc1", "cc1plus", or "cc1obj" via the ++@option{-B} option. The user supplied compilation step can then add in ++an additional preprocessing step after normal preprocessing but before ++compiling. The default is to use the integrated cpp (internal cpp) ++ ++The semantics of this option will change if "cc1", "cc1plus", and ++"cc1obj" are merged. ++ ++@cindex traditional C language ++@cindex C language, traditional ++@item -traditional ++@itemx -traditional-cpp ++@opindex traditional-cpp ++@opindex traditional ++Formerly, these options caused GCC to attempt to emulate a pre-standard ++C compiler. They are now only supported with the @option{-E} switch. ++The preprocessor continues to support a pre-standard mode. See the GNU ++CPP manual for details. ++ ++@item -fcond-mismatch ++@opindex fcond-mismatch ++Allow conditional expressions with mismatched types in the second and ++third arguments. The value of such an expression is void. This option ++is not supported for C++. ++ ++@item -flax-vector-conversions ++@opindex flax-vector-conversions ++Allow implicit conversions between vectors with differing numbers of ++elements and/or incompatible element types. This option should not be ++used for new code. ++ ++@item -funsigned-char ++@opindex funsigned-char ++Let the type @code{char} be unsigned, like @code{unsigned char}. ++ ++Each kind of machine has a default for what @code{char} should ++be. It is either like @code{unsigned char} by default or like ++@code{signed char} by default. ++ ++Ideally, a portable program should always use @code{signed char} or ++@code{unsigned char} when it depends on the signedness of an object. ++But many programs have been written to use plain @code{char} and ++expect it to be signed, or expect it to be unsigned, depending on the ++machines they were written for. This option, and its inverse, let you ++make such a program work with the opposite default. ++ ++The type @code{char} is always a distinct type from each of ++@code{signed char} or @code{unsigned char}, even though its behavior ++is always just like one of those two. ++ ++@item -fsigned-char ++@opindex fsigned-char ++Let the type @code{char} be signed, like @code{signed char}. ++ ++Note that this is equivalent to @option{-fno-unsigned-char}, which is ++the negative form of @option{-funsigned-char}. Likewise, the option ++@option{-fno-signed-char} is equivalent to @option{-funsigned-char}. ++ ++@item -fsigned-bitfields ++@itemx -funsigned-bitfields ++@itemx -fno-signed-bitfields ++@itemx -fno-unsigned-bitfields ++@opindex fsigned-bitfields ++@opindex funsigned-bitfields ++@opindex fno-signed-bitfields ++@opindex fno-unsigned-bitfields ++These options control whether a bit-field is signed or unsigned, when the ++declaration does not use either @code{signed} or @code{unsigned}. By ++default, such a bit-field is signed, because this is consistent: the ++basic integer types such as @code{int} are signed types. ++@end table ++ ++@node C++ Dialect Options ++@section Options Controlling C++ Dialect ++ ++@cindex compiler options, C++ ++@cindex C++ options, command line ++@cindex options, C++ ++This section describes the command-line options that are only meaningful ++for C++ programs; but you can also use most of the GNU compiler options ++regardless of what language your program is in. For example, you ++might compile a file @code{firstClass.C} like this: ++ ++@smallexample ++g++ -g -frepo -O -c firstClass.C ++@end smallexample ++ ++@noindent ++In this example, only @option{-frepo} is an option meant ++only for C++ programs; you can use the other options with any ++language supported by GCC@. ++ ++Here is a list of options that are @emph{only} for compiling C++ programs: ++ ++@table @gcctabopt ++ ++@item -fabi-version=@var{n} ++@opindex fabi-version ++Use version @var{n} of the C++ ABI@. Version 2 is the version of the ++C++ ABI that first appeared in G++ 3.4. Version 1 is the version of ++the C++ ABI that first appeared in G++ 3.2. Version 0 will always be ++the version that conforms most closely to the C++ ABI specification. ++Therefore, the ABI obtained using version 0 will change as ABI bugs ++are fixed. ++ ++The default is version 2. ++ ++@item -fno-access-control ++@opindex fno-access-control ++Turn off all access checking. This switch is mainly useful for working ++around bugs in the access control code. ++ ++@item -fcheck-new ++@opindex fcheck-new ++Check that the pointer returned by @code{operator new} is non-null ++before attempting to modify the storage allocated. This check is ++normally unnecessary because the C++ standard specifies that ++@code{operator new} will only return @code{0} if it is declared ++@samp{throw()}, in which case the compiler will always check the ++return value even without this option. In all other cases, when ++@code{operator new} has a non-empty exception specification, memory ++exhaustion is signalled by throwing @code{std::bad_alloc}. See also ++@samp{new (nothrow)}. ++ ++@item -fconserve-space ++@opindex fconserve-space ++Put uninitialized or runtime-initialized global variables into the ++common segment, as C does. This saves space in the executable at the ++cost of not diagnosing duplicate definitions. If you compile with this ++flag and your program mysteriously crashes after @code{main()} has ++completed, you may have an object that is being destroyed twice because ++two definitions were merged. ++ ++This option is no longer useful on most targets, now that support has ++been added for putting variables into BSS without making them common. ++ ++@item -fno-deduce-init-list ++@opindex fno-deduce-init-list ++Disable deduction of a template type parameter as ++std::initializer_list from a brace-enclosed initializer list, i.e. ++ ++@smallexample ++template auto forward(T t) -> decltype (realfn (t)) ++@{ ++ return realfn (t); ++@} ++ ++void f() ++@{ ++ forward(@{1,2@}); // call forward> ++@} ++@end smallexample ++ ++This option is present because this deduction is an extension to the ++current specification in the C++0x working draft, and there was ++some concern about potential overload resolution problems. ++ ++@item -ffriend-injection ++@opindex ffriend-injection ++Inject friend functions into the enclosing namespace, so that they are ++visible outside the scope of the class in which they are declared. ++Friend functions were documented to work this way in the old Annotated ++C++ Reference Manual, and versions of G++ before 4.1 always worked ++that way. However, in ISO C++ a friend function which is not declared ++in an enclosing scope can only be found using argument dependent ++lookup. This option causes friends to be injected as they were in ++earlier releases. ++ ++This option is for compatibility, and may be removed in a future ++release of G++. ++ ++@item -fno-elide-constructors ++@opindex fno-elide-constructors ++The C++ standard allows an implementation to omit creating a temporary ++which is only used to initialize another object of the same type. ++Specifying this option disables that optimization, and forces G++ to ++call the copy constructor in all cases. ++ ++@item -fno-enforce-eh-specs ++@opindex fno-enforce-eh-specs ++Don't generate code to check for violation of exception specifications ++at runtime. This option violates the C++ standard, but may be useful ++for reducing code size in production builds, much like defining ++@samp{NDEBUG}. This does not give user code permission to throw ++exceptions in violation of the exception specifications; the compiler ++will still optimize based on the specifications, so throwing an ++unexpected exception will result in undefined behavior. ++ ++@item -ffor-scope ++@itemx -fno-for-scope ++@opindex ffor-scope ++@opindex fno-for-scope ++If @option{-ffor-scope} is specified, the scope of variables declared in ++a @i{for-init-statement} is limited to the @samp{for} loop itself, ++as specified by the C++ standard. ++If @option{-fno-for-scope} is specified, the scope of variables declared in ++a @i{for-init-statement} extends to the end of the enclosing scope, ++as was the case in old versions of G++, and other (traditional) ++implementations of C++. ++ ++The default if neither flag is given to follow the standard, ++but to allow and give a warning for old-style code that would ++otherwise be invalid, or have different behavior. ++ ++@item -fno-gnu-keywords ++@opindex fno-gnu-keywords ++Do not recognize @code{typeof} as a keyword, so that code can use this ++word as an identifier. You can use the keyword @code{__typeof__} instead. ++@option{-ansi} implies @option{-fno-gnu-keywords}. ++ ++@item -fno-implicit-templates ++@opindex fno-implicit-templates ++Never emit code for non-inline templates which are instantiated ++implicitly (i.e.@: by use); only emit code for explicit instantiations. ++@xref{Template Instantiation}, for more information. ++ ++@item -fno-implicit-inline-templates ++@opindex fno-implicit-inline-templates ++Don't emit code for implicit instantiations of inline templates, either. ++The default is to handle inlines differently so that compiles with and ++without optimization will need the same set of explicit instantiations. ++ ++@item -fno-implement-inlines ++@opindex fno-implement-inlines ++To save space, do not emit out-of-line copies of inline functions ++controlled by @samp{#pragma implementation}. This will cause linker ++errors if these functions are not inlined everywhere they are called. ++ ++@item -fms-extensions ++@opindex fms-extensions ++Disable pedantic warnings about constructs used in MFC, such as implicit ++int and getting a pointer to member function via non-standard syntax. ++ ++@item -fno-nonansi-builtins ++@opindex fno-nonansi-builtins ++Disable built-in declarations of functions that are not mandated by ++ANSI/ISO C@. These include @code{ffs}, @code{alloca}, @code{_exit}, ++@code{index}, @code{bzero}, @code{conjf}, and other related functions. ++ ++@item -fno-operator-names ++@opindex fno-operator-names ++Do not treat the operator name keywords @code{and}, @code{bitand}, ++@code{bitor}, @code{compl}, @code{not}, @code{or} and @code{xor} as ++synonyms as keywords. ++ ++@item -fno-optional-diags ++@opindex fno-optional-diags ++Disable diagnostics that the standard says a compiler does not need to ++issue. Currently, the only such diagnostic issued by G++ is the one for ++a name having multiple meanings within a class. ++ ++@item -fpermissive ++@opindex fpermissive ++Downgrade some diagnostics about nonconformant code from errors to ++warnings. Thus, using @option{-fpermissive} will allow some ++nonconforming code to compile. ++ ++@item -frepo ++@opindex frepo ++Enable automatic template instantiation at link time. This option also ++implies @option{-fno-implicit-templates}. @xref{Template ++Instantiation}, for more information. ++ ++@item -fno-rtti ++@opindex fno-rtti ++Disable generation of information about every class with virtual ++functions for use by the C++ runtime type identification features ++(@samp{dynamic_cast} and @samp{typeid}). If you don't use those parts ++of the language, you can save some space by using this flag. Note that ++exception handling uses the same information, but it will generate it as ++needed. The @samp{dynamic_cast} operator can still be used for casts that ++do not require runtime type information, i.e.@: casts to @code{void *} or to ++unambiguous base classes. ++ ++@item -fstats ++@opindex fstats ++Emit statistics about front-end processing at the end of the compilation. ++This information is generally only useful to the G++ development team. ++ ++@item -ftemplate-depth-@var{n} ++@opindex ftemplate-depth ++Set the maximum instantiation depth for template classes to @var{n}. ++A limit on the template instantiation depth is needed to detect ++endless recursions during template class instantiation. ANSI/ISO C++ ++conforming programs must not rely on a maximum depth greater than 17. ++ ++@item -fno-threadsafe-statics ++@opindex fno-threadsafe-statics ++Do not emit the extra code to use the routines specified in the C++ ++ABI for thread-safe initialization of local statics. You can use this ++option to reduce code size slightly in code that doesn't need to be ++thread-safe. ++ ++@item -fuse-cxa-atexit ++@opindex fuse-cxa-atexit ++Register destructors for objects with static storage duration with the ++@code{__cxa_atexit} function rather than the @code{atexit} function. ++This option is required for fully standards-compliant handling of static ++destructors, but will only work if your C library supports ++@code{__cxa_atexit}. ++ ++@item -fno-use-cxa-get-exception-ptr ++@opindex fno-use-cxa-get-exception-ptr ++Don't use the @code{__cxa_get_exception_ptr} runtime routine. This ++will cause @code{std::uncaught_exception} to be incorrect, but is necessary ++if the runtime routine is not available. ++ ++@item -fvisibility-inlines-hidden ++@opindex fvisibility-inlines-hidden ++This switch declares that the user does not attempt to compare ++pointers to inline methods where the addresses of the two functions ++were taken in different shared objects. ++ ++The effect of this is that GCC may, effectively, mark inline methods with ++@code{__attribute__ ((visibility ("hidden")))} so that they do not ++appear in the export table of a DSO and do not require a PLT indirection ++when used within the DSO@. Enabling this option can have a dramatic effect ++on load and link times of a DSO as it massively reduces the size of the ++dynamic export table when the library makes heavy use of templates. ++ ++The behavior of this switch is not quite the same as marking the ++methods as hidden directly, because it does not affect static variables ++local to the function or cause the compiler to deduce that ++the function is defined in only one shared object. ++ ++You may mark a method as having a visibility explicitly to negate the ++effect of the switch for that method. For example, if you do want to ++compare pointers to a particular inline method, you might mark it as ++having default visibility. Marking the enclosing class with explicit ++visibility will have no effect. ++ ++Explicitly instantiated inline methods are unaffected by this option ++as their linkage might otherwise cross a shared library boundary. ++@xref{Template Instantiation}. ++ ++@item -fvisibility-ms-compat ++@opindex fvisibility-ms-compat ++This flag attempts to use visibility settings to make GCC's C++ ++linkage model compatible with that of Microsoft Visual Studio. ++ ++The flag makes these changes to GCC's linkage model: ++ ++@enumerate ++@item ++It sets the default visibility to @code{hidden}, like ++@option{-fvisibility=hidden}. ++ ++@item ++Types, but not their members, are not hidden by default. ++ ++@item ++The One Definition Rule is relaxed for types without explicit ++visibility specifications which are defined in more than one different ++shared object: those declarations are permitted if they would have ++been permitted when this option was not used. ++@end enumerate ++ ++In new code it is better to use @option{-fvisibility=hidden} and ++export those classes which are intended to be externally visible. ++Unfortunately it is possible for code to rely, perhaps accidentally, ++on the Visual Studio behavior. ++ ++Among the consequences of these changes are that static data members ++of the same type with the same name but defined in different shared ++objects will be different, so changing one will not change the other; ++and that pointers to function members defined in different shared ++objects may not compare equal. When this flag is given, it is a ++violation of the ODR to define types with the same name differently. ++ ++@item -fno-weak ++@opindex fno-weak ++Do not use weak symbol support, even if it is provided by the linker. ++By default, G++ will use weak symbols if they are available. This ++option exists only for testing, and should not be used by end-users; ++it will result in inferior code and has no benefits. This option may ++be removed in a future release of G++. ++ ++@item -nostdinc++ ++@opindex nostdinc++ ++Do not search for header files in the standard directories specific to ++C++, but do still search the other standard directories. (This option ++is used when building the C++ library.) ++@end table ++ ++In addition, these optimization, warning, and code generation options ++have meanings only for C++ programs: ++ ++@table @gcctabopt ++@item -fno-default-inline ++@opindex fno-default-inline ++Do not assume @samp{inline} for functions defined inside a class scope. ++@xref{Optimize Options,,Options That Control Optimization}. Note that these ++functions will have linkage like inline functions; they just won't be ++inlined by default. ++ ++@item -Wabi @r{(C, Objective-C, C++ and Objective-C++ only)} ++@opindex Wabi ++@opindex Wno-abi ++Warn when G++ generates code that is probably not compatible with the ++vendor-neutral C++ ABI@. Although an effort has been made to warn about ++all such cases, there are probably some cases that are not warned about, ++even though G++ is generating incompatible code. There may also be ++cases where warnings are emitted even though the code that is generated ++will be compatible. ++ ++You should rewrite your code to avoid these warnings if you are ++concerned about the fact that code generated by G++ may not be binary ++compatible with code generated by other compilers. ++ ++The known incompatibilities at this point include: ++ ++@itemize @bullet ++ ++@item ++Incorrect handling of tail-padding for bit-fields. G++ may attempt to ++pack data into the same byte as a base class. For example: ++ ++@smallexample ++struct A @{ virtual void f(); int f1 : 1; @}; ++struct B : public A @{ int f2 : 1; @}; ++@end smallexample ++ ++@noindent ++In this case, G++ will place @code{B::f2} into the same byte ++as@code{A::f1}; other compilers will not. You can avoid this problem ++by explicitly padding @code{A} so that its size is a multiple of the ++byte size on your platform; that will cause G++ and other compilers to ++layout @code{B} identically. ++ ++@item ++Incorrect handling of tail-padding for virtual bases. G++ does not use ++tail padding when laying out virtual bases. For example: ++ ++@smallexample ++struct A @{ virtual void f(); char c1; @}; ++struct B @{ B(); char c2; @}; ++struct C : public A, public virtual B @{@}; ++@end smallexample ++ ++@noindent ++In this case, G++ will not place @code{B} into the tail-padding for ++@code{A}; other compilers will. You can avoid this problem by ++explicitly padding @code{A} so that its size is a multiple of its ++alignment (ignoring virtual base classes); that will cause G++ and other ++compilers to layout @code{C} identically. ++ ++@item ++Incorrect handling of bit-fields with declared widths greater than that ++of their underlying types, when the bit-fields appear in a union. For ++example: ++ ++@smallexample ++union U @{ int i : 4096; @}; ++@end smallexample ++ ++@noindent ++Assuming that an @code{int} does not have 4096 bits, G++ will make the ++union too small by the number of bits in an @code{int}. ++ ++@item ++Empty classes can be placed at incorrect offsets. For example: ++ ++@smallexample ++struct A @{@}; ++ ++struct B @{ ++ A a; ++ virtual void f (); ++@}; ++ ++struct C : public B, public A @{@}; ++@end smallexample ++ ++@noindent ++G++ will place the @code{A} base class of @code{C} at a nonzero offset; ++it should be placed at offset zero. G++ mistakenly believes that the ++@code{A} data member of @code{B} is already at offset zero. ++ ++@item ++Names of template functions whose types involve @code{typename} or ++template template parameters can be mangled incorrectly. ++ ++@smallexample ++template ++void f(typename Q::X) @{@} ++ ++template