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bsps/powerpc: Fix PPC_EXC_CONFIG_USE_FIXED_HANDLER

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For the SPE support we must store the upper half of r3 as well.

Update #3085.
This commit is contained in:
Sebastian Huber
2017-11-20 07:45:15 +01:00
parent 3d374d90f8
commit 5018894ee1
4 changed files with 19 additions and 14 deletions
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20
c/src/lib/libbsp/powerpc/qoriq/start/start.S
View File

@@ -379,7 +379,7 @@ bsp_exc_vector_base:
START_NOP_FOR_LINKER_TOC_POINTER_RESTORE
/* External input */
PPC_REG_STORE_UPDATE r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1)
PPC_REG_STORE r3, GPR3_OFFSET(r1)
PPC_REG_STORE r3, PPC_EXC_GPR3_PROLOGUE_OFFSET(r1)
li r3, 4
b ppc_exc_interrupt
START_NOP_FOR_LINKER_TOC_POINTER_RESTORE
@@ -420,14 +420,13 @@ bsp_exc_vector_base:
/* Decrementer */
#ifdef QORIQ_IS_HYPERVISOR_GUEST
PPC_REG_STORE_UPDATE r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1)
#else
PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1)
#endif
PPC_REG_STORE r3, GPR3_OFFSET(r1)
PPC_REG_STORE r3, PPC_EXC_GPR3_PROLOGUE_OFFSET(r1)
li r3, 10
#ifdef QORIQ_IS_HYPERVISOR_GUEST
b ppc_exc_interrupt
#else
PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1)
PPC_REG_STORE r3, GPR3_OFFSET(r1)
li r3, 10
b ppc_exc_fatal_normal
#endif
START_NOP_FOR_LINKER_TOC_POINTER_RESTORE
@@ -491,14 +490,13 @@ bsp_exc_vector_base:
/* Processor doorbell interrupt */
#if defined(QORIQ_IS_HYPERVISOR_GUEST) && defined(RTEMS_SMP)
PPC_REG_STORE_UPDATE r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1)
#else
PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1)
#endif
PPC_REG_STORE r3, GPR3_OFFSET(r1)
PPC_REG_STORE r3, PPC_EXC_GPR3_PROLOGUE_OFFSET(r1)
li r3, 36
#if defined(QORIQ_IS_HYPERVISOR_GUEST) && defined(RTEMS_SMP)
b ppc_exc_interrupt
#else
PPC_REG_STORE_UPDATE r1, -EXC_GENERIC_SIZE(r1)
PPC_REG_STORE r3, GPR3_OFFSET(r1)
li r3, 36
b ppc_exc_fatal_normal
#endif
START_NOP_FOR_LINKER_TOC_POINTER_RESTORE

2
c/src/lib/libbsp/powerpc/t32mppc/start/start.S
View File

@@ -147,7 +147,7 @@ bsp_exc_vector_base:
b ppc_exc_fatal_normal
/* Decrementer */
PPC_REG_STORE_UPDATE r1, -PPC_EXC_INTERRUPT_FRAME_SIZE(r1)
PPC_REG_STORE r3, GPR3_OFFSET(r1)
PPC_REG_STORE r3, PPC_EXC_GPR3_PROLOGUE_OFFSET(r1)
li r3, 10
b ppc_exc_interrupt
/* Fixed-interval timer interrupt */

7
c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_async_normal.S
View File

@@ -88,6 +88,13 @@ ppc_exc_interrupt:
oris FRAME_REGISTER, FRAME_REGISTER, MSR_SPE >> 16
mtmsr FRAME_REGISTER
isync
/*
* Save high order part of SCRATCH_1_REGISTER here. The low order part
* was saved in the minimal prologue.
*/
evmergehi SCRATCH_1_REGISTER, SCRATCH_1_REGISTER, FRAME_REGISTER
PPC_REG_STORE FRAME_REGISTER, GPR3_OFFSET(r1)
#endif
#if defined(PPC_MULTILIB_FPU) || defined(PPC_MULTILIB_ALTIVEC)