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This commit is contained in:
Ralf Corsepius
2009-11-29 15:33:28 +00:00
parent efdfd48add
commit 44b06ca617
69 changed files with 1557 additions and 1557 deletions
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2
c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
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@@ -52,7 +52,7 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
clicks = ERC32_MEC.Real_Time_Clock_Counter; clicks = ERC32_MEC.Real_Time_Clock_Counter;
return (uint32_t) return (uint32_t)
(rtems_configuration_get_microseconds_per_tick() - clicks) * 1000; (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
} }

2
c/src/lib/libbsp/sparc/erc32/startup/spurious.c
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@@ -63,7 +63,7 @@ rtems_isr bsp_spurious_handler(
printk( "fp exception\n" ); printk( "fp exception\n" );
break; break;
case 0x09: case 0x09:
printk("data access exception at 0x%08x\n", printk("data access exception at 0x%08x\n",
ERC32_MEC.First_Failing_Address ); ERC32_MEC.First_Failing_Address );
break; break;
case 0x0A: case 0x0A:

88
c/src/lib/libbsp/sparc/leon2/cchip/cchip.c
View File

@@ -52,9 +52,9 @@ typedef struct {
unsigned int bar2; unsigned int bar2;
unsigned int bar3; unsigned int bar3;
unsigned int bar4;/* 0x10 */ unsigned int bar4;/* 0x10 */
unsigned int unused[4*3-1]; unsigned int unused[4*3-1];
unsigned int ambabars[1]; /* 0x40 */ unsigned int ambabars[1]; /* 0x40 */
} amba_bridge_regs; } amba_bridge_regs;
@@ -65,7 +65,7 @@ typedef struct {
unsigned int bar2; unsigned int bar2;
unsigned int bar3; unsigned int bar3;
unsigned int bar4; /* 0x10 */ unsigned int bar4; /* 0x10 */
unsigned int ilevel; unsigned int ilevel;
unsigned int ipend; unsigned int ipend;
unsigned int iforce; unsigned int iforce;
@@ -77,20 +77,20 @@ typedef struct {
typedef struct { typedef struct {
pci_bridge_regs *pcib; pci_bridge_regs *pcib;
amba_bridge_regs *ambab; amba_bridge_regs *ambab;
/* AT697 PCI */ /* AT697 PCI */
unsigned int bars[5]; unsigned int bars[5];
int bus, dev, fun; int bus, dev, fun;
/* AMBA bus */ /* AMBA bus */
amba_confarea_type amba_bus; amba_confarea_type amba_bus;
struct amba_mmap amba_maps[2]; struct amba_mmap amba_maps[2];
/* FT AHB SRAM */ /* FT AHB SRAM */
int ftsram_size; /* kb */ int ftsram_size; /* kb */
unsigned int ftsram_start; unsigned int ftsram_start;
unsigned int ftsram_end; unsigned int ftsram_end;
} cchip1; } cchip1;
cchip1 cc1; cchip1 cc1;
@@ -102,7 +102,7 @@ int init_pcif(void){
amba_bridge_regs *ambab; amba_bridge_regs *ambab;
int amba_master_cnt; int amba_master_cnt;
amba_confarea_type *abus; amba_confarea_type *abus;
if ( BSP_pciFindDevice(0x1AC8, 0x0701, 0, &bus, &dev, &fun) == 0 ) { if ( BSP_pciFindDevice(0x1AC8, 0x0701, 0, &bus, &dev, &fun) == 0 ) {
; ;
}else if (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) { }else if (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) {
@@ -111,15 +111,15 @@ int init_pcif(void){
/* didn't find any Companionship board on the PCI bus. */ /* didn't find any Companionship board on the PCI bus. */
return -1; return -1;
} }
/* found Companionship PCI board, Set it up: */ /* found Companionship PCI board, Set it up: */
pci_read_config_dword(bus, dev, fun, 0x10, &cc1.bars[0]); pci_read_config_dword(bus, dev, fun, 0x10, &cc1.bars[0]);
pci_read_config_dword(bus, dev, fun, 0x14, &cc1.bars[1]); pci_read_config_dword(bus, dev, fun, 0x14, &cc1.bars[1]);
pci_read_config_dword(bus, dev, fun, 0x18, &cc1.bars[2]); pci_read_config_dword(bus, dev, fun, 0x18, &cc1.bars[2]);
pci_read_config_dword(bus, dev, fun, 0x1c, &cc1.bars[3]); pci_read_config_dword(bus, dev, fun, 0x1c, &cc1.bars[3]);
pci_read_config_dword(bus, dev, fun, 0x20, &cc1.bars[4]); pci_read_config_dword(bus, dev, fun, 0x20, &cc1.bars[4]);
#ifdef DEBUG #ifdef DEBUG
for(i=0; i<5; i++){ for(i=0; i<5; i++){
printk("PCI: BAR%d: 0x%x\n\r",i,cc1.bars[i]); printk("PCI: BAR%d: 0x%x\n\r",i,cc1.bars[i]);
@@ -138,7 +138,7 @@ int init_pcif(void){
cc1.amba_maps[0].size = 0x04000000; cc1.amba_maps[0].size = 0x04000000;
cc1.amba_maps[0].cpu_adr = cc1.bars[1]; cc1.amba_maps[0].cpu_adr = cc1.bars[1];
cc1.amba_maps[0].remote_amba_adr = 0xfc000000; cc1.amba_maps[0].remote_amba_adr = 0xfc000000;
/* Mark end of table */ /* Mark end of table */
cc1.amba_maps[1].size=0; cc1.amba_maps[1].size=0;
cc1.amba_maps[1].cpu_adr = 0; cc1.amba_maps[1].cpu_adr = 0;
@@ -149,7 +149,7 @@ int init_pcif(void){
com1 |= 0x3; com1 |= 0x3;
pci_write_config_dword(bus, dev, fun, 0x4, com1); pci_write_config_dword(bus, dev, fun, 0x4, com1);
pci_read_config_dword(bus, dev, fun, 0x4, &com1); pci_read_config_dword(bus, dev, fun, 0x4, &com1);
/* Set up AMBA Masters ==> PCI */ /* Set up AMBA Masters ==> PCI */
ambab = (void *)(cc1.bars[1]+0x400); ambab = (void *)(cc1.bars[1]+0x400);
#ifdef DEBUG #ifdef DEBUG
@@ -157,34 +157,34 @@ int init_pcif(void){
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1); printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",1,ambab->bar1,pcib->bar1);
printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2); printk("AMBA: PCIBAR[%d]: 0x%x, 0x%x\n\r",2,ambab->bar2,pcib->bar2);
#endif #endif
ambab->ambabars[0] = 0x40000000; /* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */ ambab->ambabars[0] = 0x40000000; /* 0xe0000000(AMBA) ==> 0x40000000(PCI) ==> 0x40000000(AT697 AMBA) */
/* Scan bus for AMBA devices */ /* Scan bus for AMBA devices */
abus = &cc1.amba_bus; abus = &cc1.amba_bus;
memset(abus,0,sizeof(amba_confarea_type)); memset(abus,0,sizeof(amba_confarea_type));
amba_scan(abus,cc1.bars[1]+0x3f00000,&cc1.amba_maps[0]); amba_scan(abus,cc1.bars[1]+0x3f00000,&cc1.amba_maps[0]);
/* Get number of amba masters */ /* Get number of amba masters */
amba_master_cnt = abus->ahbmst.devnr; amba_master_cnt = abus->ahbmst.devnr;
#ifdef BOARD_INFO #ifdef BOARD_INFO
printk("Found %d AMBA masters\n\r",amba_master_cnt); printk("Found %d AMBA masters\n\r",amba_master_cnt);
#endif #endif
for(i=1; i<amba_master_cnt; i++){ for(i=1; i<amba_master_cnt; i++){
ambab->ambabars[i] = 0x40000000; ambab->ambabars[i] = 0x40000000;
} }
/* Enable PCI Master */ /* Enable PCI Master */
pci_read_config_dword(bus, dev, fun, 0x4, &com1); pci_read_config_dword(bus, dev, fun, 0x4, &com1);
com1 |= 0x4; com1 |= 0x4;
pci_write_config_dword(bus, dev, fun, 0x4, com1); pci_write_config_dword(bus, dev, fun, 0x4, com1);
pci_read_config_dword(bus, dev, fun, 0x4, &com1); pci_read_config_dword(bus, dev, fun, 0x4, &com1);
cc1.pcib = pcib; cc1.pcib = pcib;
cc1.ambab = ambab; cc1.ambab = ambab;
cc1.bus = bus; cc1.bus = bus;
cc1.dev = dev; cc1.dev = dev;
cc1.fun = fun; cc1.fun = fun;
return 0; return 0;
} }
@@ -195,8 +195,8 @@ int init_onboard_sram(void){
amba_ahb_device ahb; amba_ahb_device ahb;
amba_apb_device apb; amba_apb_device apb;
unsigned int conf, size; unsigned int conf, size;
/* Find SRAM controller /* Find SRAM controller
* 1. AHB slave interface * 1. AHB slave interface
* 2. APB slave interface * 2. APB slave interface
*/ */
@@ -204,20 +204,20 @@ int init_onboard_sram(void){
printk("On Board FT SRAM not found (APB)\n"); printk("On Board FT SRAM not found (APB)\n");
return -1; return -1;
} }
if ( amba_find_ahbslv(&cc1.amba_bus,VENDOR_GAISLER,GAISLER_FTAHBRAM,&ahb) != 1 ){ if ( amba_find_ahbslv(&cc1.amba_bus,VENDOR_GAISLER,GAISLER_FTAHBRAM,&ahb) != 1 ){
printk("On Board FT SRAM not found (AHB)\n"); printk("On Board FT SRAM not found (AHB)\n");
return -1; return -1;
} }
/* We have found the controller. /* We have found the controller.
* Get it going. * Get it going.
* *
* Get size of SRAM * Get size of SRAM
*/ */
conf = *(unsigned int *)apb.start; conf = *(unsigned int *)apb.start;
size = (conf >>10) & 0x7; size = (conf >>10) & 0x7;
/* 2^x kb */ /* 2^x kb */
cc1.ftsram_size = 1<<size; cc1.ftsram_size = 1<<size;
cc1.ftsram_start = ahb.start[0]; cc1.ftsram_start = ahb.start[0];
@@ -229,10 +229,10 @@ int init_onboard_sram(void){
} }
int cchip1_register(void){ int cchip1_register(void){
/* Init AT697 PCI Controller */ /* Init AT697 PCI Controller */
init_pci(); init_pci();
/* Find & init CChip board . /* Find & init CChip board .
* Also scan AMBA Plug&Play info for us. * Also scan AMBA Plug&Play info for us.
*/ */
@@ -243,43 +243,43 @@ int cchip1_register(void){
/* Set interrupt common board stuff */ /* Set interrupt common board stuff */
cchip1_irq_init(); cchip1_irq_init();
/* Find on board SRAM */ /* Find on board SRAM */
if ( init_onboard_sram() ){ if ( init_onboard_sram() ){
printk("Failed to register On Board SRAM. It is needed by b1553BRM\n"); printk("Failed to register On Board SRAM. It is needed by b1553BRM\n");
return -1; return -1;
} }
/* Register interrupt install functions */ /* Register interrupt install functions */
b1553brm_pci_int_reg = cchip1_set_isr; b1553brm_pci_int_reg = cchip1_set_isr;
occan_pci_int_reg = cchip1_set_isr; occan_pci_int_reg = cchip1_set_isr;
grspw_pci_int_reg = cchip1_set_isr; grspw_pci_int_reg = cchip1_set_isr;
apbuart_pci_int_reg = cchip1_set_isr; apbuart_pci_int_reg = cchip1_set_isr;
/* register the BRM PCI driver, use 16k FTSRAM... */ /* register the BRM PCI driver, use 16k FTSRAM... */
if ( b1553brm_pci_register(&cc1.amba_bus,0,0,3,cc1.ftsram_start,0xffa00000) ){ if ( b1553brm_pci_register(&cc1.amba_bus,0,0,3,cc1.ftsram_start,0xffa00000) ){
printk("Failed to register BRM PCI driver\n"); printk("Failed to register BRM PCI driver\n");
return -1; return -1;
} }
/* register the BRM PCI driver, no DMA memory... */ /* register the BRM PCI driver, no DMA memory... */
if ( occan_pci_register(&cc1.amba_bus) ){ if ( occan_pci_register(&cc1.amba_bus) ){
printk("Failed to register OC_CAN PCI driver\n"); printk("Failed to register OC_CAN PCI driver\n");
return -1; return -1;
} }
/* register the GRSPW PCI driver, use malloc... */ /* register the GRSPW PCI driver, use malloc... */
if ( grspw_pci_register(&cc1.amba_bus,0,0xe0000000) ){ if ( grspw_pci_register(&cc1.amba_bus,0,0xe0000000) ){
printk("Failed to register GRSPW PCI driver\n"); printk("Failed to register GRSPW PCI driver\n");
return -1; return -1;
} }
/* register the APBUART PCI driver, no DMA memory */ /* register the APBUART PCI driver, no DMA memory */
if ( apbuart_pci_register(&cc1.amba_bus) ){ if ( apbuart_pci_register(&cc1.amba_bus) ){
printk("Failed to register APBUART PCI driver\n"); printk("Failed to register APBUART PCI driver\n");
return -1; return -1;
} }
return 0; return 0;
} }
@@ -298,7 +298,7 @@ void cchip1_irq_init(void){
/* Configure AT697 ioport bit 7 to input pci irq */ /* Configure AT697 ioport bit 7 to input pci irq */
regs->PIO_Direction &= ~(1<<7); regs->PIO_Direction &= ~(1<<7);
regs->PIO_Interrupt = 0x87; /* level sensitive */ regs->PIO_Interrupt = 0x87; /* level sensitive */
/* Set up irq controller (mask all IRQs) */ /* Set up irq controller (mask all IRQs) */
cc1.pcib->imask = 0x0000; cc1.pcib->imask = 0x0000;
cc1.pcib->ipend = 0; cc1.pcib->ipend = 0;
@@ -307,10 +307,10 @@ void cchip1_irq_init(void){
cc1.pcib->ilevel = 0x0; cc1.pcib->ilevel = 0x0;
memset(int_handlers,0,sizeof(int_handlers)); memset(int_handlers,0,sizeof(int_handlers));
/* Reset spurious counter */ /* Reset spurious counter */
cchip1_spurious_cnt = 0; cchip1_spurious_cnt = 0;
/* Register interrupt handler */ /* Register interrupt handler */
set_vector(cchip1_interrupt_dispatcher,LEON_TRAP_TYPE(CCHIP_IRQ),1); set_vector(cchip1_interrupt_dispatcher,LEON_TRAP_TYPE(CCHIP_IRQ),1);
} }
@@ -323,11 +323,11 @@ void cchip1_set_isr(void *handler, int irqno, void *arg){
#endif #endif
cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */ cc1.pcib->imask |= 1<<irqno; /* Enable the registered IRQ */
} }
static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){ static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
unsigned int pending = READ_REG(&cc1.pcib->ipend); unsigned int pending = READ_REG(&cc1.pcib->ipend);
unsigned int (*handler)(int irqno, void *arg); unsigned int (*handler)(int irqno, void *arg);
unsigned int clr = pending; unsigned int clr = pending;
int irq=1; int irq=1;
if ( !pending ){ if ( !pending ){
@@ -343,7 +343,7 @@ static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
/* IRQ 0 doesn't exist */ /* IRQ 0 doesn't exist */
irq=1; irq=1;
pending = pending>>1; pending = pending>>1;
while ( pending ){ while ( pending ){
if ( (pending & 1) && (handler=int_handlers[irq].handler) ){ if ( (pending & 1) && (handler=int_handlers[irq].handler) ){
handler(irq,int_handlers[irq].arg); handler(irq,int_handlers[irq].arg);
@@ -353,6 +353,6 @@ static rtems_isr cchip1_interrupt_dispatcher(rtems_vector_number v){
} }
cc1.pcib->iclear = clr; cc1.pcib->iclear = clr;
/*LEON_Clear_interrupt( brd->irq );*/ /*LEON_Clear_interrupt( brd->irq );*/
} }

2
c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
View File

@@ -66,7 +66,7 @@ uint32_t bsp_clock_nanoseconds_since_last_tick(void)
clicks = LEON_REG.Timer_Counter_1; clicks = LEON_REG.Timer_Counter_1;
/* Down counter */ /* Down counter */
return (uint32_t) return (uint32_t)
(rtems_configuration_get_microseconds_per_tick() - clicks) * 1000; (rtems_configuration_get_microseconds_per_tick() - clicks) * 1000;
} }

46
c/src/lib/libbsp/sparc/leon2/console/console.c
View File

@@ -21,7 +21,7 @@
/* /*
* Should we use a polled or interrupt drived console? * Should we use a polled or interrupt drived console?
* *
* NOTE: This is defined in the custom/leon.cfg file. * NOTE: This is defined in the custom/leon.cfg file.
* *
* WARNING: In sis 1.6, it did not appear that the UART interrupts * WARNING: In sis 1.6, it did not appear that the UART interrupts
@@ -29,7 +29,7 @@
* a character into the TX buffer, an interrupt was generated. * a character into the TX buffer, an interrupt was generated.
* This did not allow enough time for the program to put more * This did not allow enough time for the program to put more
* characters in the buffer. So every character resulted in * characters in the buffer. So every character resulted in
* "priming" the transmitter. This effectively results in * "priming" the transmitter. This effectively results in
* in a polled console with a useless interrupt per character * in a polled console with a useless interrupt per character
* on output. It is reasonable to assume that input does not * on output. It is reasonable to assume that input does not
* share this problem although it was not investigated. * share this problem although it was not investigated.
@@ -50,7 +50,7 @@ void console_outbyte_polled(
/* body is in debugputs.c */ /* body is in debugputs.c */
/* /*
* console_inbyte_nonblocking * console_inbyte_nonblocking
* *
* This routine polls for a character. * This routine polls for a character.
*/ */
@@ -70,10 +70,10 @@ int console_inbyte_nonblocking( int port );
*/ */
#include <ringbuf.h> #include <ringbuf.h>
Ring_buffer_t TX_Buffer[ 2 ]; Ring_buffer_t TX_Buffer[ 2 ];
bool Is_TX_active[ 2 ]; bool Is_TX_active[ 2 ];
void *console_termios_data[ 2 ]; void *console_termios_data[ 2 ];
/* /*
@@ -82,7 +82,7 @@ void *console_termios_data[ 2 ];
* This routine is the console interrupt handler for Channel 1. * This routine is the console interrupt handler for Channel 1.
* *
* Input parameters: * Input parameters:
* vector - vector number * vector - vector number
* *
* Output parameters: NONE * Output parameters: NONE
* *
@@ -92,10 +92,10 @@ void *console_termios_data[ 2 ];
rtems_isr console_isr_a( rtems_isr console_isr_a(
rtems_vector_number vector rtems_vector_number vector
) )
{ {
char ch; char ch;
int UStat; int UStat;
if ( (UStat = LEON_REG.UART_Status_1) & LEON_REG_UART_STATUS_DR ) { if ( (UStat = LEON_REG.UART_Status_1) & LEON_REG_UART_STATUS_DR ) {
if (UStat & LEON_REG_UART_STATUS_ERR) { if (UStat & LEON_REG_UART_STATUS_ERR) {
LEON_REG.UART_Status_1 = LEON_REG_UART_STATUS_CLR; LEON_REG.UART_Status_1 = LEON_REG_UART_STATUS_CLR;
@@ -104,7 +104,7 @@ rtems_isr console_isr_a(
rtems_termios_enqueue_raw_characters( console_termios_data[ 0 ], &ch, 1 ); rtems_termios_enqueue_raw_characters( console_termios_data[ 0 ], &ch, 1 );
} }
if ( LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE ) { if ( LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE ) {
if ( !Ring_buffer_Is_empty( &TX_Buffer[ 0 ] ) ) { if ( !Ring_buffer_Is_empty( &TX_Buffer[ 0 ] ) ) {
Ring_buffer_Remove_character( &TX_Buffer[ 0 ], ch ); Ring_buffer_Remove_character( &TX_Buffer[ 0 ], ch );
@@ -112,7 +112,7 @@ rtems_isr console_isr_a(
} else } else
Is_TX_active[ 0 ] = false; Is_TX_active[ 0 ] = false;
} }
LEON_Clear_interrupt( LEON_INTERRUPT_UART_1_RX_TX ); LEON_Clear_interrupt( LEON_INTERRUPT_UART_1_RX_TX );
} }
@@ -122,13 +122,13 @@ rtems_isr console_isr_a(
* This routine is the console interrupt handler for Channel 2. * This routine is the console interrupt handler for Channel 2.
* *
* Input parameters: * Input parameters:
* vector - vector number * vector - vector number
* *
* Output parameters: NONE * Output parameters: NONE
* *
* Return values: NONE * Return values: NONE
*/ */
rtems_isr console_isr_b( rtems_isr console_isr_b(
rtems_vector_number vector rtems_vector_number vector
) )
@@ -193,11 +193,11 @@ void console_exit()
* Now wait for all the data to actually get out ... the send register * Now wait for all the data to actually get out ... the send register
* should be empty. * should be empty.
*/ */
while ( (LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE) != while ( (LEON_REG.UART_Status_1 & LEON_REG_UART_STATUS_THE) !=
LEON_REG_UART_STATUS_THE ); LEON_REG_UART_STATUS_THE );
while ( (LEON_REG.UART_Status_2 & LEON_REG_UART_STATUS_THE) != while ( (LEON_REG.UART_Status_2 & LEON_REG_UART_STATUS_THE) !=
LEON_REG_UART_STATUS_THE ); LEON_REG_UART_STATUS_THE );
LEON_REG.UART_Control_1 = 0; LEON_REG.UART_Control_1 = 0;
@@ -261,7 +261,7 @@ void console_initialize_interrupts( void )
* *
* Return values: NONE * Return values: NONE
*/ */
void console_outbyte_interrupt( void console_outbyte_interrupt(
int port, int port,
char ch char ch
@@ -308,7 +308,7 @@ int console_write_support (int minor, const char *buf, int len)
* Console Device Driver Entry Points * Console Device Driver Entry Points
* *
*/ */
rtems_device_driver console_initialize( rtems_device_driver console_initialize(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,
@@ -334,7 +334,7 @@ rtems_device_driver console_initialize(
/* /*
* Initialize Hardware * Initialize Hardware
*/ */
LEON_REG.UART_Control_1 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE; LEON_REG.UART_Control_1 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
LEON_REG.UART_Control_2 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE | LEON_REG.UART_Control_2 |= LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE |
LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */ LEON_REG_UART_CTRL_RI; /* rx irq default enable for remote debugger */
@@ -382,7 +382,7 @@ rtems_device_driver console_open(
assert( minor <= 1 ); assert( minor <= 1 );
if ( minor > 2 ) if ( minor > 2 )
return RTEMS_INVALID_NUMBER; return RTEMS_INVALID_NUMBER;
#if (CONSOLE_USE_INTERRUPTS) #if (CONSOLE_USE_INTERRUPTS)
sc = rtems_termios_open (major, minor, arg, &intrCallbacks); sc = rtems_termios_open (major, minor, arg, &intrCallbacks);
@@ -393,7 +393,7 @@ rtems_device_driver console_open(
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
rtems_device_driver console_close( rtems_device_driver console_close(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,
@@ -402,7 +402,7 @@ rtems_device_driver console_close(
{ {
return rtems_termios_close (arg); return rtems_termios_close (arg);
} }
rtems_device_driver console_read( rtems_device_driver console_read(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,
@@ -411,7 +411,7 @@ rtems_device_driver console_read(
{ {
return rtems_termios_read (arg); return rtems_termios_read (arg);
} }
rtems_device_driver console_write( rtems_device_driver console_write(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,
@@ -420,7 +420,7 @@ rtems_device_driver console_write(
{ {
return rtems_termios_write (arg); return rtems_termios_write (arg);
} }
rtems_device_driver console_control( rtems_device_driver console_control(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,

2
c/src/lib/libbsp/sparc/leon2/console/debugputs.c
View File

@@ -40,7 +40,7 @@ void console_outbyte_polled(
} }
/* /*
* console_inbyte_nonblocking * console_inbyte_nonblocking
* *
* This routine polls for a character. * This routine polls for a character.
*/ */

10
c/src/lib/libbsp/sparc/leon2/include/bsp.h
View File

@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to ERC32 implementation of the SPARC by On-Line Applications * Ported to ERC32 implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$
@@ -35,7 +35,7 @@ extern "C" {
/* SPARC CPU variant: LEON2 */ /* SPARC CPU variant: LEON2 */
#define LEON2 1 #define LEON2 1
/* /*
* BSP provides its own Idle thread body * BSP provides its own Idle thread body
*/ */
@@ -81,13 +81,13 @@ extern int CPU_SPARC_HAS_SNOOPING;
extern int RAM_START; extern int RAM_START;
extern int RAM_END; extern int RAM_END;
extern int RAM_SIZE; extern int RAM_SIZE;
extern int PROM_START; extern int PROM_START;
extern int PROM_END; extern int PROM_END;
extern int PROM_SIZE; extern int PROM_SIZE;
extern int CLOCK_SPEED; extern int CLOCK_SPEED;
extern int end; /* last address in the program */ extern int end; /* last address in the program */
/* miscellaneous stuff assumed to exist */ /* miscellaneous stuff assumed to exist */

50
c/src/lib/libbsp/sparc/leon2/include/leon.h
View File

@@ -5,9 +5,9 @@
* This CPU has a number of on-board peripherals and * This CPU has a number of on-board peripherals and
* was developed by the European Space Agency to target space applications. * was developed by the European Space Agency to target space applications.
* *
* NOTE: Other than where absolutely required, this version currently * NOTE: Other than where absolutely required, this version currently
* supports only the peripherals and bits used by the basic board * supports only the peripherals and bits used by the basic board
* support package. This includes at least significant pieces of * support package. This includes at least significant pieces of
* the following items: * the following items:
* *
* + UART Channels A and B * + UART Channels A and B
@@ -23,20 +23,20 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to LEON implementation of the SPARC by On-Line Applications * Ported to LEON implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$
*/ */
#ifndef _INCLUDE_LEON_h #ifndef _INCLUDE_LEON_h
#define _INCLUDE_LEON_h #define _INCLUDE_LEON_h
#include <rtems/score/sparc.h> #include <rtems/score/sparc.h>
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@@ -44,7 +44,7 @@ extern "C" {
/* /*
* Interrupt Sources * Interrupt Sources
* *
* The interrupt source numbers directly map to the trap type and to * The interrupt source numbers directly map to the trap type and to
* the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask, * the bits used in the Interrupt Clear, Interrupt Force, Interrupt Mask,
* and the Interrupt Pending Registers. * and the Interrupt Pending Registers.
*/ */
@@ -72,7 +72,7 @@ extern "C" {
* *
* Source: Table 8 - Interrupt Trap Type and Default Priority Assignments * Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
* *
* NOTE: The priority level for each source corresponds to the least * NOTE: The priority level for each source corresponds to the least
* significant nibble of the trap type. * significant nibble of the trap type.
*/ */
@@ -85,12 +85,12 @@ extern "C" {
(_trap) <= LEON_TRAP_TYPE( LEON_INTERRUPT_EMPTY6 ) ) (_trap) <= LEON_TRAP_TYPE( LEON_INTERRUPT_EMPTY6 ) )
/* /*
* Structure for LEON memory mapped registers. * Structure for LEON memory mapped registers.
* *
* Source: Section 6.1 - On-chip registers * Source: Section 6.1 - On-chip registers
* *
* NOTE: There is only one of these structures per CPU, its base address * NOTE: There is only one of these structures per CPU, its base address
* is 0x80000000, and the variable LEON_REG is placed there by the * is 0x80000000, and the variable LEON_REG is placed there by the
* linkcmds file. * linkcmds file.
*/ */
@@ -107,7 +107,7 @@ typedef struct {
volatile unsigned int Leon_Configuration; volatile unsigned int Leon_Configuration;
volatile unsigned int dummy2; volatile unsigned int dummy2;
volatile unsigned int dummy3; volatile unsigned int dummy3;
volatile unsigned int dummy4; volatile unsigned int dummy4;
volatile unsigned int dummy5; volatile unsigned int dummy5;
volatile unsigned int dummy6; volatile unsigned int dummy6;
volatile unsigned int dummy7; volatile unsigned int dummy7;
@@ -213,7 +213,7 @@ typedef struct {
#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00 #define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00
/* /*
* The following defines the bits in the Timer Control Register. * The following defines the bits in the Timer Control Register.
*/ */
@@ -230,8 +230,8 @@ typedef struct {
* *
*/ */
#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ #define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
/* /*
* The following defines the bits in the LEON UART Status Registers. * The following defines the bits in the LEON UART Status Registers.
*/ */
@@ -246,7 +246,7 @@ typedef struct {
#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
/* /*
* The following defines the bits in the LEON UART Status Registers. * The following defines the bits in the LEON UART Status Registers.
*/ */
@@ -270,7 +270,7 @@ typedef struct {
*/ */
extern LEON_Register_Map LEON_REG; extern LEON_Register_Map LEON_REG;
/* /*
* Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask, * Macros to manipulate the Interrupt Clear, Interrupt Force, Interrupt Mask,
* and the Interrupt Pending Registers. * and the Interrupt Pending Registers.
@@ -290,13 +290,13 @@ extern LEON_Register_Map LEON_REG;
do { \ do { \
LEON_REG.Interrupt_Force = (1 << (_source)); \ LEON_REG.Interrupt_Force = (1 << (_source)); \
} while (0) } while (0)
#define LEON_Is_interrupt_pending( _source ) \ #define LEON_Is_interrupt_pending( _source ) \
(LEON_REG.Interrupt_Pending & (1 << (_source))) (LEON_REG.Interrupt_Pending & (1 << (_source)))
#define LEON_Is_interrupt_masked( _source ) \ #define LEON_Is_interrupt_masked( _source ) \
(LEON_REG.Interrupt_Masked & (1 << (_source))) (LEON_REG.Interrupt_Masked & (1 << (_source)))
#define LEON_Mask_interrupt( _source ) \ #define LEON_Mask_interrupt( _source ) \
do { \ do { \
uint32_t _level; \ uint32_t _level; \
@@ -305,7 +305,7 @@ extern LEON_Register_Map LEON_REG;
LEON_REG.Interrupt_Mask &= ~(1 << (_source)); \ LEON_REG.Interrupt_Mask &= ~(1 << (_source)); \
sparc_enable_interrupts( _level ); \ sparc_enable_interrupts( _level ); \
} while (0) } while (0)
#define LEON_Unmask_interrupt( _source ) \ #define LEON_Unmask_interrupt( _source ) \
do { \ do { \
uint32_t _level; \ uint32_t _level; \
@@ -326,7 +326,7 @@ extern LEON_Register_Map LEON_REG;
sparc_enable_interrupts( _level ); \ sparc_enable_interrupts( _level ); \
(_previous) &= _mask; \ (_previous) &= _mask; \
} while (0) } while (0)
#define LEON_Restore_interrupt( _source, _previous ) \ #define LEON_Restore_interrupt( _source, _previous ) \
do { \ do { \
uint32_t _level; \ uint32_t _level; \
@@ -350,7 +350,7 @@ extern LEON_Register_Map LEON_REG;
* 0 = stop counter at zero * 0 = stop counter at zero
* *
* D2 - Counter Load * D2 - Counter Load
* 1 = load counter with preset value * 1 = load counter with preset value
* 0 = no function * 0 = no function
* *
*/ */
@@ -374,6 +374,6 @@ extern LEON_Register_Map LEON_REG;
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* !_INCLUDE_LEON_h */ #endif /* !_INCLUDE_LEON_h */

6
c/src/lib/libbsp/sparc/leon2/include/rasta.h
View File

@@ -44,8 +44,8 @@ extern int rasta_register(void);
* The following defines the bits in the UART Control Registers. * The following defines the bits in the UART Control Registers.
* *
*/ */
#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ #define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
/* /*
* The following defines the bits in the LEON UART Status Registers. * The following defines the bits in the LEON UART Status Registers.
*/ */
@@ -58,7 +58,7 @@ extern int rasta_register(void);
#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
/* /*
* The following defines the bits in the LEON UART Status Registers. * The following defines the bits in the LEON UART Status Registers.
*/ */

4
c/src/lib/libbsp/sparc/leon2/leon_open_eth/leon_open_eth.c
View File

@@ -28,8 +28,8 @@
#define OPEN_ETH_VECTOR 0x1C #define OPEN_ETH_VECTOR 0x1C
open_eth_configuration_t leon_open_eth_configuration = { open_eth_configuration_t leon_open_eth_configuration = {
OPEN_ETH_BASE_ADDRESS, /* base address */ OPEN_ETH_BASE_ADDRESS, /* base address */
OPEN_ETH_VECTOR, /* vector number */ OPEN_ETH_VECTOR, /* vector number */
TDA_COUNT, /* number of transmit descriptors */ TDA_COUNT, /* number of transmit descriptors */
RDA_COUNT, /* number of receive descriptors */ RDA_COUNT, /* number of receive descriptors */
0 /* 100 MHz operation */ 0 /* 100 MHz operation */

8
c/src/lib/libbsp/sparc/leon2/leon_smc91111/leon_smc91111.c
View File

@@ -30,9 +30,9 @@
#define SMC91111_BASE_PIO 4 #define SMC91111_BASE_PIO 4
scmv91111_configuration_t leon_scmv91111_configuration = { scmv91111_configuration_t leon_scmv91111_configuration = {
SMC91111_BASE_ADDR, /* base address */ SMC91111_BASE_ADDR, /* base address */
SMC91111_BASE_IRQ, /* vector number */ SMC91111_BASE_IRQ, /* vector number */
SMC91111_BASE_PIO, /* PIO */ SMC91111_BASE_PIO, /* PIO */
100, /* 100b */ 100, /* 100b */
1, /* fulldx */ 1, /* fulldx */
1 /* autoneg */ 1 /* autoneg */
@@ -56,7 +56,7 @@ int rtems_smc91111_driver_attach_leon2(struct rtems_bsdnet_ifconfig *config)
*((volatile unsigned int *)0x800000A8) |= *((volatile unsigned int *)0x800000A8) |=
(0xe0 | leon_scmv91111_configuration.pio) (0xe0 | leon_scmv91111_configuration.pio)
<< (8 * ((leon_scmv91111_configuration.vector & 0x0f) - 4)); << (8 * ((leon_scmv91111_configuration.vector & 0x0f) - 4));
return _rtems_smc91111_driver_attach(config,&leon_scmv91111_configuration); return _rtems_smc91111_driver_attach(config,&leon_scmv91111_configuration);
}; };

106
c/src/lib/libbsp/sparc/leon2/pci/pci.c
View File

@@ -18,7 +18,7 @@
* Till Straumann, <strauman@slac.stanford.edu>, 1/2002 * Till Straumann, <strauman@slac.stanford.edu>, 1/2002
* - separated bridge detection code out of this file * - separated bridge detection code out of this file
* *
* Adapted to LEON2 AT697 PCI * Adapted to LEON2 AT697 PCI
* Copyright (C) 2006 Gaisler Research * Copyright (C) 2006 Gaisler Research
* *
*/ */
@@ -28,14 +28,14 @@
#include <stdlib.h> #include <stdlib.h>
/* Define PCI_INFO to get a listing of configured devices at boot time */ /* Define PCI_INFO to get a listing of configured devices at boot time */
#define PCI_INFO 1 #define PCI_INFO 1
/* #define DEBUG 1 */ /* #define DEBUG 1 */
#ifdef DEBUG #ifdef DEBUG
#define DBG(x...) printk(x) #define DBG(x...) printk(x)
#else #else
#define DBG(x...) #define DBG(x...)
#endif #endif
/* allow for overriding these definitions */ /* allow for overriding these definitions */
@@ -55,7 +55,7 @@
/* /*
* Bit encode for PCI_CONFIG_HEADER_TYPE register * Bit encode for PCI_CONFIG_HEADER_TYPE register
*/ */
unsigned char ucMaxPCIBus; unsigned char ucMaxPCIBus;
typedef struct { typedef struct {
volatile unsigned int pciid1; /* 0x80000100 - PCI Device identification register 1 */ volatile unsigned int pciid1; /* 0x80000100 - PCI Device identification register 1 */
@@ -65,7 +65,7 @@ typedef struct {
volatile unsigned int mbar1; /* 0x80000110 - Memory Base Address Register 1 */ volatile unsigned int mbar1; /* 0x80000110 - Memory Base Address Register 1 */
volatile unsigned int mbar2; /* 0x80000114 - Memory Base Address Register 2 */ volatile unsigned int mbar2; /* 0x80000114 - Memory Base Address Register 2 */
volatile unsigned int iobar3; /* 0x80000118 - IO Base Address Register 3 */ volatile unsigned int iobar3; /* 0x80000118 - IO Base Address Register 3 */
volatile unsigned int dummy1[4]; /* 0x8000011c - 0x80000128 */ volatile unsigned int dummy1[4]; /* 0x8000011c - 0x80000128 */
volatile unsigned int pcisid; /* 0x8000012c - Subsystem identification register */ volatile unsigned int pcisid; /* 0x8000012c - Subsystem identification register */
volatile unsigned int dummy2; /* 0x80000130 */ volatile unsigned int dummy2; /* 0x80000130 */
volatile unsigned int pcicp; /* 0x80000134 - PCI capabilities pointer register */ volatile unsigned int pcicp; /* 0x80000134 - PCI capabilities pointer register */
@@ -78,12 +78,12 @@ typedef struct {
volatile unsigned int pcidma; /* 0x80000150 - PCI DMA configuration register */ volatile unsigned int pcidma; /* 0x80000150 - PCI DMA configuration register */
volatile unsigned int pciis; /* 0x80000154 - PCI Initiator Status Register */ volatile unsigned int pciis; /* 0x80000154 - PCI Initiator Status Register */
volatile unsigned int pciic; /* 0x80000158 - PCI Initiator Configuration */ volatile unsigned int pciic; /* 0x80000158 - PCI Initiator Configuration */
volatile unsigned int pcitpa; /* 0x8000015c - PCI Target Page Address Register */ volatile unsigned int pcitpa; /* 0x8000015c - PCI Target Page Address Register */
volatile unsigned int pcitsc; /* 0x80000160 - PCI Target Status-Command Register */ volatile unsigned int pcitsc; /* 0x80000160 - PCI Target Status-Command Register */
volatile unsigned int pciite; /* 0x80000164 - PCI Interrupt Enable Register */ volatile unsigned int pciite; /* 0x80000164 - PCI Interrupt Enable Register */
volatile unsigned int pciitp; /* 0x80000168 - PCI Interrupt Pending Register */ volatile unsigned int pciitp; /* 0x80000168 - PCI Interrupt Pending Register */
volatile unsigned int pciitf; /* 0x8000016c - PCI Interrupt Force Register */ volatile unsigned int pciitf; /* 0x8000016c - PCI Interrupt Force Register */
volatile unsigned int pcid; /* 0x80000170 - PCI Data Register */ volatile unsigned int pcid; /* 0x80000170 - PCI Data Register */
volatile unsigned int pcibe; /* 0x80000174 - PCI Burst End Register */ volatile unsigned int pcibe; /* 0x80000174 - PCI Burst End Register */
volatile unsigned int pcidmaa; /* 0x80000178 - PCI DMA Address Register */ volatile unsigned int pcidmaa; /* 0x80000178 - PCI DMA Address Register */
} AT697_PCI_Map; } AT697_PCI_Map;
@@ -104,7 +104,7 @@ struct pci_res {
/* The configuration access functions uses the DMA functionality of the /* The configuration access functions uses the DMA functionality of the
* AT697 pci controller to be able access all slots * AT697 pci controller to be able access all slots
*/ */
static int static int
BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned int *val) { BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned int *val) {
@@ -112,7 +112,7 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char f
if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
pcic->pciitp = 0xff; /* clear interrupts */ pcic->pciitp = 0xff; /* clear interrupts */
pcic->pcisa = ( 1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f); pcic->pcisa = ( 1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f);
pcic->pcidma = 0xa01; pcic->pcidma = 0xa01;
@@ -120,8 +120,8 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char f
while (pcic->pciitp == 0) while (pcic->pciitp == 0)
; ;
pcic->pciitp = 0xff; /* clear interrupts */ pcic->pciitp = 0xff; /* clear interrupts */
if (pcic->pcisc & 0x20000000) { /* Master Abort */ if (pcic->pcisc & 0x20000000) { /* Master Abort */
pcic->pcisc |= 0x20000000; pcic->pcisc |= 0x20000000;
@@ -130,13 +130,13 @@ BSP_pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char f
else else
*val = data; *val = data;
DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val); DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
static int static int
BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) { BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) {
unsigned int v; unsigned int v;
@@ -149,7 +149,7 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char fu
} }
static int static int
BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) { BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) {
unsigned int v; unsigned int v;
@@ -167,7 +167,7 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
pcic->pciitp = 0xff; /* clear interrupts */ pcic->pciitp = 0xff; /* clear interrupts */
pcic->pcisa = ( 1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f); pcic->pcisa = ( 1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f);
pcic->pcidma = 0xb01; pcic->pcidma = 0xb01;
pcic->pcidmaa = (unsigned int) &val; pcic->pcidmaa = (unsigned int) &val;
@@ -187,7 +187,7 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
} }
static int static int
BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) { BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) {
unsigned int v; unsigned int v;
@@ -201,14 +201,14 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char f
} }
static int static int
BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) { BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) {
unsigned int v; unsigned int v;
pci_read_config_dword(bus, slot, function, offset&~3, &v); pci_read_config_dword(bus, slot, function, offset&~3, &v);
v = (v & ~(0xff << (8*(offset&3)))) | ((0xff&val) << (8*(offset&3))); v = (v & ~(0xff << (8*(offset&3)))) | ((0xff&val) << (8*(offset&3)));
return pci_write_config_dword(bus, slot, function, offset&~3, v); return pci_write_config_dword(bus, slot, function, offset&~3, v);
} }
@@ -262,7 +262,7 @@ int dma_from_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
return -1; return -1;
} }
pcic->pciitp = 0xff; /* clear interrupts */ pcic->pciitp = 0xff; /* clear interrupts */
pcic->pcisa = paddr; pcic->pcisa = paddr;
pcic->pcidma = 0xc00 | len; pcic->pcidma = 0xc00 | len;
@@ -271,17 +271,17 @@ int dma_from_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
while (pcic->pciitp == 0) while (pcic->pciitp == 0)
; ;
if (pcic->pciitp & 0x7F) { if (pcic->pciitp & 0x7F) {
retval = -1; retval = -1;
} }
pcic->pciitp = 0xff; /* clear interrupts */ pcic->pciitp = 0xff; /* clear interrupts */
if (pcic->pcisc & 0x20000000) { /* Master Abort */ if (pcic->pcisc & 0x20000000) { /* Master Abort */
pcic->pcisc |= 0x20000000; pcic->pcisc |= 0x20000000;
retval = -1; retval = -1;
} }
return retval; return retval;
} }
@@ -292,7 +292,7 @@ int dma_to_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
if (addr & 3) return -1; if (addr & 3) return -1;
pcic->pciitp = 0xff; /* clear interrupts */ pcic->pciitp = 0xff; /* clear interrupts */
pcic->pcisa = paddr; pcic->pcisa = paddr;
pcic->pcidma = 0x700 | len; pcic->pcidma = 0x700 | len;
@@ -300,10 +300,10 @@ int dma_to_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
while (pcic->pciitp == 0) while (pcic->pciitp == 0)
; ;
if (pcic->pciitp & 0x7F) retval = -1; if (pcic->pciitp & 0x7F) retval = -1;
pcic->pciitp = 0xff; /* clear interrupts */ pcic->pciitp = 0xff; /* clear interrupts */
if (pcic->pcisc & 0x20000000) { /* Master Abort */ if (pcic->pcisc & 0x20000000) { /* Master Abort */
pcic->pcisc |= 0x20000000; pcic->pcisc |= 0x20000000;
@@ -315,7 +315,7 @@ int dma_to_pci_1k(unsigned int addr, unsigned int paddr, unsigned char len) {
/* Transfer len number of words from addr to paddr */ /* Transfer len number of words from addr to paddr */
int dma_to_pci(unsigned int addr, unsigned int paddr, unsigned int len) { int dma_to_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
int tmp_len; int tmp_len;
/* Align to 1k boundary */ /* Align to 1k boundary */
@@ -329,11 +329,11 @@ int dma_to_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
addr += tmp_len; addr += tmp_len;
paddr += tmp_len; paddr += tmp_len;
len -= tmp_len/4; len -= tmp_len/4;
/* Transfer all 1k blocks */ /* Transfer all 1k blocks */
while (len >= 128) { while (len >= 128) {
if (dma_to_pci_1k(addr, paddr, 128) < 0) if (dma_to_pci_1k(addr, paddr, 128) < 0)
return -1; return -1;
addr += 512; addr += 512;
@@ -364,7 +364,7 @@ int dma_from_pci(unsigned int addr, unsigned int paddr, unsigned int len) {
addr += tmp_len; addr += tmp_len;
paddr += tmp_len; paddr += tmp_len;
len -= tmp_len/4; len -= tmp_len/4;
/* Transfer all 1k blocks */ /* Transfer all 1k blocks */
while (len >= 128) { while (len >= 128) {
@@ -386,7 +386,7 @@ void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char functio
unsigned int data; unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data); pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY); pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
} }
@@ -394,7 +394,7 @@ void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char func
unsigned int data; unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data); pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER); pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
} }
@@ -413,7 +413,7 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) {
* latency timers are set to 40. * latency timers are set to 40.
* *
* NOTE that it only allocates PCI memory space devices. IO spaces are not enabled. * NOTE that it only allocates PCI memory space devices. IO spaces are not enabled.
* Also, it does not handle pci-pci bridges. They are left disabled. * Also, it does not handle pci-pci bridges. They are left disabled.
* *
* *
*/ */
@@ -426,7 +426,7 @@ void pci_allocate_resources(void) {
res = (struct pci_res **) malloc(sizeof(struct pci_res *)*32*8*6); res = (struct pci_res **) malloc(sizeof(struct pci_res *)*32*8*6);
for (i = 0; i < 32*8*6; i++) { for (i = 0; i < 32*8*6; i++) {
res[i] = (struct pci_res *) malloc(sizeof(struct pci_res)); res[i] = (struct pci_res *) malloc(sizeof(struct pci_res));
res[i]->size = 0; res[i]->size = 0;
res[i]->devfn = i; res[i]->devfn = i;
} }
@@ -443,7 +443,7 @@ void pci_allocate_resources(void) {
} }
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header); pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
if(header & PCI_MULTI_FUNCTION) { if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS; numfuncs = PCI_MAX_FUNCTIONS;
} }
@@ -463,7 +463,7 @@ void pci_allocate_resources(void) {
if (tmp == PCI_CLASS_BRIDGE_PCI) { if (tmp == PCI_CLASS_BRIDGE_PCI) {
continue; continue;
} }
for (pos = 0; pos < 6; pos++) { for (pos = 0; pos < 6; pos++) {
pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff); pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size); pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size);
@@ -485,7 +485,7 @@ void pci_allocate_resources(void) {
} }
/* Sort the resources in descending order */ /* Sort the resources in descending order */
swapped = 1; swapped = 1;
while (swapped == 1) { while (swapped == 1) {
@@ -511,32 +511,32 @@ void pci_allocate_resources(void) {
printk("Out of PCI memory space, all devices not configured.\n"); printk("Out of PCI memory space, all devices not configured.\n");
goto done; goto done;
} }
dev = res[i]->devfn >> 3; dev = res[i]->devfn >> 3;
fn = res[i]->devfn & 7; fn = res[i]->devfn & 7;
DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar); DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar);
pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr); pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
addr += res[i]->size; addr += res[i]->size;
/* Set latency timer to 64 */ /* Set latency timer to 64 */
pci_read_config_dword(0, dev, fn, 0xC, &tmp); pci_read_config_dword(0, dev, fn, 0xC, &tmp);
pci_write_config_dword(0, dev, fn, 0xC, tmp|0x4000); pci_write_config_dword(0, dev, fn, 0xC, tmp|0x4000);
pci_mem_enable(0, dev, fn); pci_mem_enable(0, dev, fn);
}
}
done: done:
#ifdef PCI_INFO #ifdef PCI_INFO
printk("\nPCI devices found and configured:\n"); printk("\nPCI devices found and configured:\n");
for (slot = 0; slot < PCI_MAX_DEVICES; slot++) { for (slot = 0; slot < PCI_MAX_DEVICES; slot++) {
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header); pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
if(header & PCI_MULTI_FUNCTION) { if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS; numfuncs = PCI_MAX_FUNCTIONS;
} }
@@ -545,15 +545,15 @@ done:
} }
for (func = 0; func < numfuncs; func++) { for (func = 0; func < numfuncs; func++) {
pci_read_config_dword(0, slot, func, PCI_COMMAND, &tmp); pci_read_config_dword(0, slot, func, PCI_COMMAND, &tmp);
if (tmp & PCI_COMMAND_MEMORY) { if (tmp & PCI_COMMAND_MEMORY) {
pci_read_config_dword(0, slot, func, PCI_VENDOR_ID, &id); pci_read_config_dword(0, slot, func, PCI_VENDOR_ID, &id);
if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue; if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue;
printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16); printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
for (pos = 0; pos < 6; pos++) { for (pos = 0; pos < 6; pos++) {
@@ -563,17 +563,17 @@ done:
printk("\tBAR %d: %x\n", pos, tmp); printk("\tBAR %d: %x\n", pos, tmp);
} }
} }
printk("\n"); printk("\n");
} }
} }
} }
printk("\n"); printk("\n");
#endif #endif
for (i = 0; i < 1536; i++) { for (i = 0; i < 1536; i++) {
free(res[i]); free(res[i]);
} }
@@ -594,7 +594,7 @@ int init_pci(void)
unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs; unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
unsigned char ucHeader; unsigned char ucHeader;
unsigned char ucMaxSubordinate; unsigned char ucMaxSubordinate;
unsigned int ulClass, ulDeviceID; unsigned int ulClass, ulDeviceID;
init_at697_pci(); init_at697_pci();
pci_allocate_resources(); pci_allocate_resources();

94
c/src/lib/libbsp/sparc/leon2/rasta/rasta.c
View File

@@ -34,7 +34,7 @@
#ifdef DEBUG #ifdef DEBUG
#define DBG(x...) printk(x) #define DBG(x...) printk(x)
#else #else
#define DBG(x...) #define DBG(x...)
#endif #endif
/* /*
@@ -72,7 +72,7 @@ struct gpio_reg *gpio0, *gpio1;
/* volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */ /* volatile unsigned int *pci_mem = (volatile unsigned int *) 0xb0400000; */
/* if (*pci_int & 0x20) { */ /* if (*pci_int & 0x20) { */
/* *pci_int = 0x20; */ /* *pci_int = 0x20; */
/* *pci_mem = 0; */ /* *pci_mem = 0; */
@@ -99,13 +99,13 @@ void (*brm_int_handler)(int irq, void *arg) = NULL;
static rtems_isr rasta_interrupt_handler (rtems_vector_number v) static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
{ {
unsigned int status; unsigned int status;
status = irq->ipend; status = irq->ipend;
if ( (status & GRCAN_IRQ) && grcan_int_handler ) { if ( (status & GRCAN_IRQ) && grcan_int_handler ) {
grcan_int_handler(GRCAN_IRQNO,grcan_int_arg); grcan_int_handler(GRCAN_IRQNO,grcan_int_arg);
} }
if (status & SPW_IRQ) { if (status & SPW_IRQ) {
if ( (status & SPW0_IRQ) && spw0_int_handler ){ if ( (status & SPW0_IRQ) && spw0_int_handler ){
spw0_int_handler(SPW0_IRQNO,spw0_int_arg); spw0_int_handler(SPW0_IRQNO,spw0_int_arg);
@@ -114,12 +114,12 @@ static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
if ( (status & SPW1_IRQ) && spw1_int_handler ){ if ( (status & SPW1_IRQ) && spw1_int_handler ){
spw1_int_handler(SPW1_IRQNO,spw1_int_arg); spw1_int_handler(SPW1_IRQNO,spw1_int_arg);
} }
if ( (status & SPW2_IRQ) && spw2_int_handler ){ if ( (status & SPW2_IRQ) && spw2_int_handler ){
spw2_int_handler(SPW2_IRQNO,spw2_int_arg); spw2_int_handler(SPW2_IRQNO,spw2_int_arg);
} }
} }
if ((status & BRM_IRQ) && brm_int_handler ){ if ((status & BRM_IRQ) && brm_int_handler ){
brm_int_handler(BRM_IRQNO,brm_int_arg); brm_int_handler(BRM_IRQNO,brm_int_arg);
} }
if ( (status & UART0_IRQ) && uart0_int_handler ) { if ( (status & UART0_IRQ) && uart0_int_handler ) {
@@ -128,10 +128,10 @@ static rtems_isr rasta_interrupt_handler (rtems_vector_number v)
if ( (status & UART1_IRQ) && uart1_int_handler) { if ( (status & UART1_IRQ) && uart1_int_handler) {
uart1_int_handler(UART1_IRQNO,uart1_int_arg); uart1_int_handler(UART1_IRQNO,uart1_int_arg);
} }
DBG("RASTA-IRQ: 0x%x\n",status); DBG("RASTA-IRQ: 0x%x\n",status);
irq->iclear = status; irq->iclear = status;
} }
void rasta_interrrupt_register(void *handler, int irqno, void *arg) void rasta_interrrupt_register(void *handler, int irqno, void *arg)
@@ -141,27 +141,27 @@ void rasta_interrrupt_register(void *handler, int irqno, void *arg)
DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg); DBG("RASTA: Registering uart0 handler: 0x%x, arg: 0x%x\n",handler,arg);
uart0_int_handler = handler; uart0_int_handler = handler;
uart0_int_arg = arg; uart0_int_arg = arg;
/* unmask interrupt source */ /* unmask interrupt source */
irq->iclear = UART0_IRQ; irq->iclear = UART0_IRQ;
irq->mask[0] |= UART0_IRQ; irq->mask[0] |= UART0_IRQ;
} }
if ( irqno == UART1_IRQNO ){ if ( irqno == UART1_IRQNO ){
DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg); DBG("RASTA: Registering uart1 handler: 0x%x, arg: 0x%x\n",handler,arg);
uart1_int_handler = handler; uart1_int_handler = handler;
uart1_int_arg = arg; uart1_int_arg = arg;
/* unmask interrupt source */ /* unmask interrupt source */
irq->iclear = UART1_IRQ; irq->iclear = UART1_IRQ;
irq->mask[0] |= UART1_IRQ; irq->mask[0] |= UART1_IRQ;
} }
if ( irqno == SPW0_IRQNO ){ if ( irqno == SPW0_IRQNO ){
DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg); DBG("RASTA: Registering spw0 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw0_int_handler = handler; spw0_int_handler = handler;
spw0_int_arg = arg; spw0_int_arg = arg;
/* unmask interrupt source */ /* unmask interrupt source */
irq->iclear = SPW0_IRQ; irq->iclear = SPW0_IRQ;
irq->mask[0] |= SPW0_IRQ; irq->mask[0] |= SPW0_IRQ;
@@ -171,41 +171,41 @@ void rasta_interrrupt_register(void *handler, int irqno, void *arg)
DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg); DBG("RASTA: Registering spw1 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw1_int_handler = handler; spw1_int_handler = handler;
spw1_int_arg = arg; spw1_int_arg = arg;
/* unmask interrupt source */ /* unmask interrupt source */
irq->iclear = SPW1_IRQ; irq->iclear = SPW1_IRQ;
irq->mask[0] |= SPW1_IRQ; irq->mask[0] |= SPW1_IRQ;
} }
if ( irqno == SPW2_IRQNO ){ if ( irqno == SPW2_IRQNO ){
DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg); DBG("RASTA: Registering spw2 handler: 0x%x, arg: 0x%x\n",handler,arg);
spw2_int_handler = handler; spw2_int_handler = handler;
spw2_int_arg = arg; spw2_int_arg = arg;
/* unmask interrupt source */ /* unmask interrupt source */
irq->iclear = SPW2_IRQ; irq->iclear = SPW2_IRQ;
irq->mask[0] |= SPW2_IRQ; irq->mask[0] |= SPW2_IRQ;
} }
if ( irqno == GRCAN_IRQNO ){ if ( irqno == GRCAN_IRQNO ){
DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg); DBG("RASTA: Registering GRCAN handler: 0x%x, arg: 0x%x\n",handler,arg);
grcan_int_handler = handler; grcan_int_handler = handler;
grcan_int_arg = arg; grcan_int_arg = arg;
/* unmask interrupt source */ /* unmask interrupt source */
irq->iclear = GRCAN_IRQ; irq->iclear = GRCAN_IRQ;
irq->mask[0] |= GRCAN_IRQ; irq->mask[0] |= GRCAN_IRQ;
} }
if ( irqno == BRM_IRQNO ){ if ( irqno == BRM_IRQNO ){
DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg); DBG("RASTA: Registering BRM handler: 0x%x, arg: 0x%x\n",handler,arg);
brm_int_handler = handler; brm_int_handler = handler;
brm_int_arg = arg; brm_int_arg = arg;
/* unmask interrupt source */ /* unmask interrupt source */
irq->iclear = BRM_IRQ; irq->iclear = BRM_IRQ;
irq->mask[0] |= BRM_IRQ; irq->mask[0] |= BRM_IRQ;
} }
} }
@@ -213,21 +213,21 @@ int rasta_get_gpio(amba_confarea_type *abus, int index, struct gpio_reg **regs,
{ {
amba_apb_device dev; amba_apb_device dev;
int cores; int cores;
if ( !abus ) if ( !abus )
return -1; return -1;
/* Scan PnP info for GPIO port number 'index' */ /* Scan PnP info for GPIO port number 'index' */
cores = amba_find_next_apbslv(abus,VENDOR_GAISLER,GAISLER_PIOPORT,&dev,index); cores = amba_find_next_apbslv(abus,VENDOR_GAISLER,GAISLER_PIOPORT,&dev,index);
if ( cores < 1 ) if ( cores < 1 )
return -1; return -1;
if ( regs ) if ( regs )
*regs = (struct gpio_reg *)dev.start; *regs = (struct gpio_reg *)dev.start;
if ( irq ) if ( irq )
*irq = dev.irq; *irq = dev.irq;
return 0; return 0;
} }
@@ -235,37 +235,37 @@ int rasta_get_gpio(amba_confarea_type *abus, int index, struct gpio_reg **regs,
static amba_confarea_type abus; static amba_confarea_type abus;
static struct amba_mmap amba_maps[3]; static struct amba_mmap amba_maps[3];
int rasta_register(void) int rasta_register(void)
{ {
unsigned int bar0, bar1, data; unsigned int bar0, bar1, data;
unsigned int *page0 = NULL; unsigned int *page0 = NULL;
unsigned int *apb_base = NULL; unsigned int *apb_base = NULL;
int found=0; int found=0;
DBG("Searching for RASTA board ..."); DBG("Searching for RASTA board ...");
/* Search PCI vendor/device id. */ /* Search PCI vendor/device id. */
if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) { if (BSP_pciFindDevice(0x1AC8, 0x0010, 0, &bus, &dev, &fun) == 0) {
found = 1; found = 1;
} }
/* Search old PCI vendor/device id. */ /* Search old PCI vendor/device id. */
if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) { if ( (!found) && (BSP_pciFindDevice(0x16E3, 0x0210, 0, &bus, &dev, &fun) == 0) ) {
found = 1; found = 1;
} }
/* Did we find a RASTA board? */ /* Did we find a RASTA board? */
if ( !found ) if ( !found )
return -1; return -1;
DBG(" found it (dev/fun: %d/%d).\n", dev, fun); DBG(" found it (dev/fun: %d/%d).\n", dev, fun);
pci_read_config_dword(bus, dev, fun, 0x10, &bar0); pci_read_config_dword(bus, dev, fun, 0x10, &bar0);
pci_read_config_dword(bus, dev, fun, 0x14, &bar1); pci_read_config_dword(bus, dev, fun, 0x14, &bar1);
page0 = (unsigned int *)(bar0 + 0x400000); page0 = (unsigned int *)(bar0 + 0x400000);
*page0 = 0x80000000; /* Point PAGE0 to start of APB */ *page0 = 0x80000000; /* Point PAGE0 to start of APB */
apb_base = (unsigned int *)(bar0+APB2_OFFSET); apb_base = (unsigned int *)(bar0+APB2_OFFSET);
@@ -279,13 +279,13 @@ int rasta_register(void)
apb_base[0] = 0x000002ff; apb_base[0] = 0x000002ff;
apb_base[1] = 0x00001260; apb_base[1] = 0x00001260;
apb_base[2] = 0x000e8000; apb_base[2] = 0x000e8000;
#else #else
apb_base[0] = 0x000002ff; apb_base[0] = 0x000002ff;
apb_base[1] = 0x82206000; apb_base[1] = 0x82206000;
apb_base[2] = 0x000e8000; apb_base[2] = 0x000e8000;
#endif #endif
/* Set up rasta irq controller */ /* Set up rasta irq controller */
irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET); irq = (LEON3_IrqCtrl_Regs_Map *) (bar0+IRQ_OFFSET);
irq->iclear = 0xffff; irq->iclear = 0xffff;
irq->ilevel = 0; irq->ilevel = 0;
irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ); irq->mask[0] = 0xffff & ~(UART0_IRQ|UART1_IRQ|SPW0_IRQ|SPW1_IRQ|SPW2_IRQ|GRCAN_IRQ|BRM_IRQ);
@@ -297,23 +297,23 @@ int rasta_register(void)
apb_base[0x100] |= 0x40000000; /* Set GRPCI mmap 0x4 */ apb_base[0x100] |= 0x40000000; /* Set GRPCI mmap 0x4 */
apb_base[0x104] = 0x40000000; /* 0xA0000000; Point PAGE1 to RAM */ apb_base[0x104] = 0x40000000; /* 0xA0000000; Point PAGE1 to RAM */
/* set parity error response */ /* set parity error response */
pci_read_config_dword(bus, dev, fun, 0x4, &data); pci_read_config_dword(bus, dev, fun, 0x4, &data);
pci_write_config_dword(bus, dev, fun, 0x4, data|0x40); pci_write_config_dword(bus, dev, fun, 0x4, data|0x40);
pci_master_enable(bus, dev, fun); pci_master_enable(bus, dev, fun);
/* install PCI interrupt vector */ /* install PCI interrupt vector */
/* set_vector(pci_interrupt_handler,14+0x10, 1); */ /* set_vector(pci_interrupt_handler,14+0x10, 1); */
/* install interrupt vector */ /* install interrupt vector */
set_vector(rasta_interrupt_handler, RASTA_IRQ+0x10, 1); set_vector(rasta_interrupt_handler, RASTA_IRQ+0x10, 1);
/* Scan AMBA Plug&Play */ /* Scan AMBA Plug&Play */
/* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */ /* AMBA MAP bar0 (in CPU) ==> 0x80000000(remote amba address) */
amba_maps[0].size = 0x10000000; amba_maps[0].size = 0x10000000;
amba_maps[0].cpu_adr = bar0; amba_maps[0].cpu_adr = bar0;
@@ -328,14 +328,14 @@ int rasta_register(void)
amba_maps[2].size=0; amba_maps[2].size=0;
amba_maps[2].cpu_adr = 0; amba_maps[2].cpu_adr = 0;
amba_maps[2].remote_amba_adr = 0; amba_maps[2].remote_amba_adr = 0;
memset(&abus,0,sizeof(abus)); memset(&abus,0,sizeof(abus));
/* Start AMBA PnP scan at first AHB bus */ /* Start AMBA PnP scan at first AHB bus */
amba_scan(&abus,bar0+(AHB1_IOAREA_BASE_ADDR&~0xf0000000),&amba_maps[0]); amba_scan(&abus,bar0+(AHB1_IOAREA_BASE_ADDR&~0xf0000000),&amba_maps[0]);
printk("Registering RASTA GRCAN driver\n\r"); printk("Registering RASTA GRCAN driver\n\r");
/*grhcan_register(bar0 + GRHCAN_OFFSET, bar1);*/ /*grhcan_register(bar0 + GRHCAN_OFFSET, bar1);*/
grcan_rasta_int_reg=rasta_interrrupt_register; grcan_rasta_int_reg=rasta_interrrupt_register;
if ( grcan_rasta_ram_register(&abus,bar1+0x20000) ){ if ( grcan_rasta_ram_register(&abus,bar1+0x20000) ){
@@ -352,7 +352,7 @@ int rasta_register(void)
printk("Failed to register BRM RASTA driver\n"); printk("Failed to register BRM RASTA driver\n");
return -1; return -1;
} }
/* provide the spacewire driver with AMBA Plug&Play /* provide the spacewire driver with AMBA Plug&Play
* info so that it can find the GRSPW cores. * info so that it can find the GRSPW cores.
*/ */
@@ -376,13 +376,13 @@ int rasta_register(void)
printk("Failed to get address for RASTA GPIO0\n\r"); printk("Failed to get address for RASTA GPIO0\n\r");
return -1; return -1;
} }
/* Find GPIO1 address */ /* Find GPIO1 address */
if ( rasta_get_gpio(&abus,1,&gpio1,NULL) ){ if ( rasta_get_gpio(&abus,1,&gpio1,NULL) ){
printk("Failed to get address for RASTA GPIO1\n\r"); printk("Failed to get address for RASTA GPIO1\n\r");
return -1; return -1;
} }
/* Successfully registered the RASTA board */ /* Successfully registered the RASTA board */
return 0; return 0;
} }

4
c/src/lib/libbsp/sparc/leon2/startup/bspidle.c
View File

@@ -9,10 +9,10 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to LEON implementation of the SPARC by On-Line Applications * Ported to LEON implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$

8
c/src/lib/libbsp/sparc/leon2/startup/bspstart.c
View File

@@ -24,17 +24,17 @@
/* /*
* Tells us if data cache snooping is available * Tells us if data cache snooping is available
*/ */
int CPU_SPARC_HAS_SNOOPING; int CPU_SPARC_HAS_SNOOPING;
/* /*
* set_snooping * set_snooping
* *
* Read the data cache configuration register to determine if * Read the data cache configuration register to determine if
* bus snooping is available. This is needed for some drivers so * bus snooping is available. This is needed for some drivers so
* that they can select the most efficient copy routines. * that they can select the most efficient copy routines.
*/ */
static inline int set_snooping(void) static inline int set_snooping(void)
{ {
unsigned int tmp = *(unsigned int *)0x80000014; /* Cache control register */ unsigned int tmp = *(unsigned int *)0x80000014; /* Cache control register */
return ((tmp>>23) & 1); /* Data cache snooping enabled */ return ((tmp>>23) & 1); /* Data cache snooping enabled */

8
c/src/lib/libbsp/sparc/leon2/startup/setvec.c
View File

@@ -21,10 +21,10 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to LEON implementation of the SPARC by On-Line Applications * Ported to LEON implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$
@@ -44,13 +44,13 @@ rtems_isr_entry set_vector( /* returns old vector */
if ( type ) if ( type )
rtems_interrupt_catch( handler, vector, &previous_isr ); rtems_interrupt_catch( handler, vector, &previous_isr );
else else
_CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr ); _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
real_trap = SPARC_REAL_TRAP_NUMBER( vector ); real_trap = SPARC_REAL_TRAP_NUMBER( vector );
if ( LEON_INT_TRAP( real_trap ) ) { if ( LEON_INT_TRAP( real_trap ) ) {
source = LEON_TRAP_SOURCE( real_trap ); source = LEON_TRAP_SOURCE( real_trap );
LEON_Clear_interrupt( source ); LEON_Clear_interrupt( source );

26
c/src/lib/libbsp/sparc/leon2/startup/spurious.c
View File

@@ -1,11 +1,11 @@
/* /*
* LEON Spurious Trap Handler * LEON Spurious Trap Handler
* *
* This is just enough of a trap handler to let us know what * This is just enough of a trap handler to let us know what
* the likely source of the trap was. * the likely source of the trap was.
* *
* Developed as part of the port of RTEMS to the LEON implementation * Developed as part of the port of RTEMS to the LEON implementation
* of the SPARC by On-Line Applications Research Corporation (OAR) * of the SPARC by On-Line Applications Research Corporation (OAR)
* under contract to the European Space Agency (ESA). * under contract to the European Space Agency (ESA).
* *
* COPYRIGHT (c) 1995. European Space Agency. * COPYRIGHT (c) 1995. European Space Agency.
@@ -41,31 +41,31 @@ rtems_isr bsp_spurious_handler(
* First the ones defined by the basic architecture * First the ones defined by the basic architecture
*/ */
case 0x00: case 0x00:
printk( "reset\n" ); printk( "reset\n" );
break; break;
case 0x01: case 0x01:
printk( "instruction access exception\n" ); printk( "instruction access exception\n" );
break; break;
case 0x02: case 0x02:
printk( "illegal instruction\n" ); printk( "illegal instruction\n" );
break; break;
case 0x03: case 0x03:
printk( "privileged instruction\n" ); printk( "privileged instruction\n" );
break; break;
case 0x04: case 0x04:
printk( "fp disabled\n" ); printk( "fp disabled\n" );
break; break;
case 0x07: case 0x07:
printk( "memory address not aligned\n" ); printk( "memory address not aligned\n" );
break; break;
case 0x08: case 0x08:
printk( "fp exception\n" ); printk( "fp exception\n" );
break; break;
case 0x09: case 0x09:
printk("data access exception at 0x%08x\n", LEON_REG.Failed_Address ); printk("data access exception at 0x%08x\n", LEON_REG.Failed_Address );
break; break;
case 0x0A: case 0x0A:
printk( "tag overflow\n" ); printk( "tag overflow\n" );
break; break;
@@ -139,7 +139,7 @@ void bsp_spurious_initialize()
*/ */
if (( trap == 5 || trap == 6 ) || if (( trap == 5 || trap == 6 ) ||
(( trap >= 0x11 ) && ( trap <= 0x1f )) || (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 ))) (( trap >= 0x70 ) && ( trap <= 0x83 )))
continue; continue;

8
c/src/lib/libbsp/sparc/leon2/timer/timer.c
View File

@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to LEON implementation of the SPARC by On-Line Applications * Ported to LEON implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$
@@ -42,8 +42,8 @@ void benchmark_timer_initialize(void)
benchmark_timer_is_initialized = true; benchmark_timer_is_initialized = true;
} }
LEON_REG.Timer_Control_2 = ( LEON_REG.Timer_Control_2 = (
LEON_REG_TIMER_COUNTER_ENABLE_COUNTING | LEON_REG_TIMER_COUNTER_ENABLE_COUNTING |
LEON_REG_TIMER_COUNTER_LOAD_COUNTER LEON_REG_TIMER_COUNTER_LOAD_COUNTER
); );

6
c/src/lib/libbsp/sparc/leon3/amba/amba.c
View File

@@ -27,9 +27,9 @@ int LEON3_Cpu_Index = 0;
* bsp_predriver_hook * bsp_predriver_hook
* *
* BSP predriver hook. Called just before drivers are initialized. * BSP predriver hook. Called just before drivers are initialized.
* Used to scan system bus. Probes for AHB masters, AHB slaves and * Used to scan system bus. Probes for AHB masters, AHB slaves and
* APB slaves. Addresses to configuration areas of the AHB masters, * APB slaves. Addresses to configuration areas of the AHB masters,
* AHB slaves, APB slaves and APB master are storeds in * AHB slaves, APB slaves and APB master are storeds in
* amba_ahb_masters, amba_ahb_slaves and amba. * amba_ahb_masters, amba_ahb_slaves and amba.
*/ */
@@ -64,7 +64,7 @@ void bsp_predriver_hook(void)
} }
#endif #endif
} }
/* find GP Timer */ /* find GP Timer */
i = amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&dev); i = amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&dev);
if ( i > 0 ){ if ( i > 0 ){

2
c/src/lib/libbsp/sparc/leon3/clock/ckinit.c
View File

@@ -36,7 +36,7 @@
(rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0) (rtems_configuration_get_user_multiprocessing_table() ? LEON3_Cpu_Index : 0)
#else #else
#define LEON3_CLOCK_INDEX 0 #define LEON3_CLOCK_INDEX 0
#endif #endif
volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs = 0; volatile LEON3_Timer_Regs_Map *LEON3_Timer_Regs = 0;

28
c/src/lib/libbsp/sparc/leon3/console/console.c
View File

@@ -26,7 +26,7 @@
/* /*
* Should we use a polled or interrupt drived console? * Should we use a polled or interrupt drived console?
* *
* NOTE: This is defined in the custom/leon.cfg file. * NOTE: This is defined in the custom/leon.cfg file.
*/ */
@@ -44,7 +44,7 @@ void console_outbyte_polled(
/* body is in debugputs.c */ /* body is in debugputs.c */
/* /*
* console_inbyte_nonblocking * console_inbyte_nonblocking
* *
* This routine polls for a character. * This routine polls for a character.
*/ */
@@ -86,7 +86,7 @@ int scan_uarts(void) {
if (isinit == 0) { if (isinit == 0) {
i = 0; i = 0;
uarts = 0; uarts = 0;
uarts = amba_find_apbslvs( uarts = amba_find_apbslvs(
&amba_conf, VENDOR_GAISLER, GAISLER_APBUART, apbuarts, LEON3_APBUARTS); &amba_conf, VENDOR_GAISLER, GAISLER_APBUART, apbuarts, LEON3_APBUARTS);
for(i=0; i<uarts; i++) { for(i=0; i<uarts; i++) {
@@ -113,16 +113,16 @@ rtems_device_driver console_initialize(
scan_uarts(); scan_uarts();
/* default to zero and override if multiprocessing */ /* default to zero and override if multiprocessing */
uart0 = 0; uart0 = 0;
#if defined(RTEMS_MULTIPROCESSING) #if defined(RTEMS_MULTIPROCESSING)
if (rtems_configuration_get_user_multiprocessing_table() != NULL) if (rtems_configuration_get_user_multiprocessing_table() != NULL)
uart0 = LEON3_Cpu_Index; uart0 = LEON3_Cpu_Index;
#endif #endif
/* Register Device Names */ /* Register Device Names */
if (uarts && (uart0 < uarts)) if (uarts && (uart0 < uarts))
{ {
status = rtems_io_register_name( "/dev/console", major, 0 ); status = rtems_io_register_name( "/dev/console", major, 0 );
if (status != RTEMS_SUCCESSFUL) if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status); rtems_fatal_error_occurred(status);
@@ -139,7 +139,7 @@ rtems_device_driver console_initialize(
/* /*
* Initialize Hardware if ONLY CPU or first CPU in MP system * Initialize Hardware if ONLY CPU or first CPU in MP system
*/ */
#if defined(RTEMS_MULTIPROCESSING) #if defined(RTEMS_MULTIPROCESSING)
if (rtems_configuration_get_user_multiprocessing_table()->node == 1) if (rtems_configuration_get_user_multiprocessing_table()->node == 1)
#endif #endif
@@ -148,7 +148,7 @@ rtems_device_driver console_initialize(
{ {
LEON3_Console_Uart[i]->ctrl |= LEON3_Console_Uart[i]->ctrl |=
LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE; LEON_REG_UART_CTRL_RE | LEON_REG_UART_CTRL_TE;
LEON3_Console_Uart[i]->status = 0; LEON3_Console_Uart[i]->status = 0;
} }
} }
@@ -178,13 +178,13 @@ rtems_device_driver console_open(
assert( minor <= LEON3_APBUARTS ); assert( minor <= LEON3_APBUARTS );
if ( minor > LEON3_APBUARTS ) if ( minor > LEON3_APBUARTS )
return RTEMS_INVALID_NUMBER; return RTEMS_INVALID_NUMBER;
sc = rtems_termios_open (major, minor, arg, &pollCallbacks); sc = rtems_termios_open (major, minor, arg, &pollCallbacks);
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
rtems_device_driver console_close( rtems_device_driver console_close(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,
@@ -193,7 +193,7 @@ rtems_device_driver console_close(
{ {
return rtems_termios_close (arg); return rtems_termios_close (arg);
} }
rtems_device_driver console_read( rtems_device_driver console_read(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,
@@ -202,7 +202,7 @@ rtems_device_driver console_read(
{ {
return rtems_termios_read (arg); return rtems_termios_read (arg);
} }
rtems_device_driver console_write( rtems_device_driver console_write(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,
@@ -211,7 +211,7 @@ rtems_device_driver console_write(
{ {
return rtems_termios_write (arg); return rtems_termios_write (arg);
} }
rtems_device_driver console_control( rtems_device_driver console_control(
rtems_device_major_number major, rtems_device_major_number major,
rtems_device_minor_number minor, rtems_device_minor_number minor,

2
c/src/lib/libbsp/sparc/leon3/console/debugputs.c
View File

@@ -45,7 +45,7 @@ void console_outbyte_polled(
} }
/* /*
* console_inbyte_nonblocking * console_inbyte_nonblocking
* *
* This routine polls for a character. * This routine polls for a character.
*/ */

8
c/src/lib/libbsp/sparc/leon3/include/bsp.h
View File

@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to ERC32 implementation of the SPARC by On-Line Applications * Ported to ERC32 implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. * ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$
@@ -91,13 +91,13 @@ extern int CPU_SPARC_HAS_SNOOPING;
extern int RAM_START; extern int RAM_START;
extern int RAM_END; extern int RAM_END;
extern int RAM_SIZE; extern int RAM_SIZE;
extern int PROM_START; extern int PROM_START;
extern int PROM_END; extern int PROM_END;
extern int PROM_SIZE; extern int PROM_SIZE;
extern int CLOCK_SPEED; extern int CLOCK_SPEED;
extern int end; /* last address in the program */ extern int end; /* last address in the program */
/* miscellaneous stuff assumed to exist */ /* miscellaneous stuff assumed to exist */

36
c/src/lib/libbsp/sparc/leon3/include/leon.h
View File

@@ -15,7 +15,7 @@
* *
* $Id$ * $Id$
*/ */
#ifndef _INCLUDE_LEON_h #ifndef _INCLUDE_LEON_h
#define _INCLUDE_LEON_h #define _INCLUDE_LEON_h
@@ -34,7 +34,7 @@ extern "C" {
* *
* Source: Table 8 - Interrupt Trap Type and Default Priority Assignments * Source: Table 8 - Interrupt Trap Type and Default Priority Assignments
* *
* NOTE: The priority level for each source corresponds to the least * NOTE: The priority level for each source corresponds to the least
* significant nibble of the trap type. * significant nibble of the trap type.
*/ */
@@ -45,14 +45,14 @@ extern "C" {
#define LEON_INT_TRAP( _trap ) \ #define LEON_INT_TRAP( _trap ) \
( (_trap) >= 0x11 && \ ( (_trap) >= 0x11 && \
(_trap) <= 0x1F ) (_trap) <= 0x1F )
/* /*
* Structure for LEON memory mapped registers. * Structure for LEON memory mapped registers.
* *
* Source: Section 6.1 - On-chip registers * Source: Section 6.1 - On-chip registers
* *
* NOTE: There is only one of these structures per CPU, its base address * NOTE: There is only one of these structures per CPU, its base address
* is 0x80000000, and the variable LEON_REG is placed there by the * is 0x80000000, and the variable LEON_REG is placed there by the
* linkcmds file. * linkcmds file.
*/ */
@@ -73,7 +73,7 @@ extern "C" {
volatile unsigned int Leon_Configuration; volatile unsigned int Leon_Configuration;
volatile unsigned int dummy2; volatile unsigned int dummy2;
volatile unsigned int dummy3; volatile unsigned int dummy3;
volatile unsigned int dummy4; volatile unsigned int dummy4;
volatile unsigned int dummy5; volatile unsigned int dummy5;
volatile unsigned int dummy6; volatile unsigned int dummy6;
volatile unsigned int dummy7; volatile unsigned int dummy7;
@@ -146,7 +146,7 @@ typedef struct {
/* Leon uses dynamic register mapping using amba configuration records */ /* Leon uses dynamic register mapping using amba configuration records */
/* LEON_Register_Map is obsolete */ /* LEON_Register_Map is obsolete */
/* extern LEON_Register_Map LEON_REG; */ /* extern LEON_Register_Map LEON_REG; */
#endif #endif
/* /*
@@ -161,7 +161,7 @@ typedef struct {
#define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00 #define LEON_MEMORY_CONFIGURATION_RAM_SIZE_MASK 0x00001E00
/* /*
* The following defines the bits in the Timer Control Register. * The following defines the bits in the Timer Control Register.
*/ */
@@ -178,8 +178,8 @@ typedef struct {
* *
*/ */
#define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */ #define LEON_REG_UART_CONTROL_RTD 0x000000FF /* RX/TX data */
/* /*
* The following defines the bits in the LEON UART Status Registers. * The following defines the bits in the LEON UART Status Registers.
*/ */
@@ -193,7 +193,7 @@ typedef struct {
#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */ #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */ #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
/* /*
* The following defines the bits in the LEON UART Status Registers. * The following defines the bits in the LEON UART Status Registers.
*/ */
@@ -243,16 +243,16 @@ extern int LEON3_Cpu_Index;
do { \ do { \
LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \ LEON3_IrqCtrl_Regs->iforce = (1 << (_source)); \
} while (0) } while (0)
#define LEON_Is_interrupt_pending( _source ) \ #define LEON_Is_interrupt_pending( _source ) \
(LEON3_IrqCtrl_Regs.ipend & (1 << (_source))) (LEON3_IrqCtrl_Regs.ipend & (1 << (_source)))
#define LEON_Is_interrupt_masked( _source ) \ #define LEON_Is_interrupt_masked( _source ) \
do {\ do {\
(LEON3_IrqCtrl_Regs.mask[LEON3_Cpu_Index] & (1 << (_source))); \ (LEON3_IrqCtrl_Regs.mask[LEON3_Cpu_Index] & (1 << (_source))); \
} while (0) } while (0)
#define LEON_Mask_interrupt( _source ) \ #define LEON_Mask_interrupt( _source ) \
do { \ do { \
uint32_t _level; \ uint32_t _level; \
@@ -260,7 +260,7 @@ extern int LEON3_Cpu_Index;
LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] &= ~(1 << (_source)); \ LEON3_IrqCtrl_Regs->mask[LEON3_Cpu_Index] &= ~(1 << (_source)); \
sparc_enable_interrupts( _level ); \ sparc_enable_interrupts( _level ); \
} while (0) } while (0)
#define LEON_Unmask_interrupt( _source ) \ #define LEON_Unmask_interrupt( _source ) \
do { \ do { \
uint32_t _level; \ uint32_t _level; \
@@ -279,7 +279,7 @@ extern int LEON3_Cpu_Index;
sparc_enable_interrupts( _level ); \ sparc_enable_interrupts( _level ); \
(_previous) &= _mask; \ (_previous) &= _mask; \
} while (0) } while (0)
#define LEON_Restore_interrupt( _source, _previous ) \ #define LEON_Restore_interrupt( _source, _previous ) \
do { \ do { \
uint32_t _level; \ uint32_t _level; \
@@ -303,7 +303,7 @@ extern int LEON3_Cpu_Index;
* 0 = stop counter at zero * 0 = stop counter at zero
* *
* D2 - Counter Load * D2 - Counter Load
* 1 = load counter with preset value * 1 = load counter with preset value
* 0 = no function * 0 = no function
* *
*/ */

8
c/src/lib/libbsp/sparc/leon3/leon_greth/leon_greth.c
View File

@@ -24,7 +24,7 @@
#define RDA_COUNT 32 #define RDA_COUNT 32
#define TDA_COUNT 32 #define TDA_COUNT 32
greth_configuration_t leon_greth_configuration; greth_configuration_t leon_greth_configuration;
int rtems_leon_greth_driver_attach( int rtems_leon_greth_driver_attach(
struct rtems_bsdnet_ifconfig *config, struct rtems_bsdnet_ifconfig *config,
@@ -38,11 +38,11 @@ int rtems_leon_greth_driver_attach(
/* Scan for MAC AHB slave interface */ /* Scan for MAC AHB slave interface */
device_found = amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_ETHMAC,&apbgreth); device_found = amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_ETHMAC,&apbgreth);
if (device_found == 1) if (device_found == 1)
{ {
base_addr = apbgreth.start; base_addr = apbgreth.start;
eth_irq = apbgreth.irq + 0x10; eth_irq = apbgreth.irq + 0x10;
/* clear control register and reset NIC */ /* clear control register and reset NIC */
*(volatile int *) base_addr = 0; *(volatile int *) base_addr = 0;
*(volatile int *) base_addr = GRETH_CTRL_RST; *(volatile int *) base_addr = GRETH_CTRL_RST;
@@ -54,7 +54,7 @@ int rtems_leon_greth_driver_attach(
if (rtems_greth_driver_attach( config, &leon_greth_configuration )) { if (rtems_greth_driver_attach( config, &leon_greth_configuration )) {
LEON_Clear_interrupt(leon_greth_configuration.vector); LEON_Clear_interrupt(leon_greth_configuration.vector);
LEON_Unmask_interrupt(leon_greth_configuration.vector); LEON_Unmask_interrupt(leon_greth_configuration.vector);
} }
} }
return 0; return 0;
} }

6
c/src/lib/libbsp/sparc/leon3/leon_open_eth/leon_open_eth.c
View File

@@ -24,7 +24,7 @@
#define RDA_COUNT 16 #define RDA_COUNT 16
#define TDA_COUNT 16 #define TDA_COUNT 16
open_eth_configuration_t leon_open_eth_configuration; open_eth_configuration_t leon_open_eth_configuration;
int rtems_leon_open_eth_driver_attach( int rtems_leon_open_eth_driver_attach(
struct rtems_bsdnet_ifconfig *config, struct rtems_bsdnet_ifconfig *config,
@@ -54,7 +54,7 @@ int rtems_leon_open_eth_driver_attach(
} }
if (device_found) if (device_found)
{ {
/* clear control register and reset NIC */ /* clear control register and reset NIC */
*(volatile int *) base_addr = 0; *(volatile int *) base_addr = 0;
@@ -69,7 +69,7 @@ int rtems_leon_open_eth_driver_attach(
if (rtems_open_eth_driver_attach( config, &leon_open_eth_configuration )) { if (rtems_open_eth_driver_attach( config, &leon_open_eth_configuration )) {
LEON_Clear_interrupt(leon_open_eth_configuration.vector); LEON_Clear_interrupt(leon_open_eth_configuration.vector);
LEON_Unmask_interrupt(leon_open_eth_configuration.vector); LEON_Unmask_interrupt(leon_open_eth_configuration.vector);
} }
} }
return 0; return 0;
} }

14
c/src/lib/libbsp/sparc/leon3/leon_smc91111/leon_smc91111.c
View File

@@ -12,9 +12,9 @@
#define SMC91111_BASE_PIO 4 #define SMC91111_BASE_PIO 4
scmv91111_configuration_t leon_scmv91111_configuration = { scmv91111_configuration_t leon_scmv91111_configuration = {
SMC91111_BASE_ADDR, /* base address */ SMC91111_BASE_ADDR, /* base address */
LEON_TRAP_TYPE (SMC91111_BASE_IRQ), /* vector number */ LEON_TRAP_TYPE (SMC91111_BASE_IRQ), /* vector number */
SMC91111_BASE_PIO, /* PIO */ SMC91111_BASE_PIO, /* PIO */
100, /* 100b */ 100, /* 100b */
1, /* fulldx */ 1, /* fulldx */
1 /* autoneg */ 1 /* autoneg */
@@ -35,12 +35,12 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
amba_apb_device apbpio; amba_apb_device apbpio;
amba_ahb_device apbmctrl; amba_ahb_device apbmctrl;
if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_PIOPORT,&apbpio) != 1 ){ if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_PIOPORT,&apbpio) != 1 ){
printk("SMC9111_leon3: didn't find PIO\n"); printk("SMC9111_leon3: didn't find PIO\n");
return 0; return 0;
} }
/* Find LEON2 memory controller */ /* Find LEON2 memory controller */
if ( amba_find_ahbslv(&amba_conf,VENDOR_ESA,ESA_MCTRL,&apbmctrl) != 1 ){ if ( amba_find_ahbslv(&amba_conf,VENDOR_ESA,ESA_MCTRL,&apbmctrl) != 1 ){
/* LEON2 memory controller not found, search for fault tolerant memory controller */ /* LEON2 memory controller not found, search for fault tolerant memory controller */
@@ -49,16 +49,16 @@ rtems_smc91111_driver_attach_leon3 (struct rtems_bsdnet_ifconfig *config,
return 0; return 0;
} }
} }
/* Get controller address */ /* Get controller address */
addr_mctrl = (unsigned long) apbmctrl.start; addr_mctrl = (unsigned long) apbmctrl.start;
io = (LEON3_IOPORT_Regs_Map *) apbpio.start; io = (LEON3_IOPORT_Regs_Map *) apbpio.start;
printk( printk(
"Activating Leon3 io port for smsc_lan91cxx (pio:%x mctrl:%x)\n", "Activating Leon3 io port for smsc_lan91cxx (pio:%x mctrl:%x)\n",
(unsigned int)io, (unsigned int)io,
(unsigned int)addr_mctrl); (unsigned int)addr_mctrl);
/* Setup PIO IRQ */ /* Setup PIO IRQ */
io->irqmask |= (1 << leon_scmv91111_configuration.pio); io->irqmask |= (1 << leon_scmv91111_configuration.pio);
io->irqpol |= (1 << leon_scmv91111_configuration.pio); io->irqpol |= (1 << leon_scmv91111_configuration.pio);

106
c/src/lib/libbsp/sparc/leon3/pci/pci.c
View File

@@ -19,7 +19,7 @@
* - separated bridge detection code out of this file * - separated bridge detection code out of this file
* *
* *
* Adapted to GRPCI * Adapted to GRPCI
* Copyright (C) 2006 Gaisler Research * Copyright (C) 2006 Gaisler Research
* *
*/ */
@@ -39,14 +39,14 @@
/*#define BT_ENABLED 1*/ /*#define BT_ENABLED 1*/
/* Define PCI_INFO to get a listing of configured devices at boot time */ /* Define PCI_INFO to get a listing of configured devices at boot time */
#define PCI_INFO 1 #define PCI_INFO 1
#define DEBUG 1 #define DEBUG 1
#ifdef DEBUG #ifdef DEBUG
#define DBG(x...) printk(x) #define DBG(x...) printk(x)
#else #else
#define DBG(x...) #define DBG(x...)
#endif #endif
/* allow for overriding these definitions */ /* allow for overriding these definitions */
@@ -66,7 +66,7 @@
/* /*
* Bit encode for PCI_CONFIG_HEADER_TYPE register * Bit encode for PCI_CONFIG_HEADER_TYPE register
*/ */
unsigned char ucMaxPCIBus; unsigned char ucMaxPCIBus;
typedef struct { typedef struct {
volatile unsigned int cfg_stat; volatile unsigned int cfg_stat;
volatile unsigned int bar0; volatile unsigned int bar0;
@@ -95,7 +95,7 @@ static inline unsigned int flip_dword (unsigned int l)
/* The configuration access functions uses the DMA functionality of the /* The configuration access functions uses the DMA functionality of the
* AT697 pci controller to be able access all slots * AT697 pci controller to be able access all slots
*/ */
static int static int
BSP_pci_read_config_dword( BSP_pci_read_config_dword(
@@ -109,7 +109,7 @@ BSP_pci_read_config_dword(
volatile unsigned int *pci_conf; volatile unsigned int *pci_conf;
if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER; if (offset & 3) return PCIBIOS_BAD_REGISTER_NUMBER;
if (slot > 21) { if (slot > 21) {
*val = 0xffffffff; *val = 0xffffffff;
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
@@ -128,13 +128,13 @@ BSP_pci_read_config_dword(
*val = 0xffffffff; *val = 0xffffffff;
} }
DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val); DBG("pci_read - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), *val);
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
static int static int
BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) { BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short *val) {
unsigned int v; unsigned int v;
@@ -147,7 +147,7 @@ BSP_pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char fu
} }
static int static int
BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) { BSP_pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char *val) {
unsigned int v; unsigned int v;
@@ -179,13 +179,13 @@ BSP_pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char
*pci_conf = value; *pci_conf = value;
DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value); DBG("pci write - bus: %d, dev: %d, fn: %d, off: %d => addr: %x, val: %x\n", bus, slot, function, offset, (1<<(11+slot) ) | ((function & 7)<<8) | (offset&0x3f), value);
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
static int static int
BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) { BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned short val) {
unsigned int v; unsigned int v;
@@ -199,14 +199,14 @@ BSP_pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char f
} }
static int static int
BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) { BSP_pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, unsigned char offset, unsigned char val) {
unsigned int v; unsigned int v;
pci_read_config_dword(bus, slot, function, offset&~3, &v); pci_read_config_dword(bus, slot, function, offset&~3, &v);
v = (v & ~(0xff << (8*(offset&3)))) | ((0xff&val) << (8*(offset&3))); v = (v & ~(0xff << (8*(offset&3)))) | ((0xff&val) << (8*(offset&3)));
return pci_write_config_dword(bus, slot, function, offset&~3, v); return pci_write_config_dword(bus, slot, function, offset&~3, v);
} }
@@ -238,20 +238,20 @@ int init_grpci(void) {
pci_read_config_dword(0,0,0,0x10, &addr); pci_read_config_dword(0,0,0,0x10, &addr);
pci_write_config_dword(0,0,0,0x10, flip_dword(0x10000000)); /* Setup bar0 to nonzero value (grpci considers BAR==0 as invalid) */ pci_write_config_dword(0,0,0,0x10, flip_dword(0x10000000)); /* Setup bar0 to nonzero value (grpci considers BAR==0 as invalid) */
addr = (~flip_dword(addr)+1)>>1; /* page0 is accessed through upper half of bar0 */ addr = (~flip_dword(addr)+1)>>1; /* page0 is accessed through upper half of bar0 */
pcic->cfg_stat |= 0x10000000; /* Setup mmap reg so we can reach bar0 */ pcic->cfg_stat |= 0x10000000; /* Setup mmap reg so we can reach bar0 */
page0[addr/4] = 0; /* Disable bytetwisting ... */ page0[addr/4] = 0; /* Disable bytetwisting ... */
#endif #endif
/* set 1:1 mapping between AHB -> PCI memory */ /* set 1:1 mapping between AHB -> PCI memory */
pcic->cfg_stat = (pcic->cfg_stat & 0x0fffffff) | PCI_MEM_START; pcic->cfg_stat = (pcic->cfg_stat & 0x0fffffff) | PCI_MEM_START;
/* and map system RAM at pci address 0x40000000 */ /* and map system RAM at pci address 0x40000000 */
pci_write_config_dword(0, 0, 0, 0x14, 0x40000000); pci_write_config_dword(0, 0, 0, 0x14, 0x40000000);
pcic->page1 = 0x40000000; pcic->page1 = 0x40000000;
/* set as bus master and enable pci memory responses */ /* set as bus master and enable pci memory responses */
pci_read_config_dword(0, 0, 0, 0x4, &data); pci_read_config_dword(0, 0, 0, 0x4, &data);
pci_write_config_dword(0, 0, 0, 0x4, data | 0x6); pci_write_config_dword(0, 0, 0, 0x4, data | 0x6);
return 0; return 0;
} }
@@ -264,16 +264,16 @@ int dma_to_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len) {
pcidma[1] = ahb_addr; pcidma[1] = ahb_addr;
pcidma[2] = pci_addr; pcidma[2] = pci_addr;
pcidma[3] = len; pcidma[3] = len;
pcidma[0] = 0x83; pcidma[0] = 0x83;
while ( (pcidma[0] & 0x4) == 0) while ( (pcidma[0] & 0x4) == 0)
; ;
if (pcidma[0] & 0x8) { /* error */ if (pcidma[0] & 0x8) { /* error */
ret = -1; ret = -1;
} }
pcidma[0] |= 0xC; pcidma[0] |= 0xC;
return ret; return ret;
} }
@@ -285,26 +285,26 @@ int dma_from_pci(unsigned int ahb_addr, unsigned int pci_addr, unsigned int len)
pcidma[1] = ahb_addr; pcidma[1] = ahb_addr;
pcidma[2] = pci_addr; pcidma[2] = pci_addr;
pcidma[3] = len; pcidma[3] = len;
pcidma[0] = 0x81; pcidma[0] = 0x81;
while ( (pcidma[0] & 0x4) == 0) while ( (pcidma[0] & 0x4) == 0)
; ;
if (pcidma[0] & 0x8) { /* error */ if (pcidma[0] & 0x8) { /* error */
ret = -1; ret = -1;
} }
pcidma[0] |= 0xC; pcidma[0] |= 0xC;
return ret; return ret;
} }
void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char function) { void pci_mem_enable(unsigned char bus, unsigned char slot, unsigned char function) {
unsigned int data; unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data); pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY); pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MEMORY);
} }
@@ -312,7 +312,7 @@ void pci_master_enable(unsigned char bus, unsigned char slot, unsigned char func
unsigned int data; unsigned int data;
pci_read_config_dword(0, slot, function, PCI_COMMAND, &data); pci_read_config_dword(0, slot, function, PCI_COMMAND, &data);
pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER); pci_write_config_dword(0, slot, function, PCI_COMMAND, data | PCI_COMMAND_MASTER);
} }
@@ -330,8 +330,8 @@ static inline void swap_res(struct pci_res **p1, struct pci_res **p2) {
* single function and multi function devices. All allocated devices are enabled and * single function and multi function devices. All allocated devices are enabled and
* latency timers are set to 40. * latency timers are set to 40.
* *
* NOTE that it only allocates PCI memory space devices (that are at least 1 KB). * NOTE that it only allocates PCI memory space devices (that are at least 1 KB).
* IO spaces are not enabled. Also, it does not handle pci-pci bridges. They are left disabled. * IO spaces are not enabled. Also, it does not handle pci-pci bridges. They are left disabled.
* *
* *
*/ */
@@ -344,7 +344,7 @@ void pci_allocate_resources(void) {
res = (struct pci_res **) malloc(sizeof(struct pci_res *)*32*8*6); res = (struct pci_res **) malloc(sizeof(struct pci_res *)*32*8*6);
for (i = 0; i < 32*8*6; i++) { for (i = 0; i < 32*8*6; i++) {
res[i] = (struct pci_res *) malloc(sizeof(struct pci_res)); res[i] = (struct pci_res *) malloc(sizeof(struct pci_res));
res[i]->size = 0; res[i]->size = 0;
res[i]->devfn = i; res[i]->devfn = i;
} }
@@ -361,7 +361,7 @@ void pci_allocate_resources(void) {
} }
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header); pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
if(header & PCI_MULTI_FUNCTION) { if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS; numfuncs = PCI_MAX_FUNCTIONS;
} }
@@ -381,7 +381,7 @@ void pci_allocate_resources(void) {
if (tmp == PCI_CLASS_BRIDGE_PCI) { if (tmp == PCI_CLASS_BRIDGE_PCI) {
continue; continue;
} }
for (pos = 0; pos < 6; pos++) { for (pos = 0; pos < 6; pos++) {
pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff); pci_write_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), 0xffffffff);
pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size); pci_read_config_dword(0, slot, func, PCI_BASE_ADDRESS_0 + (pos<<2), &size);
@@ -403,7 +403,7 @@ void pci_allocate_resources(void) {
} }
/* Sort the resources in descending order */ /* Sort the resources in descending order */
swapped = 1; swapped = 1;
while (swapped == 1) { while (swapped == 1) {
swapped = 0; swapped = 0;
@@ -427,32 +427,32 @@ void pci_allocate_resources(void) {
printk("Out of PCI memory space, all devices not configured.\n"); printk("Out of PCI memory space, all devices not configured.\n");
goto done; goto done;
} }
dev = res[i]->devfn >> 3; dev = res[i]->devfn >> 3;
fn = res[i]->devfn & 7; fn = res[i]->devfn & 7;
DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar); DBG("Assigning PCI addr %x to device %d, function %d, bar %d\n", addr, dev, fn, res[i]->bar);
pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr); pci_write_config_dword(0, dev, fn, PCI_BASE_ADDRESS_0+res[i]->bar*4, addr);
addr += res[i]->size; addr += res[i]->size;
/* Set latency timer to 64 */ /* Set latency timer to 64 */
pci_read_config_dword(0, dev, fn, 0xC, &tmp); pci_read_config_dword(0, dev, fn, 0xC, &tmp);
pci_write_config_dword(0, dev, fn, 0xC, tmp|0x4000); pci_write_config_dword(0, dev, fn, 0xC, tmp|0x4000);
pci_mem_enable(0, dev, fn); pci_mem_enable(0, dev, fn);
}
}
done: done:
#ifdef PCI_INFO #ifdef PCI_INFO
printk("\nPCI devices found and configured:\n"); printk("\nPCI devices found and configured:\n");
for (slot = 1; slot < PCI_MAX_DEVICES; slot++) { for (slot = 1; slot < PCI_MAX_DEVICES; slot++) {
pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header); pci_read_config_byte(0, slot, 0, PCI_HEADER_TYPE, &header);
if(header & PCI_MULTI_FUNCTION) { if(header & PCI_MULTI_FUNCTION) {
numfuncs = PCI_MAX_FUNCTIONS; numfuncs = PCI_MAX_FUNCTIONS;
} }
@@ -461,15 +461,15 @@ done:
} }
for (func = 0; func < numfuncs; func++) { for (func = 0; func < numfuncs; func++) {
pci_read_config_dword(0, slot, func, PCI_COMMAND, &tmp); pci_read_config_dword(0, slot, func, PCI_COMMAND, &tmp);
if (tmp & PCI_COMMAND_MEMORY) { if (tmp & PCI_COMMAND_MEMORY) {
pci_read_config_dword(0, slot, func, PCI_VENDOR_ID, &id); pci_read_config_dword(0, slot, func, PCI_VENDOR_ID, &id);
if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue; if (id == PCI_INVALID_VENDORDEVICEID || id == 0) continue;
printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16); printk("\nSlot %d function: %d\nVendor id: 0x%x, device id: 0x%x\n", slot, func, id & 0xffff, id>>16);
for (pos = 0; pos < 6; pos++) { for (pos = 0; pos < 6; pos++) {
@@ -479,17 +479,17 @@ done:
printk("\tBAR %d: %x\n", pos, tmp); printk("\tBAR %d: %x\n", pos, tmp);
} }
} }
printk("\n"); printk("\n");
} }
} }
} }
printk("\n"); printk("\n");
#endif #endif
for (i = 0; i < 1536; i++) { for (i = 0; i < 1536; i++) {
free(res[i]); free(res[i]);
} }
@@ -503,7 +503,7 @@ int init_pci(void)
unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs; unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs;
unsigned char ucHeader; unsigned char ucHeader;
unsigned char ucMaxSubordinate; unsigned char ucMaxSubordinate;
unsigned int ulClass, ulDeviceID; unsigned int ulClass, ulDeviceID;
DBG("Initializing PCI\n"); DBG("Initializing PCI\n");
if ( init_grpci() ) { if ( init_grpci() ) {

6
c/src/lib/libbsp/sparc/leon3/shmsupp/getcfg.c
View File

@@ -87,7 +87,7 @@ void Shm_Get_configuration(
extern rtems_configuration_table Configuration; extern rtems_configuration_table Configuration;
int i; int i;
unsigned int tmp; unsigned int tmp;
BSP_shm_cfgtbl.base = 0x40000000; BSP_shm_cfgtbl.base = 0x40000000;
BSP_shm_cfgtbl.length = 0x00001000; BSP_shm_cfgtbl.length = 0x00001000;
BSP_shm_cfgtbl.format = SHM_BIG; BSP_shm_cfgtbl.format = SHM_BIG;
@@ -108,7 +108,7 @@ void Shm_Get_configuration(
BSP_shm_cfgtbl.poll_intr = INTR_MODE; BSP_shm_cfgtbl.poll_intr = INTR_MODE;
BSP_shm_cfgtbl.Intr.address = BSP_shm_cfgtbl.Intr.address =
(vol_u32) &(LEON3_IrqCtrl_Regs->force[LEON3_Cpu_Index]); (vol_u32) &(LEON3_IrqCtrl_Regs->force[LEON3_Cpu_Index]);
BSP_shm_cfgtbl.Intr.value = 1 << LEON3_MP_IRQ ; BSP_shm_cfgtbl.Intr.value = 1 << LEON3_MP_IRQ ;
BSP_shm_cfgtbl.Intr.length = 4; BSP_shm_cfgtbl.Intr.length = 4;
if (LEON3_Cpu_Index == 0) { if (LEON3_Cpu_Index == 0) {
@@ -116,7 +116,7 @@ void Shm_Get_configuration(
for (i = 1; for (i = 1;
i < (Configuration.User_multiprocessing_table)->maximum_nodes+1; i++) i < (Configuration.User_multiprocessing_table)->maximum_nodes+1; i++)
tmp |= (1 << i); tmp |= (1 << i);
LEON3_IrqCtrl_Regs->mpstat = tmp; LEON3_IrqCtrl_Regs->mpstat = tmp;
} }
*shmcfg = &BSP_shm_cfgtbl; *shmcfg = &BSP_shm_cfgtbl;

6
c/src/lib/libbsp/sparc/leon3/shmsupp/lock.c
View File

@@ -45,10 +45,10 @@ asm(
".text\n" ".text\n"
".align 4\n" ".align 4\n"
"LEON3_Atomic_Swap:\n" "LEON3_Atomic_Swap:\n"
" retl\n" " retl\n"
" swapa [%o1] 1, %o0\n" " swapa [%o1] 1, %o0\n"
); );
void Shm_Lock( void Shm_Lock(

6
c/src/lib/libbsp/sparc/leon3/startup/bspidle.S
View File

@@ -15,9 +15,9 @@
*/ */
#include <rtems/asm.h> #include <rtems/asm.h>
/* LEON specific power-down function */ /* LEON specific power-down function */
.align 4 .align 4
@@ -26,6 +26,6 @@ SYM(bsp_idle_thread):
pwdloop: mov %g0, %asr19 pwdloop: mov %g0, %asr19
ba pwdloop ba pwdloop
nop nop
retl retl
nop nop

10
c/src/lib/libbsp/sparc/leon3/startup/bspstart.c
View File

@@ -24,21 +24,21 @@
/* /*
* Tells us if data cache snooping is available * Tells us if data cache snooping is available
*/ */
int CPU_SPARC_HAS_SNOOPING; int CPU_SPARC_HAS_SNOOPING;
/* /*
* set_snooping * set_snooping
* *
* Read the data cache configuration register to determine if * Read the data cache configuration register to determine if
* bus snooping is available. This is needed for some drivers so * bus snooping is available. This is needed for some drivers so
* that they can select the most efficient copy routines. * that they can select the most efficient copy routines.
* *
*/ */
static inline int set_snooping(void) static inline int set_snooping(void)
{ {
int tmp; int tmp;
asm(" lda [%1] 2, %0 " asm(" lda [%1] 2, %0 "
: "=r"(tmp) : "=r"(tmp)
: "r"(0xC) : "r"(0xC)

8
c/src/lib/libbsp/sparc/leon3/startup/setvec.c
View File

@@ -21,10 +21,10 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to LEON implementation of the SPARC by On-Line Applications * Ported to LEON implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$
@@ -44,13 +44,13 @@ rtems_isr_entry set_vector( /* returns old vector */
if ( type ) if ( type )
rtems_interrupt_catch( handler, vector, &previous_isr ); rtems_interrupt_catch( handler, vector, &previous_isr );
else else
_CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr ); _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
real_trap = SPARC_REAL_TRAP_NUMBER( vector ); real_trap = SPARC_REAL_TRAP_NUMBER( vector );
if ( LEON_INT_TRAP( real_trap ) ) { if ( LEON_INT_TRAP( real_trap ) ) {
source = LEON_TRAP_SOURCE( real_trap ); source = LEON_TRAP_SOURCE( real_trap );
LEON_Clear_interrupt( source ); LEON_Clear_interrupt( source );

26
c/src/lib/libbsp/sparc/leon3/startup/spurious.c
View File

@@ -1,11 +1,11 @@
/* /*
* LEON Spurious Trap Handler * LEON Spurious Trap Handler
* *
* This is just enough of a trap handler to let us know what * This is just enough of a trap handler to let us know what
* the likely source of the trap was. * the likely source of the trap was.
* *
* Developed as part of the port of RTEMS to the LEON implementation * Developed as part of the port of RTEMS to the LEON implementation
* of the SPARC by On-Line Applications Research Corporation (OAR) * of the SPARC by On-Line Applications Research Corporation (OAR)
* under contract to the European Space Agency (ESA). * under contract to the European Space Agency (ESA).
* *
* COPYRIGHT (c) 1995. European Space Agency. * COPYRIGHT (c) 1995. European Space Agency.
@@ -46,34 +46,34 @@ rtems_isr bsp_spurious_handler(
* First the ones defined by the basic architecture * First the ones defined by the basic architecture
*/ */
case 0x00: case 0x00:
printk( "reset\n" ); printk( "reset\n" );
break; break;
case 0x01: case 0x01:
printk( "instruction access exception\n" ); printk( "instruction access exception\n" );
break; break;
case 0x02: case 0x02:
printk( "illegal instruction\n" ); printk( "illegal instruction\n" );
break; break;
case 0x03: case 0x03:
printk( "privileged instruction\n" ); printk( "privileged instruction\n" );
break; break;
case 0x04: case 0x04:
printk( "fp disabled\n" ); printk( "fp disabled\n" );
break; break;
case 0x07: case 0x07:
printk( "memory address not aligned\n" ); printk( "memory address not aligned\n" );
break; break;
case 0x08: case 0x08:
printk( "fp exception\n" ); printk( "fp exception\n" );
break; break;
case 0x09: case 0x09:
printk( "Unexpected trap (0x%2d) at address XXX\n", printk( "Unexpected trap (0x%2d) at address XXX\n",
real_trap real_trap
/* XXX FIXME isf->tpc */ /* XXX FIXME isf->tpc */
); );
break; break;
case 0x0A: case 0x0A:
printk( "tag overflow\n" ); printk( "tag overflow\n" );
break; break;
@@ -150,7 +150,7 @@ void bsp_spurious_initialize()
*/ */
if (( trap == 5 || trap == 6 ) || if (( trap == 5 || trap == 6 ) ||
(( trap >= 0x11 ) && ( trap <= 0x1f )) || (( trap >= 0x11 ) && ( trap <= 0x1f )) ||
(( trap >= 0x70 ) && ( trap <= 0x83 ))) (( trap >= 0x70 ) && ( trap <= 0x83 )))
continue; continue;

12
c/src/lib/libbsp/sparc/leon3/timer/timer.c
View File

@@ -10,10 +10,10 @@
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* Ported to LEON implementation of the SPARC by On-Line Applications * Ported to LEON implementation of the SPARC by On-Line Applications
* Research Corporation (OAR) under contract to the European Space * Research Corporation (OAR) under contract to the European Space
* Agency (ESA). * Agency (ESA).
* *
* LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995. * LEON modifications of respective RTEMS file: COPYRIGHT (c) 1995.
* European Space Agency. * European Space Agency.
* *
* $Id$ * $Id$
@@ -26,7 +26,7 @@
#define LEON3_TIMER_INDEX \ #define LEON3_TIMER_INDEX \
((rtems_configuration_get_user_multiprocessing_table()) ? \ ((rtems_configuration_get_user_multiprocessing_table()) ? \
(rtems_configuration_get_user_multiprocessing_table()->node) - 1 : 1) (rtems_configuration_get_user_multiprocessing_table()->node) - 1 : 1)
#else #else
#define LEON3_TIMER_INDEX 0 #define LEON3_TIMER_INDEX 0
#endif #endif
@@ -63,12 +63,12 @@ int benchmark_timer_read(void)
if (LEON3_Timer_Regs) { if (LEON3_Timer_Regs) {
total = LEON3_Timer_Regs->timer[LEON3_TIMER_INDEX].value; total = LEON3_Timer_Regs->timer[LEON3_TIMER_INDEX].value;
total = 0xffffff - total; total = 0xffffff - total;
if ( benchmark_timer_find_average_overhead == true ) if ( benchmark_timer_find_average_overhead == true )
return total; /* in one microsecond units */ return total; /* in one microsecond units */
if ( total < LEAST_VALID ) if ( total < LEAST_VALID )
return 0; /* below timer resolution */ return 0; /* below timer resolution */

318
c/src/lib/libbsp/sparc/shared/1553/b1553brm.c
View File

@@ -1,5 +1,5 @@
/* /*
* BRM driver * BRM driver
* *
* COPYRIGHT (c) 2006. * COPYRIGHT (c) 2006.
* Gaisler Research. * Gaisler Research.
@@ -21,7 +21,7 @@
#endif #endif
/* default name to /dev/brm */ /* default name to /dev/brm */
#if !defined(B1553BRM_DEVNAME) || !defined(B1553BRM_DEVNAME_NO) #if !defined(B1553BRM_DEVNAME) || !defined(B1553BRM_DEVNAME_NO)
#undef B1553BRM_DEVNAME #undef B1553BRM_DEVNAME
#undef B1553BRM_DEVNAME_NO #undef B1553BRM_DEVNAME_NO
#define B1553BRM_DEVNAME "/dev/brm0" #define B1553BRM_DEVNAME "/dev/brm0"
@@ -68,7 +68,7 @@
/* EVENT_QUEUE_SIZE sets the size of the event queue /* EVENT_QUEUE_SIZE sets the size of the event queue
*/ */
#define EVENT_QUEUE_SIZE 1024 #define EVENT_QUEUE_SIZE 1024
#define INDEX(x) ( x&(EVENT_QUEUE_SIZE-1) ) #define INDEX(x) ( x&(EVENT_QUEUE_SIZE-1) )
@@ -76,13 +76,13 @@
#ifdef DEBUG #ifdef DEBUG
#define DBG(x...) printk(x) #define DBG(x...) printk(x)
#else #else
#define DBG(x...) #define DBG(x...)
#endif #endif
#ifdef FUNCDEBUG #ifdef FUNCDEBUG
#define FUNCDBG(x...) printk(x) #define FUNCDBG(x...) printk(x)
#else #else
#define FUNCDBG(x...) #define FUNCDBG(x...)
#endif #endif
#define READ_REG(address) _BRM_REG_READ16((unsigned int)address) #define READ_REG(address) _BRM_REG_READ16((unsigned int)address)
@@ -132,7 +132,7 @@ struct irq_log_list {
volatile unsigned short iaw; volatile unsigned short iaw;
}; };
typedef struct { typedef struct {
unsigned int memarea_base; unsigned int memarea_base;
struct brm_reg *regs; struct brm_reg *regs;
@@ -140,7 +140,7 @@ typedef struct {
/* BRM descriptors */ /* BRM descriptors */
struct desc_table { struct desc_table {
volatile unsigned short ctrl; volatile unsigned short ctrl;
volatile unsigned short top; volatile unsigned short top;
volatile unsigned short cur; volatile unsigned short cur;
volatile unsigned short bot; volatile unsigned short bot;
@@ -160,7 +160,7 @@ typedef struct {
unsigned short ba; /* branch address */ unsigned short ba; /* branch address */
unsigned short timer; /* timer value */ unsigned short timer; /* timer value */
} descs[128]; /* 2k (1024 half words) */ } descs[128]; /* 2k (1024 half words) */
/* message data */ /* message data */
struct { struct {
unsigned short data[32]; /* 1 message's data */ unsigned short data[32]; /* 1 message's data */
@@ -191,7 +191,7 @@ typedef struct {
struct desc_table rxmodes[32]; struct desc_table rxmodes[32];
/* TX mode code descriptors */ /* TX mode code descriptors */
struct desc_table txmodes[32]; struct desc_table txmodes[32];
/* RX Sub Address messages */ /* RX Sub Address messages */
struct circ_buf rxsuba_msgs[32]; struct circ_buf rxsuba_msgs[32];
/* TX Sub Address messages */ /* TX Sub Address messages */
@@ -200,11 +200,11 @@ typedef struct {
struct circ_buf rxmode_msgs[32]; struct circ_buf rxmode_msgs[32];
/* RX Mode Code messages */ /* RX Mode Code messages */
struct circ_buf txmode_msgs[32]; struct circ_buf txmode_msgs[32];
/* offset to last 64bytes of 128k: tot-used-needed */ /* offset to last 64bytes of 128k: tot-used-needed */
unsigned short unused[(64*1024-(4*32*4+4*32*9*34))-16*2]; unsigned short unused[(64*1024-(4*32*4+4*32*9*34))-16*2];
/* interrupt log at 64 bytes from end */ /* interrupt log at 64 bytes from end */
struct irq_log_list irq_logs[16]; struct irq_log_list irq_logs[16];
} *rtmem; } *rtmem;
@@ -224,7 +224,7 @@ typedef struct {
struct desc_table rxmodes[32]; struct desc_table rxmodes[32];
/* TX mode code descriptors */ /* TX mode code descriptors */
struct desc_table txmodes[32]; struct desc_table txmodes[32];
/* RX Sub Address messages */ /* RX Sub Address messages */
struct circ_buf_2 rxsuba_msgs[32]; struct circ_buf_2 rxsuba_msgs[32];
/* TX Sub Address messages */ /* TX Sub Address messages */
@@ -233,11 +233,11 @@ typedef struct {
struct circ_buf_2 rxmode_msgs[32]; struct circ_buf_2 rxmode_msgs[32];
/* RX Mode Code messages */ /* RX Mode Code messages */
struct circ_buf_1 txmode_msgs[32]; struct circ_buf_1 txmode_msgs[32];
/* offset to last 64bytes of 16k: tot-used-needed */ /* offset to last 64bytes of 16k: tot-used-needed */
unsigned short unused[8*1024 -(4*32*4 +3*32*2*34 +1*32*1*34) -16*2]; unsigned short unused[8*1024 -(4*32*4 +3*32*2*34 +1*32*1*34) -16*2];
/* interrupt log at 64 bytes from end */ /* interrupt log at 64 bytes from end */
struct irq_log_list irq_logs[16]; struct irq_log_list irq_logs[16];
} *rtmem; } *rtmem;
@@ -266,11 +266,11 @@ typedef struct {
int minor; int minor;
int irqno; int irqno;
unsigned int mode; unsigned int mode;
#ifdef DEBUG #ifdef DEBUG
unsigned int log[EVENT_QUEUE_SIZE*4]; unsigned int log[EVENT_QUEUE_SIZE*4];
unsigned int log_i; unsigned int log_i;
#endif #endif
rtems_id event_id; /* event that may be signalled upon errors, needs to be set through ioctl command BRM_SET_EVENTID */ rtems_id event_id; /* event that may be signalled upon errors, needs to be set through ioctl command BRM_SET_EVENTID */
unsigned int status; unsigned int status;
int bc_list_fail; int bc_list_fail;
@@ -298,7 +298,7 @@ static int odd_parity(unsigned int data) {
{ {
i++; i++;
data &= (data - 1); data &= (data - 1);
} }
return !(i&1); return !(i&1);
} }
@@ -346,25 +346,25 @@ int B1553BRM_PREFIX(_register)(amba_confarea_type *bus, unsigned int clksel, uns
rtems_device_major_number m; rtems_device_major_number m;
FUNCDBG("brm_register:\n\r"); FUNCDBG("brm_register:\n\r");
/* save amba bus pointer */ /* save amba bus pointer */
amba_bus = bus; amba_bus = bus;
if ( !bus ){ if ( !bus ){
printk("brm_register: bus is NULL\n\r"); printk("brm_register: bus is NULL\n\r");
return 1; return 1;
} }
#ifdef B1553BRM_LOCAL_MEM #ifdef B1553BRM_LOCAL_MEM
allbrm_memarea = B1553BRM_LOCAL_MEM_ADR; allbrm_memarea = B1553BRM_LOCAL_MEM_ADR;
#else #else
allbrm_memarea = 0; allbrm_memarea = 0;
#endif #endif
/* Save clksel, clkdiv and brm_freq for later use */ /* Save clksel, clkdiv and brm_freq for later use */
allbrm_cfg_clksel = clksel & CLKSEL_MASK; allbrm_cfg_clksel = clksel & CLKSEL_MASK;
allbrm_cfg_clkdiv = clkdiv & CLKDIV_MASK; allbrm_cfg_clkdiv = clkdiv & CLKDIV_MASK;
allbrm_cfg_freq = brm_freq & BRM_FREQ_MASK; allbrm_cfg_freq = brm_freq & BRM_FREQ_MASK;
if ((r = rtems_io_register_driver(0, &brm_driver, &m)) == RTEMS_SUCCESSFUL) { if ((r = rtems_io_register_driver(0, &brm_driver, &m)) == RTEMS_SUCCESSFUL) {
DBG("BRM: driver successfully registered, major: %d\n",m); DBG("BRM: driver successfully registered, major: %d\n",m);
@@ -404,12 +404,12 @@ static rtems_device_driver rt_init(brm_priv *brm) {
if ( brm->rt_event ) if ( brm->rt_event )
free(brm->rt_event); free(brm->rt_event);
brm->bcmem = NULL; brm->bcmem = NULL;
brm->rtmem = (void *)brm->mem; brm->rtmem = (void *)brm->mem;
brm->rt_event = (struct rt_msg *) malloc(EVENT_QUEUE_SIZE*sizeof(struct rt_msg)); brm->rt_event = (struct rt_msg *) malloc(EVENT_QUEUE_SIZE*sizeof(struct rt_msg));
if (brm->rt_event == NULL) { if (brm->rt_event == NULL) {
DBG("BRM driver failed to allocated memory."); DBG("BRM driver failed to allocated memory.");
return RTEMS_NO_MEMORY; return RTEMS_NO_MEMORY;
@@ -426,7 +426,7 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1; brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1;
brm->regs->w_irqctrl = 6; brm->regs->w_irqctrl = 6;
brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base); brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base);
clr_int_logs(brm->irq_log); clr_int_logs(brm->irq_log);
/* Legalize all commands */ /* Legalize all commands */
@@ -434,19 +434,19 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->regs->rt_cmd_leg[i] = 0; brm->regs->rt_cmd_leg[i] = 0;
} }
/* Init descriptor table /* Init descriptor table
* *
* Each circular buffer has room for 8 messages with up to 34 (32 data + miw + time) words (16b) in each. * Each circular buffer has room for 8 messages with up to 34 (32 data + miw + time) words (16b) in each.
* The buffers must separated by 34 words. * The buffers must separated by 34 words.
*/ */
/* RX Sub-address 0 - 31 */ /* RX Sub-address 0 - 31 */
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
brm->rtmem->rxsubs[i].ctrl = 0x00E0; /* Interrupt: INTX, IWA, and IBRD */ brm->rtmem->rxsubs[i].ctrl = 0x00E0; /* Interrupt: INTX, IWA, and IBRD */
brm->rtmem->rxsubs[i].top = OFS(brm->rtmem->rxsuba_msgs[i]); /* Top address */ brm->rtmem->rxsubs[i].top = OFS(brm->rtmem->rxsuba_msgs[i]); /* Top address */
brm->rtmem->rxsubs[i].cur = OFS(brm->rtmem->rxsuba_msgs[i]); /* Current address */ brm->rtmem->rxsubs[i].cur = OFS(brm->rtmem->rxsuba_msgs[i]); /* Current address */
brm->rtmem->rxsubs[i].bot = OFS(brm->rtmem->rxsuba_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */ brm->rtmem->rxsubs[i].bot = OFS(brm->rtmem->rxsuba_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */
brm->last_read[i] = OFS(brm->rtmem->rxsuba_msgs[i]); brm->last_read[i] = OFS(brm->rtmem->rxsuba_msgs[i]);
} }
/* TX Sub-address 0 - 31 */ /* TX Sub-address 0 - 31 */
@@ -465,7 +465,7 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->rtmem->rxmodes[i].cur = OFS(brm->rtmem->rxmode_msgs[i]); /* Current address */ brm->rtmem->rxmodes[i].cur = OFS(brm->rtmem->rxmode_msgs[i]); /* Current address */
brm->rtmem->rxmodes[i].bot = OFS(brm->rtmem->rxmode_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */ brm->rtmem->rxmodes[i].bot = OFS(brm->rtmem->rxmode_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */
brm->last_read[i+64] = OFS(brm->rtmem->rxmode_msgs[i]); brm->last_read[i+64] = OFS(brm->rtmem->rxmode_msgs[i]);
} }
/* TX mode code 0 - 31 */ /* TX mode code 0 - 31 */
for (i = 0; i < 32; i++) { for (i = 0; i < 32; i++) {
brm->rtmem->txmodes[i].ctrl = 0x0060; /* Interrupt: IWA and IBRD */ brm->rtmem->txmodes[i].ctrl = 0x0060; /* Interrupt: IWA and IBRD */
@@ -474,7 +474,7 @@ static rtems_device_driver rt_init(brm_priv *brm) {
brm->rtmem->txmodes[i].bot = OFS(brm->rtmem->txmode_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */ brm->rtmem->txmodes[i].bot = OFS(brm->rtmem->txmode_msgs[i+1]) - sizeof(struct msg)/2; /* Bottom address */
brm->last_read[i+96] = OFS(brm->rtmem->txmode_msgs[i]); brm->last_read[i+96] = OFS(brm->rtmem->txmode_msgs[i]);
} }
brm->mode = BRM_MODE_RT; brm->mode = BRM_MODE_RT;
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
@@ -489,14 +489,14 @@ static rtems_device_driver bc_init(brm_priv *brm){
if ( brm->rt_event ) if ( brm->rt_event )
free(brm->rt_event); free(brm->rt_event);
brm->rt_event = NULL; brm->rt_event = NULL;
brm->bcmem = (void *)brm->mem; brm->bcmem = (void *)brm->mem;
brm->rtmem = NULL; brm->rtmem = NULL;
brm->irq_log = (struct irq_log_list *)&brm->bcmem->irq_logs[0]; brm->irq_log = (struct irq_log_list *)&brm->bcmem->irq_logs[0];
brm->head = brm->tail = 0; brm->head = brm->tail = 0;
brm->rx_blocking = brm->tx_blocking = 1; brm->rx_blocking = brm->tx_blocking = 1;
brm->regs->ctrl = 0x0006; /* ping pong enable and enable interrupt log */ brm->regs->ctrl = 0x0006; /* ping pong enable and enable interrupt log */
brm->regs->oper = 0x0800; /* configure as BC */ brm->regs->oper = 0x0800; /* configure as BC */
brm->regs->imask = BRM_EOL_IRQ|BRM_BC_ILLCMD_IRQ|BRM_ILLOP_IRQ|BRM_DMAF_IRQ|BRM_WRAPF_IRQ|BRM_MERR_IRQ; brm->regs->imask = BRM_EOL_IRQ|BRM_BC_ILLCMD_IRQ|BRM_ILLOP_IRQ|BRM_DMAF_IRQ|BRM_WRAPF_IRQ|BRM_MERR_IRQ;
@@ -507,11 +507,11 @@ static rtems_device_driver bc_init(brm_priv *brm){
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1; brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1;
brm->regs->w_irqctrl = 6; brm->regs->w_irqctrl = 6;
brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base); brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base);
clr_int_logs(brm->irq_log); clr_int_logs(brm->irq_log);
brm->mode = BRM_MODE_BC; brm->mode = BRM_MODE_BC;
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
@@ -527,12 +527,12 @@ static rtems_device_driver bm_init(brm_priv *brm) {
if ( brm->bm_event ) if ( brm->bm_event )
free(brm->bm_event); free(brm->bm_event);
brm->bcmem = NULL; brm->bcmem = NULL;
brm->rtmem = NULL; brm->rtmem = NULL;
brm->bm_event = (struct bm_msg *) malloc(EVENT_QUEUE_SIZE*sizeof(struct bm_msg)); brm->bm_event = (struct bm_msg *) malloc(EVENT_QUEUE_SIZE*sizeof(struct bm_msg));
if (brm->bm_event == NULL) { if (brm->bm_event == NULL) {
DBG("BRM driver failed to allocated memory."); DBG("BRM driver failed to allocated memory.");
return RTEMS_NO_MEMORY; return RTEMS_NO_MEMORY;
@@ -553,11 +553,11 @@ static rtems_device_driver bm_init(brm_priv *brm) {
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1; brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5) | 1;
brm->regs->w_irqctrl = 6; brm->regs->w_irqctrl = 6;
brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base); brm->regs->w_ahbaddr = (unsigned int) memarea_to_hw(brm->memarea_base);
clr_int_logs(brm->irq_log); clr_int_logs(brm->irq_log);
brm->mode = BRM_MODE_BM; brm->mode = BRM_MODE_BM;
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
@@ -570,12 +570,12 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
brm_priv *brm; brm_priv *brm;
amba_ahb_device ambadev; amba_ahb_device ambadev;
char *mem; char *mem;
FUNCDBG("brm_initialize\n"); FUNCDBG("brm_initialize\n");
brm_cores = 0; brm_cores = 0;
strcpy(fs_name,B1553BRM_DEVNAME); strcpy(fs_name,B1553BRM_DEVNAME);
/* Find all BRM devices */ /* Find all BRM devices */
dev_cnt = amba_get_number_ahbslv_devices(amba_bus,VENDOR_GAISLER,GAISLER_BRM); dev_cnt = amba_get_number_ahbslv_devices(amba_bus,VENDOR_GAISLER,GAISLER_BRM);
if ( dev_cnt < 1 ){ if ( dev_cnt < 1 ){
@@ -583,16 +583,16 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
printk("BRM: Failed to find any BRM cores\n\r"); printk("BRM: Failed to find any BRM cores\n\r");
return -1; return -1;
} }
/* allocate & zero memory for the brm devices */ /* allocate & zero memory for the brm devices */
brms = (brm_priv *)malloc(sizeof(*brms)*dev_cnt); brms = (brm_priv *)malloc(sizeof(*brms)*dev_cnt);
if ( !brms ){ if ( !brms ){
printk("BRM: Failed to allocate SW memory\n\r"); printk("BRM: Failed to allocate SW memory\n\r");
return -1; return -1;
} }
memset(brms,0,sizeof(*brms)*dev_cnt); memset(brms,0,sizeof(*brms)*dev_cnt);
/* Allocate memory for all device's descriptors, /* Allocate memory for all device's descriptors,
* they must be aligned to a XXX byte boundary. * they must be aligned to a XXX byte boundary.
*/ */
#define BRM_DESCS_PER_CTRL 128 #define BRM_DESCS_PER_CTRL 128
@@ -606,7 +606,7 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
printk("BRM: Failed to allocate HW memory\n\r"); printk("BRM: Failed to allocate HW memory\n\r");
return -1; return -1;
} }
/* align memory to 128k boundary */ /* align memory to 128k boundary */
mem = (char *)(((unsigned int)mem+0x1ffff) & ~0x1ffff); mem = (char *)(((unsigned int)mem+0x1ffff) & ~0x1ffff);
} }
@@ -617,34 +617,34 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
/* initialize each brm device, one at a time */ /* initialize each brm device, one at a time */
for(minor=0; minor<dev_cnt; minor++){ for(minor=0; minor<dev_cnt; minor++){
brm = &brms[minor]; brm = &brms[minor];
/* Get AMBA AHB device info from Plug&Play */ /* Get AMBA AHB device info from Plug&Play */
amba_find_next_ahbslv(amba_bus,VENDOR_GAISLER,GAISLER_BRM,&ambadev,minor); amba_find_next_ahbslv(amba_bus,VENDOR_GAISLER,GAISLER_BRM,&ambadev,minor);
/* Copy Basic HW info */ /* Copy Basic HW info */
brm->regs = (void *)ambadev.start[0]; brm->regs = (void *)ambadev.start[0];
brm->irqno = ambadev.irq; brm->irqno = ambadev.irq;
brm->minor = minor; brm->minor = minor;
brm->irq = 0; brm->irq = 0;
#ifdef DEBUG #ifdef DEBUG
brm->log_i = 0; brm->log_i = 0;
memset(brm->log,0,sizeof(brm->log)); memset(brm->log,0,sizeof(brm->log));
#endif #endif
/* Set unique name */ /* Set unique name */
B1553BRM_DEVNAME_NO(fs_name,minor); B1553BRM_DEVNAME_NO(fs_name,minor);
DBG("Registering BRM core at [0x%x] irq %d, minor %d as %s\n",brm->regs,brm->irqno,minor,fs_name); DBG("Registering BRM core at [0x%x] irq %d, minor %d as %s\n",brm->regs,brm->irqno,minor,fs_name);
/* Bind filesystem name to device number (minor) */ /* Bind filesystem name to device number (minor) */
status = rtems_io_register_name(fs_name, major, minor); status = rtems_io_register_name(fs_name, major, minor);
if (status != RTEMS_SUCCESSFUL) if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status); rtems_fatal_error_occurred(status);
/* RX Semaphore created with count = 0 */ /* RX Semaphore created with count = 0 */
if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'R', '0'+minor), if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'R', '0'+minor),
0, 0,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING, RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0, 0,
&brm->rx_sem) != RTEMS_SUCCESSFUL ){ &brm->rx_sem) != RTEMS_SUCCESSFUL ){
printk("BRM: Failed to create rx semaphore\n"); printk("BRM: Failed to create rx semaphore\n");
@@ -654,7 +654,7 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
/* TX Semaphore created with count = 1 */ /* TX Semaphore created with count = 1 */
if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'T', '0'+minor), if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'T', '0'+minor),
1, 1,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING, RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0, 0,
&brm->tx_sem) != RTEMS_SUCCESSFUL ){ &brm->tx_sem) != RTEMS_SUCCESSFUL ){
printk("BRM: Failed to create tx semaphore\n"); printk("BRM: Failed to create tx semaphore\n");
@@ -664,69 +664,69 @@ static rtems_device_driver brm_initialize(rtems_device_major_number major, rtems
/* Device Semaphore created with count = 1 */ /* Device Semaphore created with count = 1 */
if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'D', '0'+minor), if ( rtems_semaphore_create(rtems_build_name('B', 'M', 'D', '0'+minor),
1, 1,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING, RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0, 0,
&brm->dev_sem) != RTEMS_SUCCESSFUL ){ &brm->dev_sem) != RTEMS_SUCCESSFUL ){
printk("BRM: Failed to create device semaphore\n"); printk("BRM: Failed to create device semaphore\n");
return RTEMS_INTERNAL_ERROR; return RTEMS_INTERNAL_ERROR;
} }
/* Set base address of all descriptors */ /* Set base address of all descriptors */
brm->memarea_base = (unsigned int)&mem[(128*1024) * minor]; brm->memarea_base = (unsigned int)&mem[(128*1024) * minor];
brm->desc = (struct desc_table *) brm->memarea_base; brm->desc = (struct desc_table *) brm->memarea_base;
brm->mem = (volatile unsigned short *) brm->memarea_base; brm->mem = (volatile unsigned short *) brm->memarea_base;
brm->irq_log = (struct irq_log_list *)(brm->memarea_base + (0xFFE0<<1)); /* last 64byte */ brm->irq_log = (struct irq_log_list *)(brm->memarea_base + (0xFFE0<<1)); /* last 64byte */
brm->bm_event = NULL; brm->bm_event = NULL;
brm->rt_event = NULL; brm->rt_event = NULL;
/* Sel clock so that we can write to BRM's registers */ /* Sel clock so that we can write to BRM's registers */
brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5); brm->regs->w_ctrl = (allbrm_cfg_clksel<<9) | (allbrm_cfg_clkdiv<<5);
/* Reset BRM core */ /* Reset BRM core */
brm->regs->w_ctrl = 1<<10 | READ_REG(&brm->regs->w_ctrl); brm->regs->w_ctrl = 1<<10 | READ_REG(&brm->regs->w_ctrl);
/* Register interrupt handler */ /* Register interrupt handler */
B1553BRM_REG_INT(B1553BRM_PREFIX(_interrupt_handler), brm->irqno, brm); B1553BRM_REG_INT(B1553BRM_PREFIX(_interrupt_handler), brm->irqno, brm);
rt_init(brm); rt_init(brm);
DBG("BRM: LOG: 0x%lx, 0x%lx\n\r",brm->log,brm); DBG("BRM: LOG: 0x%lx, 0x%lx\n\r",brm->log,brm);
} }
/* save number of BRM cores found */ /* save number of BRM cores found */
brm_cores = dev_cnt; brm_cores = dev_cnt;
DBG("BRM initialisation done.\n"); DBG("BRM initialisation done.\n");
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
static rtems_device_driver brm_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) { static rtems_device_driver brm_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) {
brm_priv *brm; brm_priv *brm;
FUNCDBG("brm_open\n"); FUNCDBG("brm_open\n");
if (minor >= brm_cores) { if (minor >= brm_cores) {
DBG("Wrong minor %d\n", minor); DBG("Wrong minor %d\n", minor);
return RTEMS_UNSATISFIED; /* ENODEV */ return RTEMS_UNSATISFIED; /* ENODEV */
} }
brm = &brms[minor]; brm = &brms[minor];
if (rtems_semaphore_obtain(brm->dev_sem, RTEMS_NO_WAIT, RTEMS_NO_TIMEOUT) != RTEMS_SUCCESSFUL) { if (rtems_semaphore_obtain(brm->dev_sem, RTEMS_NO_WAIT, RTEMS_NO_TIMEOUT) != RTEMS_SUCCESSFUL) {
DBG("brm_open: resource in use\n"); DBG("brm_open: resource in use\n");
return RTEMS_RESOURCE_IN_USE; /* EBUSY */ return RTEMS_RESOURCE_IN_USE; /* EBUSY */
} }
/* Set defaults */ /* Set defaults */
brm->event_id = 0; brm->event_id = 0;
start_operation(brm); start_operation(brm);
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
static rtems_device_driver brm_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) static rtems_device_driver brm_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{ {
brm_priv *brm = &brms[minor]; brm_priv *brm = &brms[minor];
@@ -737,7 +737,7 @@ static rtems_device_driver brm_close(rtems_device_major_number major, rtems_devi
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
static int get_rt_messages(brm_priv *brm, void *buf, unsigned int msg_count) { static int get_rt_messages(brm_priv *brm, void *buf, unsigned int msg_count) {
struct rt_msg *dest = (struct rt_msg *) buf; struct rt_msg *dest = (struct rt_msg *) buf;
@@ -784,13 +784,13 @@ static rtems_device_driver brm_read(rtems_device_major_number major, rtems_devic
int count = 0; int count = 0;
brm_priv *brm = &brms[minor]; brm_priv *brm = &brms[minor];
int (*get_messages)(brm_priv *brm, void *buf, unsigned int count); int (*get_messages)(brm_priv *brm, void *buf, unsigned int count);
if ( ! (brm->mode & (BRM_MODE_RT | BRM_MODE_BM)) ){ if ( ! (brm->mode & (BRM_MODE_RT | BRM_MODE_BM)) ){
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
} }
rw_args = (rtems_libio_rw_args_t *) arg; rw_args = (rtems_libio_rw_args_t *) arg;
if ( ((READ_REG(&brm->regs->oper)>>8) & 3) == 1 ) { /* RT */ if ( ((READ_REG(&brm->regs->oper)>>8) & 3) == 1 ) { /* RT */
get_messages = get_rt_messages; get_messages = get_rt_messages;
} }
@@ -815,7 +815,7 @@ static rtems_device_driver brm_read(rtems_device_major_number major, rtems_devic
rw_args->bytes_moved = count; rw_args->bytes_moved = count;
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
@@ -825,16 +825,16 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
struct rt_msg *source; struct rt_msg *source;
unsigned int count=0, current, next, descriptor, wc, suba; unsigned int count=0, current, next, descriptor, wc, suba;
brm_priv *brm = &brms[minor]; brm_priv *brm = &brms[minor];
if ( ! (brm->mode & BRM_MODE_RT) ){ if ( ! (brm->mode & BRM_MODE_RT) ){
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
} }
rw_args = (rtems_libio_rw_args_t *) arg; rw_args = (rtems_libio_rw_args_t *) arg;
source = (struct rt_msg *) rw_args->buffer; source = (struct rt_msg *) rw_args->buffer;
FUNCDBG("brm_write [%i,%i]: buf: 0x%x len: %i\n",major, minor, (unsigned int)rw_args->buffer,rw_args->count); FUNCDBG("brm_write [%i,%i]: buf: 0x%x len: %i\n",major, minor, (unsigned int)rw_args->buffer,rw_args->count);
do { do {
descriptor = source[count].desc & 0x7F; descriptor = source[count].desc & 0x7F;
@@ -846,14 +846,14 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
if (descriptor < 32 || descriptor >= 64) if (descriptor < 32 || descriptor >= 64)
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
current = brm->desc[descriptor].cur; current = brm->desc[descriptor].cur;
next = brm->written[suba] + 2 + wc; next = brm->written[suba] + 2 + wc;
if (brm->written[suba] < current) { if (brm->written[suba] < current) {
if (next > current) { if (next > current) {
/* No room in transmission buffer */ /* No room in transmission buffer */
if (brm->tx_blocking && count == 0) { if (brm->tx_blocking && count == 0) {
rtems_semaphore_obtain(brm->tx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT); rtems_semaphore_obtain(brm->tx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
@@ -862,7 +862,7 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
/* return the number of messages sent so far */ /* return the number of messages sent so far */
break; break;
} }
else { else {
/* Translates to posix EBUSY */ /* Translates to posix EBUSY */
return RTEMS_RESOURCE_IN_USE; return RTEMS_RESOURCE_IN_USE;
} }
@@ -870,7 +870,7 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
} }
memcpy((void *)&brm->mem[brm->written[suba]], &source[count], (2+wc)*2); memcpy((void *)&brm->mem[brm->written[suba]], &source[count], (2+wc)*2);
count++; count++;
if (next >= brm->desc[descriptor].bot) { if (next >= brm->desc[descriptor].bot) {
@@ -879,8 +879,8 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
brm->written[suba] = next; brm->written[suba] = next;
} while (count < rw_args->count); } while (count < rw_args->count);
rw_args->bytes_moved = count; rw_args->bytes_moved = count;
if (count >= 0) { if (count >= 0) {
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
@@ -890,7 +890,7 @@ static rtems_device_driver brm_write(rtems_device_major_number major, rtems_devi
static rtems_device_driver brm_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) static rtems_device_driver brm_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{ {
unsigned int i=0; unsigned int i=0;
unsigned short ctrl, oper, cw1, cw2; unsigned short ctrl, oper, cw1, cw2;
rtems_libio_ioctl_args_t *ioarg = (rtems_libio_ioctl_args_t *) arg; rtems_libio_ioctl_args_t *ioarg = (rtems_libio_ioctl_args_t *) arg;
@@ -899,9 +899,9 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm_priv *brm = &brms[minor]; brm_priv *brm = &brms[minor];
rtems_device_driver ret; rtems_device_driver ret;
int len; int len;
FUNCDBG("brm_control[%d]: [%i,%i]\n",minor,major, minor); FUNCDBG("brm_control[%d]: [%i,%i]\n",minor,major, minor);
if (!ioarg) { if (!ioarg) {
DBG("brm_control: invalid argument\n"); DBG("brm_control: invalid argument\n");
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
@@ -917,17 +917,17 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
if (data[0] == 0) { if (data[0] == 0) {
ret = bc_init(brm); ret = bc_init(brm);
} }
else if (data[0] == 1) { else if (data[0] == 1) {
ret = rt_init(brm); ret = rt_init(brm);
} }
else if (data[0] == 2) { else if (data[0] == 2) {
ret = bm_init(brm); ret = bm_init(brm);
}else }else
ret = RTEMS_INVALID_NAME; ret = RTEMS_INVALID_NAME;
if ( ret != RTEMS_SUCCESSFUL) if ( ret != RTEMS_SUCCESSFUL)
return ret; return ret;
if ( brm->mode & (BRM_MODE_RT | BRM_MODE_BM ) ) if ( brm->mode & (BRM_MODE_RT | BRM_MODE_BM ) )
start_operation(brm); start_operation(brm);
break; break;
@@ -950,7 +950,7 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
start_operation(brm); start_operation(brm);
break; break;
case BRM_SET_RT_ADDR: case BRM_SET_RT_ADDR:
stop_operation(brm); stop_operation(brm);
oper = READ_REG(&brm->regs->oper); oper = READ_REG(&brm->regs->oper);
oper &= 0x03FF; /* Clear bit 15-10 ... */ oper &= 0x03FF; /* Clear bit 15-10 ... */
@@ -959,8 +959,8 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm->regs->oper = oper; brm->regs->oper = oper;
start_operation(brm); start_operation(brm);
break; break;
case BRM_SET_STD: case BRM_SET_STD:
stop_operation(brm); stop_operation(brm);
ctrl = READ_REG(&brm->regs->ctrl); ctrl = READ_REG(&brm->regs->ctrl);
ctrl &= 0xFF7F; /* Clear bit 7 ... */ ctrl &= 0xFF7F; /* Clear bit 7 ... */
@@ -979,12 +979,12 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
break; break;
case BRM_TX_BLOCK: case BRM_TX_BLOCK:
brm->tx_blocking = data[0]; brm->tx_blocking = data[0];
break; break;
case BRM_RX_BLOCK: case BRM_RX_BLOCK:
brm->rx_blocking = data[0]; brm->rx_blocking = data[0];
break; break;
case BRM_DO_LIST: case BRM_DO_LIST:
@@ -1029,7 +1029,7 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm->bcmem->descs[i].cw1 = cw1; brm->bcmem->descs[i].cw1 = cw1;
brm->bcmem->descs[i].cw2 = cw2; brm->bcmem->descs[i].cw2 = cw2;
/* data pointer: /* data pointer:
* (&brm->bcmem->msg_data[i].data[0] & 0x1ffff) / 2 * (&brm->bcmem->msg_data[i].data[0] & 0x1ffff) / 2
*/ */
brm->bcmem->descs[i].dptr = 1024+i*32; /* data pointer */ brm->bcmem->descs[i].dptr = 1024+i*32; /* data pointer */
brm->bcmem->descs[i].tsw[0] = 0; brm->bcmem->descs[i].tsw[0] = 0;
@@ -1038,27 +1038,27 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
brm->bcmem->descs[i].timer = 0; brm->bcmem->descs[i].timer = 0;
memcpy((void *)&brm->bcmem->msg_data[i].data[0], &cmd_list[i].data[0], cmd_list[i].wc*2); memcpy((void *)&brm->bcmem->msg_data[i].data[0], &cmd_list[i].data[0], cmd_list[i].wc*2);
i++; i++;
} }
brm->bcmem->descs[i].ctrl = 0; /* end of list */ brm->bcmem->descs[i].ctrl = 0; /* end of list */
start_operation(brm); start_operation(brm);
break; break;
case BRM_LIST_DONE: case BRM_LIST_DONE:
if ( brm->mode != BRM_MODE_BC ){ if ( brm->mode != BRM_MODE_BC ){
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
} }
/* Check if we are bus controller */ /* Check if we are bus controller */
if ( ((READ_REG(&brm->regs->oper)>>8) & 3) != 0 ) { if ( ((READ_REG(&brm->regs->oper)>>8) & 3) != 0 ) {
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
} }
if (is_executing(brm)) { if (is_executing(brm)) {
data[0] = 0; data[0] = 0;
@@ -1071,8 +1071,8 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
}else{ }else{
return RTEMS_RESOURCE_IN_USE; return RTEMS_RESOURCE_IN_USE;
} }
} }
else { else {
data[0] = 1; /* done */ data[0] = 1; /* done */
@@ -1083,8 +1083,8 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
while ( (brm->cur_list[i].ctrl & BC_EOL) == 0) { while ( (brm->cur_list[i].ctrl & BC_EOL) == 0) {
if (READ_DMA(&brm->bcmem->descs[i].ctrl) & 1) { if (READ_DMA(&brm->bcmem->descs[i].ctrl) & 1) {
brm->cur_list[i].ctrl |= 0x8000; /* Set BAME */ brm->cur_list[i].ctrl |= 0x8000; /* Set BAME */
} }
if (brm->cur_list[i].ctrl & BC_TR) { if (brm->cur_list[i].ctrl & BC_TR) {
/* RT Transmit command, copy received data */ /* RT Transmit command, copy received data */
len = brm->cur_list[i].wc; len = brm->cur_list[i].wc;
@@ -1103,15 +1103,15 @@ static rtems_device_driver brm_control(rtems_device_major_number major, rtems_de
case BRM_CLR_STATUS: case BRM_CLR_STATUS:
brm->status = 0; brm->status = 0;
break; break;
case BRM_GET_STATUS: /* copy status */ case BRM_GET_STATUS: /* copy status */
if ( !ioarg->buffer ) if ( !ioarg->buffer )
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
*(unsigned int *)ioarg->buffer = brm->status; *(unsigned int *)ioarg->buffer = brm->status;
break; break;
case BRM_SET_EVENTID: case BRM_SET_EVENTID:
brm->event_id = (rtems_id)ioarg->buffer; brm->event_id = (rtems_id)ioarg->buffer;
break; break;
@@ -1142,10 +1142,10 @@ static void brm_interrupt(brm_priv *brm) {
int signal_event=0; int signal_event=0;
unsigned int event_status=0; unsigned int event_status=0;
#define SET_ERROR_DESCRIPTOR(descriptor) (event_status = (event_status & 0x0000ffff) | descriptor<<16) #define SET_ERROR_DESCRIPTOR(descriptor) (event_status = (event_status & 0x0000ffff) | descriptor<<16)
while( (iiw=READ_REG(&brm->irq_log[brm->irq].iiw)) != 0xffff ){ while( (iiw=READ_REG(&brm->irq_log[brm->irq].iiw)) != 0xffff ){
iaw=READ_REG(&brm->irq_log[brm->irq].iaw); iaw=READ_REG(&brm->irq_log[brm->irq].iaw);
/* indicate that the interrupt log entry has been processed */ /* indicate that the interrupt log entry has been processed */
brm->irq_log[brm->irq].iiw = 0xffff; brm->irq_log[brm->irq].iiw = 0xffff;
@@ -1153,17 +1153,17 @@ static void brm_interrupt(brm_priv *brm) {
descriptor = iaw >> 2; descriptor = iaw >> 2;
pending = iiw; pending = iiw;
brm->irq = (brm->irq + 1) % 16; brm->irq = (brm->irq + 1) % 16;
/* Clear the log so that we */ /* Clear the log so that we */
/* Subaddress accessed irq (RT only) /* Subaddress accessed irq (RT only)
* *
* Can be either a receive or transmit command * Can be either a receive or transmit command
* as well as a mode code. * as well as a mode code.
*/ */
if (pending & BRM_SUBAD_IRQ) { if (pending & BRM_SUBAD_IRQ) {
/* Pointer to next free message in circular buffer */ /* Pointer to next free message in circular buffer */
current = READ_DMA(&brm->desc[descriptor].cur); current = READ_DMA(&brm->desc[descriptor].cur);
@@ -1177,29 +1177,29 @@ static void brm_interrupt(brm_priv *brm) {
if (descriptor < 32) { if (descriptor < 32) {
wc = wc ? wc : 32; wc = wc ? wc : 32;
} }
/* Data transmitted */ /* Data transmitted */
else if (descriptor < 64) { else if (descriptor < 64) {
wc = wc ? wc : 32; wc = wc ? wc : 32;
rtems_semaphore_release(brm->tx_sem); rtems_semaphore_release(brm->tx_sem);
} }
/* RX Mode code */ /* RX Mode code */
else if (descriptor < 96) { else if (descriptor < 96) {
wc = (wc>>4); wc = (wc>>4);
} }
/* TX Mode code */ /* TX Mode code */
else if (descriptor < 128) { else if (descriptor < 128) {
wc = (wc>>4); wc = (wc>>4);
} }
#ifdef DEBUG #ifdef DEBUG
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = (descriptor << 16) | wc; brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = (descriptor << 16) | wc;
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = current; brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = current;
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = msgadr; brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = msgadr;
#endif #endif
/* If there is room in the event queue, copy the event there */ /* If there is room in the event queue, copy the event there */
if (brm->head - brm->tail != EVENT_QUEUE_SIZE) { if (brm->head - brm->tail != EVENT_QUEUE_SIZE) {
/* Copy to event queue */ /* Copy to event queue */
brm->rt_event[INDEX(brm->head)].miw = READ_DMA(&brm->mem[msgadr]); brm->rt_event[INDEX(brm->head)].miw = READ_DMA(&brm->mem[msgadr]);
brm->rt_event[INDEX(brm->head)].time = READ_DMA(&brm->mem[msgadr+1]); brm->rt_event[INDEX(brm->head)].time = READ_DMA(&brm->mem[msgadr+1]);
@@ -1229,12 +1229,12 @@ static void brm_interrupt(brm_priv *brm) {
/* Wake any blocked rx thread */ /* Wake any blocked rx thread */
rtems_semaphore_release(brm->rx_sem); rtems_semaphore_release(brm->rx_sem);
} }
} }
if (pending & BRM_EOL_IRQ) { if (pending & BRM_EOL_IRQ) {
rtems_semaphore_release(brm->tx_sem); rtems_semaphore_release(brm->tx_sem);
} }
@@ -1246,17 +1246,17 @@ static void brm_interrupt(brm_priv *brm) {
} }
/* Monitor irq */ /* Monitor irq */
if (pending & BRM_MBC_IRQ) { if (pending & BRM_MBC_IRQ) {
stop_operation(brm); stop_operation(brm);
brm->regs->mbc = 1; brm->regs->mbc = 1;
start_operation(brm); start_operation(brm);
/* If there is room in the event queue, copy the event there */ /* If there is room in the event queue, copy the event there */
if (brm->head - brm->tail != EVENT_QUEUE_SIZE) { if (brm->head - brm->tail != EVENT_QUEUE_SIZE) {
/* Copy to event queue */ /* Copy to event queue */
brm->bm_event[INDEX(brm->head)].miw = READ_DMA(&brm->mem[0]); brm->bm_event[INDEX(brm->head)].miw = READ_DMA(&brm->mem[0]);
brm->bm_event[INDEX(brm->head)].cw1 = READ_DMA(&brm->mem[1]); brm->bm_event[INDEX(brm->head)].cw1 = READ_DMA(&brm->mem[1]);
brm->bm_event[INDEX(brm->head)].cw2 = READ_DMA(&brm->mem[2]); brm->bm_event[INDEX(brm->head)].cw2 = READ_DMA(&brm->mem[2]);
@@ -1276,7 +1276,7 @@ static void brm_interrupt(brm_priv *brm) {
} }
/* memcpy((void *)brm->bm_event[INDEX(brm->head)].data, &brm->mem[0x100], 32);*/ /* memcpy((void *)brm->bm_event[INDEX(brm->head)].data, &brm->mem[0x100], 32);*/
#ifdef DEBUG #ifdef DEBUG
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_REG(&brm->regs->mbc); brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_REG(&brm->regs->mbc);
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_DMA(&brm->mem[0]); brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_DMA(&brm->mem[0]);
brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_DMA(&brm->mem[1]); brm->log[brm->log_i++ % EVENT_QUEUE_SIZE] = READ_DMA(&brm->mem[1]);
@@ -1284,19 +1284,19 @@ static void brm_interrupt(brm_priv *brm) {
#endif #endif
brm->head++; brm->head++;
} }
else { else {
/* Indicate overrun */ /* Indicate overrun */
brm->rt_event[INDEX(brm->head)].miw |= 0x8000; brm->rt_event[INDEX(brm->head)].miw |= 0x8000;
} }
/* Wake any blocking thread */ /* Wake any blocking thread */
rtems_semaphore_release(brm->rx_sem); rtems_semaphore_release(brm->rx_sem);
} }
/* The reset of the interrupts /* The reset of the interrupts
* cause a event to be signalled * cause a event to be signalled
* so that user can handle error. * so that user can handle error.
*/ */
@@ -1307,59 +1307,59 @@ static void brm_interrupt(brm_priv *brm) {
SET_ERROR_DESCRIPTOR(descriptor); SET_ERROR_DESCRIPTOR(descriptor);
signal_event=1; signal_event=1;
} }
if ( pending & BRM_ILLOP_IRQ){ if ( pending & BRM_ILLOP_IRQ){
FUNCDBG("BRM: BRM_ILLOP_IRQ\n\r"); FUNCDBG("BRM: BRM_ILLOP_IRQ\n\r");
brm->bc_list_fail = 1; brm->bc_list_fail = 1;
rtems_semaphore_release(brm->tx_sem); rtems_semaphore_release(brm->tx_sem);
event_status |= BRM_ILLOP_IRQ; event_status |= BRM_ILLOP_IRQ;
SET_ERROR_DESCRIPTOR(descriptor); SET_ERROR_DESCRIPTOR(descriptor);
signal_event=1; signal_event=1;
} }
if ( pending & BRM_MERR_IRQ){ if ( pending & BRM_MERR_IRQ){
FUNCDBG("BRM: BRM_MERR_IRQ\n\r"); FUNCDBG("BRM: BRM_MERR_IRQ\n\r");
event_status |= BRM_MERR_IRQ; event_status |= BRM_MERR_IRQ;
SET_ERROR_DESCRIPTOR(descriptor); SET_ERROR_DESCRIPTOR(descriptor);
signal_event=1; signal_event=1;
} }
/* Clear Block Accessed Bit */ /* Clear Block Accessed Bit */
tmp = READ_REG(&brm->desc[descriptor].ctrl); tmp = READ_REG(&brm->desc[descriptor].ctrl);
brm->desc[descriptor].ctrl = tmp & ~0x10; brm->desc[descriptor].ctrl = tmp & ~0x10;
} /* While */ } /* While */
/* clear interrupt flags & handle Hardware errors */ /* clear interrupt flags & handle Hardware errors */
pending = READ_REG(&brm->regs->ipend); pending = READ_REG(&brm->regs->ipend);
if ( pending & BRM_DMAF_IRQ){ if ( pending & BRM_DMAF_IRQ){
FUNCDBG("BRM: BRM_DMAF_IRQ\n\r"); FUNCDBG("BRM: BRM_DMAF_IRQ\n\r");
event_status |= BRM_DMAF_IRQ; event_status |= BRM_DMAF_IRQ;
signal_event=1; signal_event=1;
} }
if ( pending & BRM_WRAPF_IRQ){ if ( pending & BRM_WRAPF_IRQ){
FUNCDBG("BRM: BRM_WRAPF_IRQ\n\r"); FUNCDBG("BRM: BRM_WRAPF_IRQ\n\r");
event_status |= BRM_WRAPF_IRQ; event_status |= BRM_WRAPF_IRQ;
signal_event=1; signal_event=1;
} }
if ( pending & BRM_TAPF_IRQ){ if ( pending & BRM_TAPF_IRQ){
FUNCDBG("BRM: BRM_TAPF_IRQ\n\r"); FUNCDBG("BRM: BRM_TAPF_IRQ\n\r");
event_status |= BRM_TAPF_IRQ; event_status |= BRM_TAPF_IRQ;
signal_event=1; signal_event=1;
} }
/* Copy current mask to status mask */ /* Copy current mask to status mask */
if ( event_status ){ if ( event_status ){
if ( event_status & 0xffff0000 ) if ( event_status & 0xffff0000 )
brm->status &= 0x0000ffff; brm->status &= 0x0000ffff;
brm->status |= event_status; brm->status |= event_status;
} }
/* signal event once */ /* signal event once */
if ( signal_event && (brm->event_id!=0) ){ if ( signal_event && (brm->event_id!=0) ){
rtems_event_send(brm->event_id, event_status); rtems_event_send(brm->event_id, event_status);
} }
} }

18
c/src/lib/libbsp/sparc/shared/1553/b1553brm_pci.c
View File

@@ -21,7 +21,7 @@ unsigned int brmpci_memarea_address;
/* We have custom address tranlation for HW addresses */ /* We have custom address tranlation for HW addresses */
#define B1553BRM_ADR_TO #define B1553BRM_ADR_TO
/* No custom MEMAREA=>CPU used since BRM Core work with offsets /* No custom MEMAREA=>CPU used since BRM Core work with offsets
* in it's descriptors. * in it's descriptors.
*/ */
#undef B1553BRM_ADR_FROM #undef B1553BRM_ADR_FROM
@@ -33,7 +33,7 @@ unsigned int brmpci_memarea_address;
/* Any non-static function will begin with */ /* Any non-static function will begin with */
#define B1553BRM_PREFIX(name) b1553brmpci##name #define B1553BRM_PREFIX(name) b1553brmpci##name
/* do nothing, assume that the interrupt handler is called /* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler. * setup externally calling b1553_interrupt_handler.
*/ */
#define B1553BRM_REG_INT(handler,irq,arg) \ #define B1553BRM_REG_INT(handler,irq,arg) \
@@ -82,16 +82,16 @@ static void b1553brmpci_interrupt_handler(int irq, void *arg);
*/ */
int b1553brm_pci_register( int b1553brm_pci_register(
amba_confarea_type *bus, amba_confarea_type *bus,
unsigned int clksel, unsigned int clksel,
unsigned int clkdiv, unsigned int clkdiv,
unsigned int brm_freq, unsigned int brm_freq,
unsigned int memarea, unsigned int memarea,
unsigned int hw_address unsigned int hw_address
) )
{ {
/* Setup configuration */ /* Setup configuration */
/* if zero malloc will be used */ /* if zero malloc will be used */
brmpci_memarea_address = memarea; brmpci_memarea_address = memarea;
@@ -100,14 +100,14 @@ int b1553brm_pci_register(
#ifdef B1553BRM_ADR_FROM #ifdef B1553BRM_ADR_FROM
brmpci_cpu_address = memarea & 0xf0000000; brmpci_cpu_address = memarea & 0xf0000000;
#endif #endif
/* Register the driver */ /* Register the driver */
return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq); return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq);
} }
/* Call this from PCI interrupt handler /* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller * irq = the irq number of the HW device local to that IRQMP controller
* *
*/ */
static void b1553brmpci_interrupt_handler(int irq, void *arg){ static void b1553brmpci_interrupt_handler(int irq, void *arg){
brm_interrupt(arg); brm_interrupt(arg);

18
c/src/lib/libbsp/sparc/shared/1553/b1553brm_rasta.c
View File

@@ -21,7 +21,7 @@ unsigned int brmrasta_memarea_address;
/* We have custom address tranlation for HW addresses */ /* We have custom address tranlation for HW addresses */
#define B1553BRM_ADR_TO #define B1553BRM_ADR_TO
/* No custom MEMAREA=>CPU used since BRM Core work with offsets /* No custom MEMAREA=>CPU used since BRM Core work with offsets
* in it's descriptors. * in it's descriptors.
*/ */
#undef B1553BRM_ADR_FROM #undef B1553BRM_ADR_FROM
@@ -33,7 +33,7 @@ unsigned int brmrasta_memarea_address;
/* Any non-static function will begin with */ /* Any non-static function will begin with */
#define B1553BRM_PREFIX(name) b1553brmrasta##name #define B1553BRM_PREFIX(name) b1553brmrasta##name
/* do nothing, assume that the interrupt handler is called /* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler. * setup externally calling b1553_interrupt_handler.
*/ */
#define B1553BRM_REG_INT(handler,irq,arg) \ #define B1553BRM_REG_INT(handler,irq,arg) \
@@ -82,16 +82,16 @@ static void b1553brmrasta_interrupt_handler(int irq, void *arg);
*/ */
int b1553brm_rasta_register( int b1553brm_rasta_register(
amba_confarea_type *bus, amba_confarea_type *bus,
unsigned int clksel, unsigned int clksel,
unsigned int clkdiv, unsigned int clkdiv,
unsigned int brm_freq, unsigned int brm_freq,
unsigned int memarea, unsigned int memarea,
unsigned int hw_address unsigned int hw_address
) )
{ {
/* Setup configuration */ /* Setup configuration */
/* if zero the malloc will be used */ /* if zero the malloc will be used */
brmrasta_memarea_address = memarea; brmrasta_memarea_address = memarea;
@@ -100,14 +100,14 @@ int b1553brm_rasta_register(
#ifdef B1553BRM_ADR_FROM #ifdef B1553BRM_ADR_FROM
brmrasta_cpu_address = memarea & 0xf0000000; brmrasta_cpu_address = memarea & 0xf0000000;
#endif #endif
/* Register the driver */ /* Register the driver */
return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq); return B1553BRM_PREFIX(_register)(bus,clksel,clkdiv,brm_freq);
} }
/* Call this from RASTA interrupt handler /* Call this from RASTA interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller * irq = the irq number of the HW device local to that IRQMP controller
* *
*/ */
static void b1553brmrasta_interrupt_handler(int irq, void *arg){ static void b1553brmrasta_interrupt_handler(int irq, void *arg){
brm_interrupt(arg); brm_interrupt(arg);

10
c/src/lib/libbsp/sparc/shared/amba/ambapp.c
View File

@@ -91,7 +91,7 @@ amba_scan (amba_confarea_type * amba_conf, unsigned int ioarea,
* Custom config 1 contain ioarea. * Custom config 1 contain ioarea.
*/ */
custom = amba_ahb_get_custom(amba_conf->ahbslv,i,1); custom = amba_ahb_get_custom(amba_conf->ahbslv,i,1);
if ( amba_ver(conf) && amba_conf->next ){ if ( amba_ver(conf) && amba_conf->next ){
amba_conf->next->notroot = 1; amba_conf->next->notroot = 1;
amba_scan(amba_conf->next,custom,mmaps); amba_scan(amba_conf->next,custom,mmaps);
@@ -122,7 +122,7 @@ amba_print_dev(int devno, unsigned int conf){
} }
} }
void void
amba_apb_print_dev(int devno, unsigned int conf, unsigned int address){ amba_apb_print_dev(int devno, unsigned int conf, unsigned int address){
int irq = amba_irq(conf); int irq = amba_irq(conf);
if ( irq > 0 ){ if ( irq > 0 ){
@@ -139,14 +139,14 @@ amba_print_conf (amba_confarea_type * amba_conf)
int i,base=0; int i,base=0;
unsigned int conf, iobar, address; unsigned int conf, iobar, address;
unsigned int apbmst; unsigned int apbmst;
/* print all ahb masters */ /* print all ahb masters */
printk("--- AMBA AHB Masters ---\n"); printk("--- AMBA AHB Masters ---\n");
for(i=0; i<amba_conf->ahbmst.devnr; i++){ for(i=0; i<amba_conf->ahbmst.devnr; i++){
conf = amba_get_confword(amba_conf->ahbmst, i, 0); conf = amba_get_confword(amba_conf->ahbmst, i, 0);
amba_print_dev(i,conf); amba_print_dev(i,conf);
} }
/* print all ahb slaves */ /* print all ahb slaves */
printk("--- AMBA AHB Slaves ---\n"); printk("--- AMBA AHB Slaves ---\n");
for(i=0; i<amba_conf->ahbslv.devnr; i++){ for(i=0; i<amba_conf->ahbslv.devnr; i++){
@@ -167,7 +167,7 @@ amba_print_conf (amba_confarea_type * amba_conf)
address = amba_iobar_start(amba_conf->apbslv.apbmst[i], iobar); address = amba_iobar_start(amba_conf->apbslv.apbmst[i], iobar);
amba_apb_print_dev(i-base,conf,address); amba_apb_print_dev(i-base,conf,address);
} }
} }
/**** APB Slaves ****/ /**** APB Slaves ****/

2
c/src/lib/libbsp/sparc/shared/bspgetworkarea.c
View File

@@ -47,7 +47,7 @@ void bsp_get_work_area(
* you are allocating the Work Area in a new BSP. * you are allocating the Work Area in a new BSP.
*/ */
#ifdef BSP_GET_WORK_AREA_DEBUG #ifdef BSP_GET_WORK_AREA_DEBUG
{ {
void *sp = __builtin_frame_address(0); void *sp = __builtin_frame_address(0);
void *end = *work_area_start + *work_area_size; void *end = *work_area_start + *work_area_size;
printk( printk(

492
c/src/lib/libbsp/sparc/shared/can/grcan.c
View File

File diff suppressed because it is too large Load Diff

18
c/src/lib/libbsp/sparc/shared/can/grcan_rasta.c
View File

@@ -6,28 +6,28 @@
/*#define USE_AT697_RAM 1 */ /*#define USE_AT697_RAM 1 */
/* memarea_to_hw(x) /* memarea_to_hw(x)
* *
* x: address in AT697 address space * x: address in AT697 address space
* *
* returns the address in the RASTA address space that can be used to access x with dma. * returns the address in the RASTA address space that can be used to access x with dma.
* *
*/ */
#ifdef USE_AT697_RAM #ifdef USE_AT697_RAM
static inline unsigned int memarea_to_hw(unsigned int addr) { static inline unsigned int memarea_to_hw(unsigned int addr) {
return ((addr & 0x0fffffff) | RASTA_PCI_BASE); return ((addr & 0x0fffffff) | RASTA_PCI_BASE);
} }
#else #else
static inline unsigned int memarea_to_hw(unsigned int addr) { static inline unsigned int memarea_to_hw(unsigned int addr) {
return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM); return ((addr & 0x0fffffff) | RASTA_LOCAL_SRAM);
} }
#endif #endif
#define MEMAREA_TO_HW(x) memarea_to_hw(x) #define MEMAREA_TO_HW(x) memarea_to_hw(x)
#define IRQ_CLEAR_PENDING(irqno) #define IRQ_CLEAR_PENDING(irqno)
#define IRQ_UNMASK(irqno) #define IRQ_UNMASK(irqno)
#define IRQ_MASK(irqno) #define IRQ_MASK(irqno)
#define IRQ_GLOBAL_PREPARE(level) rtems_interrupt_level level #define IRQ_GLOBAL_PREPARE(level) rtems_interrupt_level level
#define IRQ_GLOBAL_DISABLE(level) rtems_interrupt_disable(level) #define IRQ_GLOBAL_DISABLE(level) rtems_interrupt_disable(level)
@@ -65,8 +65,8 @@ void (*grcan_rasta_int_reg)(void *handler, int irq, void *arg) = 0;
#define STATIC_RX_BUF_ADDR(core) \ #define STATIC_RX_BUF_ADDR(core) \
((unsigned int *) \ ((unsigned int *) \
(grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)+STATIC_RX_BUF_SIZE)) (grcan_rasta_rambase+(core)*(STATIC_TX_BUF_SIZE+STATIC_RX_BUF_SIZE)+STATIC_RX_BUF_SIZE))
#define GRCAN_DEVNAME "/dev/grcan0" #define GRCAN_DEVNAME "/dev/grcan0"
#define GRCAN_DEVNAME_NO(devstr,no) ((devstr)[10]='0'+(no)) #define GRCAN_DEVNAME_NO(devstr,no) ((devstr)[10]='0'+(no))

528
c/src/lib/libbsp/sparc/shared/can/occan.c
View File

File diff suppressed because it is too large Load Diff

12
c/src/lib/libbsp/sparc/shared/can/occan_pci.c
View File

@@ -7,11 +7,11 @@
/* Set registered device name */ /* Set registered device name */
#define OCCAN_DEVNAME "/dev/occanpci0" #define OCCAN_DEVNAME "/dev/occanpci0"
#define OCCAN_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no)) #define OCCAN_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
/* Any non-static function will begin with */ /* Any non-static function will begin with */
#define OCCAN_PREFIX(name) occanpci##name #define OCCAN_PREFIX(name) occanpci##name
/* do nothing, assume that the interrupt handler is called /* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler. * setup externally calling b1553_interrupt_handler.
*/ */
#define OCCAN_REG_INT(handler,irq,arg) \ #define OCCAN_REG_INT(handler,irq,arg) \
@@ -32,7 +32,7 @@ void occanpci_interrupt_handler(int irq, void *arg);
#include "occan.c" #include "occan.c"
/* Define method that sets redundant channel /* Define method that sets redundant channel
* The channel select register: * The channel select register:
* 0x00 = byte regs * 0x00 = byte regs
* 0x40 = channel select * 0x40 = channel select
@@ -49,15 +49,15 @@ static void inline occanpci_set_channel(occan_priv *priv, int channel){
int occan_pci_register(amba_confarea_type *bus) int occan_pci_register(amba_confarea_type *bus)
{ {
/* Setup configuration */ /* Setup configuration */
/* Register the driver */ /* Register the driver */
return OCCAN_PREFIX(_register)(bus); return OCCAN_PREFIX(_register)(bus);
} }
/* Call this from PCI interrupt handler /* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller * irq = the irq number of the HW device local to that IRQMP controller
* *
*/ */
void occanpci_interrupt_handler(int irq, void *arg){ void occanpci_interrupt_handler(int irq, void *arg){
occan_interrupt(arg); occan_interrupt(arg);

40
c/src/lib/libbsp/sparc/shared/i2c/i2cmst.c
View File

@@ -106,8 +106,8 @@ static rtems_status_code gr_i2cmst_send_start(rtems_libi2c_bus_t *bushdl)
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv); gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
#if defined(DEBUG) #if defined(DEBUG)
printk("gr_i2cmst_send_start called..."); printk("gr_i2cmst_send_start called...");
#endif #endif
/* The OC I2C core does not work with stand alone START events, /* The OC I2C core does not work with stand alone START events,
instead the event is buffered */ instead the event is buffered */
prv_ptr->sendstart = GRI2C_CMD_STA; prv_ptr->sendstart = GRI2C_CMD_STA;
@@ -123,7 +123,7 @@ static rtems_status_code gr_i2cmst_send_stop(rtems_libi2c_bus_t *bushdl)
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv); gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
#if defined(DEBUG) #if defined(DEBUG)
printk("gr_i2cmst_send_stop called..."); printk("gr_i2cmst_send_stop called...");
#endif #endif
prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_STO; prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_STO;
@@ -140,14 +140,14 @@ static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
uint8_t addr_byte; uint8_t addr_byte;
rtems_status_code rc; rtems_status_code rc;
#if defined(DEBUG) #if defined(DEBUG)
printk("gr_i2cmst_send_addr called, addr = 0x%x, rw = %d...", printk("gr_i2cmst_send_addr called, addr = 0x%x, rw = %d...",
addr, rw); addr, rw);
#endif #endif
/* Check if long address is needed */ /* Check if long address is needed */
if (addr > 0x7f) { if (addr > 0x7f) {
addr_byte = ((addr >> 7) & 0x06) | (rw ? 1 : 0); addr_byte = ((addr >> 7) & 0x06) | (rw ? 1 : 0);
prv_ptr->reg_ptr->tdrd = addr_byte; prv_ptr->reg_ptr->tdrd = addr_byte;
prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_WR | prv_ptr->sendstart; prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_WR | prv_ptr->sendstart;
prv_ptr->sendstart = 0; prv_ptr->sendstart = 0;
@@ -189,7 +189,7 @@ static rtems_status_code gr_i2cmst_send_addr(rtems_libi2c_bus_t *bushdl,
} }
static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl, static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
unsigned char *bytes, int nbytes) unsigned char *bytes, int nbytes)
{ {
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv); gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
@@ -207,7 +207,7 @@ static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
prv_ptr->sendstart); prv_ptr->sendstart);
expected_sts = GRI2C_STS_RXACK; expected_sts = GRI2C_STS_RXACK;
} else { } else {
prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_RD | prv_ptr->sendstart; prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_RD | prv_ptr->sendstart;
} }
prv_ptr->sendstart = 0; prv_ptr->sendstart = 0;
/* Wait until end of transfer */ /* Wait until end of transfer */
@@ -227,7 +227,7 @@ static int gr_i2cmst_read_bytes(rtems_libi2c_bus_t *bushdl,
return buf - bytes; return buf - bytes;
} }
static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl, static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl,
unsigned char *bytes, int nbytes) unsigned char *bytes, int nbytes)
{ {
gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv); gr_i2cmst_prv_t *prv_ptr = &(((gr_i2cmst_desc_t *)(bushdl))->prv);
@@ -235,19 +235,19 @@ static int gr_i2cmst_write_bytes(rtems_libi2c_bus_t *bushdl,
rtems_status_code rc; rtems_status_code rc;
#if defined(DEBUG) #if defined(DEBUG)
printk("gr_i2cmst_write_bytes called, nbytes = %d...", nbytes); printk("gr_i2cmst_write_bytes called, nbytes = %d...", nbytes);
#endif #endif
while (nbytes-- > 0) { while (nbytes-- > 0) {
#if defined(DEBUG) #if defined(DEBUG)
printk("writing byte 0x%02X...", *buf); printk("writing byte 0x%02X...", *buf);
#endif #endif
prv_ptr->reg_ptr->tdrd = *buf++; prv_ptr->reg_ptr->tdrd = *buf++;
prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_WR | prv_ptr->sendstart; prv_ptr->reg_ptr->cmdsts = GRI2C_CMD_WR | prv_ptr->sendstart;
prv_ptr->sendstart = 0; prv_ptr->sendstart = 0;
/* Wait for transfer to complete */ /* Wait for transfer to complete */
rc = gr_i2cmst_wait(prv_ptr, GRI2C_STATUS_IDLE); rc = gr_i2cmst_wait(prv_ptr, GRI2C_STATUS_IDLE);
if (rc != RTEMS_SUCCESSFUL) { if (rc != RTEMS_SUCCESSFUL) {
#if defined(DEBUG) #if defined(DEBUG)
printk("exited with error\n"); printk("exited with error\n");
@@ -275,13 +275,13 @@ static rtems_libi2c_bus_ops_t gr_i2cmst_ops = {
static gr_i2cmst_desc_t gr_i2cmst_desc = { static gr_i2cmst_desc_t gr_i2cmst_desc = {
{ /* rtems_libi2c_bus_t */ { /* rtems_libi2c_bus_t */
ops : &gr_i2cmst_ops, ops : &gr_i2cmst_ops,
size : sizeof(gr_i2cmst_ops), size : sizeof(gr_i2cmst_ops),
}, },
{ /* gr_i2cmst_prv_t, private data */ { /* gr_i2cmst_prv_t, private data */
reg_ptr : NULL, reg_ptr : NULL,
sysfreq : 40000, sysfreq : 40000,
} }
}; };
/* Scans for I2CMST core and initalizes i2c library */ /* Scans for I2CMST core and initalizes i2c library */
@@ -294,13 +294,13 @@ rtems_status_code leon_register_i2c(amba_confarea_type *abus)
int rc; int rc;
int device_found = 0; int device_found = 0;
amba_apb_device apbi2cmst; amba_apb_device apbi2cmst;
/* Scan AMBA bus for I2CMST core */ /* Scan AMBA bus for I2CMST core */
device_found = amba_find_apbslv(abus, VENDOR_GAISLER, GAISLER_I2CMST, device_found = amba_find_apbslv(abus, VENDOR_GAISLER, GAISLER_I2CMST,
&apbi2cmst); &apbi2cmst);
if (device_found == 1) { if (device_found == 1) {
/* Initialize i2c library */ /* Initialize i2c library */
rc = rtems_libi2c_initialize(); rc = rtems_libi2c_initialize();
if (rc < 0) { if (rc < 0) {
@@ -311,21 +311,21 @@ rtems_status_code leon_register_i2c(amba_confarea_type *abus)
} }
gr_i2cmst_desc.prv.reg_ptr = (gr_i2cmst_regs_t *)apbi2cmst.start; gr_i2cmst_desc.prv.reg_ptr = (gr_i2cmst_regs_t *)apbi2cmst.start;
/* Detect system frequency, same as in apbuart_initialize */ /* Detect system frequency, same as in apbuart_initialize */
#ifndef SYS_FREQ_kHZ #ifndef SYS_FREQ_kHZ
#if defined(LEON3) #if defined(LEON3)
/* LEON3: find timer address via AMBA Plug&Play info */ /* LEON3: find timer address via AMBA Plug&Play info */
{ {
amba_apb_device gptimer; amba_apb_device gptimer;
LEON3_Timer_Regs_Map *tregs; LEON3_Timer_Regs_Map *tregs;
if (amba_find_apbslv(abus,VENDOR_GAISLER, if (amba_find_apbslv(abus,VENDOR_GAISLER,
GAISLER_GPTIMER,&gptimer) == 1 ) { GAISLER_GPTIMER,&gptimer) == 1 ) {
tregs = (LEON3_Timer_Regs_Map *)gptimer.start; tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
gr_i2cmst_desc.prv.sysfreq = (tregs->scaler_reload+1)*1000; gr_i2cmst_desc.prv.sysfreq = (tregs->scaler_reload+1)*1000;
} else { } else {
gr_i2cmst_desc.prv.sysfreq = 40000; /* Default to 40MHz */ gr_i2cmst_desc.prv.sysfreq = 40000; /* Default to 40MHz */
} }
} }
#elif defined(LEON2) #elif defined(LEON2)
@@ -350,7 +350,7 @@ rtems_status_code leon_register_i2c(amba_confarea_type *abus)
return -rc; return -rc;
} }
} }
#if defined(DEBUG) #if defined(DEBUG)
printk("exited\n"); printk("exited\n");
#endif #endif

8
c/src/lib/libbsp/sparc/shared/include/ambapp.h
View File

@@ -80,9 +80,9 @@ extern "C" {
#define OPENCORES_PCIBR 0x4 #define OPENCORES_PCIBR 0x4
#define OPENCORES_ETHMAC 0x5 #define OPENCORES_ETHMAC 0x5
/* /*
* *
* Macros for manipulating Configuration registers * Macros for manipulating Configuration registers
* *
*/ */
#define amba_get_confword(tab, index, word) (*((tab).addr[(index)]+(word))) #define amba_get_confword(tab, index, word) (*((tab).addr[(index)]+(word)))
@@ -114,7 +114,7 @@ extern "C" {
#define AMBA_TYPE_AHBIO_ADDR(addr,base_ioarea) ((unsigned int)(base_ioarea) | ((addr) >> 12)) #define AMBA_TYPE_AHBIO_ADDR(addr,base_ioarea) ((unsigned int)(base_ioarea) | ((addr) >> 12))
/* /*
* Types and structure used for AMBA Plug & Play bus scanning * Types and structure used for AMBA Plug & Play bus scanning
* *
*/ */
typedef struct amba_device_table { typedef struct amba_device_table {
@@ -164,7 +164,7 @@ typedef struct {
* \param amba_conf AMBA P&P device info is placed here. * \param amba_conf AMBA P&P device info is placed here.
* \param ioarea address of AMBA Plug&Play information, * \param ioarea address of AMBA Plug&Play information,
* on LEON3 systems default is 0xfff00000 * on LEON3 systems default is 0xfff00000
* \param mmaps Memory mmap specific to this amba bus, * \param mmaps Memory mmap specific to this amba bus,
* if NULL no translation will be made (default). * if NULL no translation will be made (default).
* A array of maps, ending with a entry with size=0. * A array of maps, ending with a entry with size=0.
*/ */

8
c/src/lib/libbsp/sparc/shared/include/apbuart_pci.h
View File

@@ -21,16 +21,16 @@ extern "C" {
/* Register APBUART driver, if APBUART devices are found. /* Register APBUART driver, if APBUART devices are found.
* bus = pointer to AMBA bus description used to search for APBUART(s). * bus = pointer to AMBA bus description used to search for APBUART(s).
* *
*/ */
int apbuart_pci_register (amba_confarea_type * bus); int apbuart_pci_register (amba_confarea_type * bus);
/* This function must be called on APBUART interrupt. Called from the /* This function must be called on APBUART interrupt. Called from the
* PCI interrupt handler. * PCI interrupt handler.
* irq = AMBA IRQ assigned to the APBUART device, is found by reading * irq = AMBA IRQ assigned to the APBUART device, is found by reading
* pending register on IRQMP connected to the APBUART device. * pending register on IRQMP connected to the APBUART device.
* *
*/ */
void apbuartpci_interrupt_handler (int irq, void *arg); void apbuartpci_interrupt_handler (int irq, void *arg);

8
c/src/lib/libbsp/sparc/shared/include/apbuart_rasta.h
View File

@@ -21,16 +21,16 @@ extern "C" {
/* Register APBUART driver, if APBUART devices are found. /* Register APBUART driver, if APBUART devices are found.
* bus = pointer to AMBA bus description used to search for APBUART(s). * bus = pointer to AMBA bus description used to search for APBUART(s).
* *
*/ */
int apbuart_rasta_register(amba_confarea_type *bus); int apbuart_rasta_register(amba_confarea_type *bus);
/* This function must be called on APBUART interrupt. Called from the /* This function must be called on APBUART interrupt. Called from the
* RASTA interrupt handler. * RASTA interrupt handler.
* irq = AMBA IRQ assigned to the APBUART device, is found by reading * irq = AMBA IRQ assigned to the APBUART device, is found by reading
* pending register on IRQMP connected to the APBUART device. * pending register on IRQMP connected to the APBUART device.
* *
*/ */
void apbuartrasta_interrupt_handler(int irq, void *arg); void apbuartrasta_interrupt_handler(int irq, void *arg);

14
c/src/lib/libbsp/sparc/shared/include/b1553brm.h
View File

@@ -38,9 +38,9 @@ struct brm_reg {
volatile unsigned int mfiltb; /* 0x3C */ volatile unsigned int mfiltb; /* 0x3C */
volatile unsigned int rt_cmd_leg[16]; /* 0x40-0x80 */ volatile unsigned int rt_cmd_leg[16]; /* 0x40-0x80 */
volatile unsigned int enhanced; /* 0x84 */ volatile unsigned int enhanced; /* 0x84 */
volatile unsigned int dummy[31]; volatile unsigned int dummy[31];
volatile unsigned int w_ctrl; /* 0x100 */ volatile unsigned int w_ctrl; /* 0x100 */
volatile unsigned int w_irqctrl; /* 0x104 */ volatile unsigned int w_irqctrl; /* 0x104 */
volatile unsigned int w_ahbaddr; /* 0x108 */ volatile unsigned int w_ahbaddr; /* 0x108 */
@@ -63,7 +63,7 @@ struct rt_msg {
unsigned short desc; unsigned short desc;
}; };
/* /*
* rtaddr[0] and subaddr[0] : RT address and subaddress (for rt-rt receive addresses) * rtaddr[0] and subaddr[0] : RT address and subaddress (for rt-rt receive addresses)
* rtaddr[1] and subaddr[1] : Only for RT-RT. Transmit addresses. * rtaddr[1] and subaddr[1] : Only for RT-RT. Transmit addresses.
* *
@@ -71,9 +71,9 @@ struct rt_msg {
* *
* ctrl, bit 0 (TR) : 1 - transmit, 0 - receive. Ignored for rt-rt * ctrl, bit 0 (TR) : 1 - transmit, 0 - receive. Ignored for rt-rt
* bit 1 (RTRT) : 1 - rt to rt, 0 - normal * bit 1 (RTRT) : 1 - rt to rt, 0 - normal
* bit 2 (AB) : 1 - Bus B, 0 - Bus A * bit 2 (AB) : 1 - Bus B, 0 - Bus A
* bit 4:3 (Retry) : 1 - 1, 2 - 2, 3 - 3, 0 - 4 * bit 4:3 (Retry) : 1 - 1, 2 - 2, 3 - 3, 0 - 4
* bit 5 (END) : End of list * bit 5 (END) : End of list
* bit 15 (BAME) : Message error. Set by BRM if protocol error is detected * bit 15 (BAME) : Message error. Set by BRM if protocol error is detected
* *
* tsw[0] : status word * tsw[0] : status word
@@ -83,7 +83,7 @@ struct rt_msg {
* *
*/ */
struct bc_msg { struct bc_msg {
unsigned char rtaddr[2]; unsigned char rtaddr[2];
unsigned char subaddr[2]; unsigned char subaddr[2];
unsigned short wc; unsigned short wc;
unsigned short ctrl; unsigned short ctrl;
@@ -155,7 +155,7 @@ int brm_register_leon3_ramon_asic(void);
#define CLKSEL_MASK 0x7 #define CLKSEL_MASK 0x7
/* Register BRM driver /* Register BRM driver
* See (struct brm_reg).w_ctrl for clksel and clkdiv. * See (struct brm_reg).w_ctrl for clksel and clkdiv.
* See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq * See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq
* bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver) * bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver)

12
c/src/lib/libbsp/sparc/shared/include/b1553brm_pci.h
View File

@@ -19,25 +19,25 @@
extern "C" { extern "C" {
#endif #endif
/* Register BRM driver /* Register BRM driver
* See (struct brm_reg).w_ctrl for clksel and clkdiv. * See (struct brm_reg).w_ctrl for clksel and clkdiv.
* See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq * See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq
* bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver) * bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver)
* *
* Memory setup: * Memory setup:
* memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it) * memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it)
* hw_address = address that HW must use to access memarea. (used in the translation process) * hw_address = address that HW must use to access memarea. (used in the translation process)
*/ */
int b1553brm_pci_register( int b1553brm_pci_register(
amba_confarea_type *bus, amba_confarea_type *bus,
unsigned int clksel, unsigned int clksel,
unsigned int clkdiv, unsigned int clkdiv,
unsigned int brm_freq, unsigned int brm_freq,
unsigned int memarea, unsigned int memarea,
unsigned int hw_address unsigned int hw_address
); );
/* This function must be called on BRM interrupt. Called from the /* This function must be called on BRM interrupt. Called from the
* PCI interrupt handler. irq = AMBA IRQ MASK assigned to the BRM device, * PCI interrupt handler. irq = AMBA IRQ MASK assigned to the BRM device,

12
c/src/lib/libbsp/sparc/shared/include/b1553brm_rasta.h
View File

@@ -19,25 +19,25 @@
extern "C" { extern "C" {
#endif #endif
/* Register BRM driver /* Register BRM driver
* See (struct brm_reg).w_ctrl for clksel and clkdiv. * See (struct brm_reg).w_ctrl for clksel and clkdiv.
* See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq * See Enhanced register (the least signinficant 2 bits) in BRM Core for brm_freq
* bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver) * bus = &amba_conf for LEON3. (LEON2 not yet supported for this driver)
* *
* Memory setup: * Memory setup:
* memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it) * memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it)
* hw_address = address that HW must use to access memarea. (used in the translation process) * hw_address = address that HW must use to access memarea. (used in the translation process)
*/ */
int b1553brm_rasta_register( int b1553brm_rasta_register(
amba_confarea_type *bus, amba_confarea_type *bus,
unsigned int clksel, unsigned int clksel,
unsigned int clkdiv, unsigned int clkdiv,
unsigned int brm_freq, unsigned int brm_freq,
unsigned int memarea, unsigned int memarea,
unsigned int hw_address unsigned int hw_address
); );
/* This function must be called on BRM interrupt. Called from the /* This function must be called on BRM interrupt. Called from the
* PCI interrupt handler. irq = AMBA IRQ MASK assigned to the BRM device, * PCI interrupt handler. irq = AMBA IRQ MASK assigned to the BRM device,

6
c/src/lib/libbsp/sparc/shared/include/debug_defs.h
View File

@@ -14,15 +14,15 @@ extern "C" {
#endif #endif
#define DBG(fmt, args...) do { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__,## args); } while(0) #define DBG(fmt, args...) do { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__,## args); } while(0)
#define DBG2(fmt) do { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__); } while(0) #define DBG2(fmt) do { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__); } while(0)
#define DBGC(c,fmt, args...) do { if (DEBUG_FLAGS & c) { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__,## args); }} while(0) #define DBGC(c,fmt, args...) do { if (DEBUG_FLAGS & c) { printk(" : %03d @ %18s()]:" fmt , __LINE__,__FUNCTION__,## args); }} while(0)
#else #else
#define DBG(fmt, args...) #define DBG(fmt, args...)
#define DBG2(fmt, args...) #define DBG2(fmt, args...)
#define DBGC(c, fmt, args...) #define DBGC(c, fmt, args...)
#endif #endif
#ifdef DEBUGFUNCS #ifdef DEBUGFUNCS

10
c/src/lib/libbsp/sparc/shared/include/grcan.h
View File

@@ -1,5 +1,5 @@
/* /*
* Macros used for grcan controller * Macros used for grcan controller
* *
* COPYRIGHT (c) 2007. * COPYRIGHT (c) 2007.
* Gaisler Research * Gaisler Research
@@ -41,7 +41,7 @@ struct grcan_regs {
volatile unsigned int tx0ctrl; /* 0x200 */ volatile unsigned int tx0ctrl; /* 0x200 */
volatile unsigned int tx0addr; /* 0x204 */ volatile unsigned int tx0addr; /* 0x204 */
volatile unsigned int tx0size; /* 0x208 */ volatile unsigned int tx0size; /* 0x208 */
volatile unsigned int tx0wr; /* 0x20C */ volatile unsigned int tx0wr; /* 0x20C */
volatile unsigned int tx0rd; /* 0x210 */ volatile unsigned int tx0rd; /* 0x210 */
volatile unsigned int tx0irq; /* 0x214 */ volatile unsigned int tx0irq; /* 0x214 */
@@ -50,9 +50,9 @@ struct grcan_regs {
volatile unsigned int rx0ctrl; /* 0x300 */ volatile unsigned int rx0ctrl; /* 0x300 */
volatile unsigned int rx0addr; /* 0x304 */ volatile unsigned int rx0addr; /* 0x304 */
volatile unsigned int rx0size; /* 0x308 */ volatile unsigned int rx0size; /* 0x308 */
volatile unsigned int rx0wr; /* 0x30C */ volatile unsigned int rx0wr; /* 0x30C */
volatile unsigned int rx0rd; /* 0x310 */ volatile unsigned int rx0rd; /* 0x310 */
volatile unsigned int rx0irq; /* 0x314 */ volatile unsigned int rx0irq; /* 0x314 */
volatile unsigned int rx0mask; /* 0x318 */ volatile unsigned int rx0mask; /* 0x318 */
volatile unsigned int rx0code; /* 0x31C */ volatile unsigned int rx0code; /* 0x31C */
}; };
@@ -76,7 +76,7 @@ struct grcan_timing {
}; };
struct grcan_selection { struct grcan_selection {
int selection; int selection;
int enable0; int enable0;
int enable1; int enable1;
}; };

4
c/src/lib/libbsp/sparc/shared/include/grcan_rasta.h
View File

@@ -8,8 +8,8 @@
extern "C" { extern "C" {
#endif #endif
/* Registers the GRCAN for RASTA /* Registers the GRCAN for RASTA
* *
* rambase is address of the first GRCAN core has it's TX buffer, followed by * rambase is address of the first GRCAN core has it's TX buffer, followed by
* it's RX buffer * it's RX buffer
*/ */

18
c/src/lib/libbsp/sparc/shared/include/grspw.h
View File

@@ -1,5 +1,5 @@
/* /*
* Macros used for Spacewire bus * Macros used for Spacewire bus
* *
* COPYRIGHT (c) 2007. * COPYRIGHT (c) 2007.
* Gaisler Research * Gaisler Research
@@ -65,26 +65,26 @@ typedef struct {
unsigned int linkstart; unsigned int linkstart;
unsigned int check_rmap_err; /* check incoming packets for rmap errors */ unsigned int check_rmap_err; /* check incoming packets for rmap errors */
unsigned int rm_prot_id; /* remove protocol id from incoming packets */ unsigned int rm_prot_id; /* remove protocol id from incoming packets */
unsigned int tx_blocking; /* use blocking tx */ unsigned int tx_blocking; /* use blocking tx */
unsigned int tx_block_on_full; /* block when all tx_buffers are used */ unsigned int tx_block_on_full; /* block when all tx_buffers are used */
unsigned int rx_blocking; /* block when no data is available */ unsigned int rx_blocking; /* block when no data is available */
unsigned int disable_err; /* disable link automatically when link error is detected */ unsigned int disable_err; /* disable link automatically when link error is detected */
unsigned int link_err_irq; /* generate an interrupt when link error occurs */ unsigned int link_err_irq; /* generate an interrupt when link error occurs */
rtems_id event_id; /* task id that should receive link err irq event */ rtems_id event_id; /* task id that should receive link err irq event */
unsigned int is_rmap; unsigned int is_rmap;
unsigned int is_rxunaligned; unsigned int is_rxunaligned;
unsigned int is_rmapcrc; unsigned int is_rmapcrc;
unsigned int nodemask; unsigned int nodemask;
} spw_config; } spw_config;
#define SPACEWIRE_IOCTRL_SET_NODEADDR 1 #define SPACEWIRE_IOCTRL_SET_NODEADDR 1
#define SPACEWIRE_IOCTRL_SET_RXBLOCK 2 #define SPACEWIRE_IOCTRL_SET_RXBLOCK 2
#define SPACEWIRE_IOCTRL_SET_DESTKEY 4 #define SPACEWIRE_IOCTRL_SET_DESTKEY 4
#define SPACEWIRE_IOCTRL_SET_CLKDIV 5 #define SPACEWIRE_IOCTRL_SET_CLKDIV 5
#define SPACEWIRE_IOCTRL_SET_TIMER 6 #define SPACEWIRE_IOCTRL_SET_TIMER 6
#define SPACEWIRE_IOCTRL_SET_DISCONNECT 7 #define SPACEWIRE_IOCTRL_SET_DISCONNECT 7
#define SPACEWIRE_IOCTRL_SET_PROMISCUOUS 8 #define SPACEWIRE_IOCTRL_SET_PROMISCUOUS 8
#define SPACEWIRE_IOCTRL_SET_RMAPEN 9 #define SPACEWIRE_IOCTRL_SET_RMAPEN 9
@@ -114,7 +114,7 @@ typedef struct {
int grspw_register(amba_confarea_type *bus); int grspw_register(amba_confarea_type *bus);
#if 0 #if 0
struct grspw_buf; struct grspw_buf;
struct grspw_buf { struct grspw_buf {
@@ -124,7 +124,7 @@ struct grspw_buf {
unsigned int dlen; /* data length of '*data' */ unsigned int dlen; /* data length of '*data' */
unsigned int max_dlen; /* allocated length of '*data' */ unsigned int max_dlen; /* allocated length of '*data' */
void *data; /* pointer to beginning of cargo data */ void *data; /* pointer to beginning of cargo data */
/* Only used when transmitting */ /* Only used when transmitting */
unsigned int hlen; /* length of header '*header' */ unsigned int hlen; /* length of header '*header' */
unsigned int max_hlen; /* allocated length of '*header' */ unsigned int max_hlen; /* allocated length of '*header' */

2
c/src/lib/libbsp/sparc/shared/include/grspw_pci.h
View File

@@ -21,7 +21,7 @@ extern "C" {
/* Register GRSPW Driver /* Register GRSPW Driver
* bus = &amba_conf for LEON3 * bus = &amba_conf for LEON3
* *
* Memory setup: * Memory setup:
* memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it) * memarea = 128k aligned pointer to memory (if zero malloc will be used) (as the CPU sees it)
* hw_address = address that HW must use to access memarea. (used in the translation process) * hw_address = address that HW must use to access memarea. (used in the translation process)

2
c/src/lib/libbsp/sparc/shared/include/grspw_rasta.h
View File

@@ -21,7 +21,7 @@ extern "C" {
/* Register GRSPW Driver /* Register GRSPW Driver
* bus = &amba_conf for LEON3 * bus = &amba_conf for LEON3
* *
* Memory setup: * Memory setup:
* ram_base = 128k aligned pointer to memory (as the CPU sees it) * ram_base = 128k aligned pointer to memory (as the CPU sees it)
*/ */

4
c/src/lib/libbsp/sparc/shared/include/i2cmst.h
View File

@@ -47,7 +47,7 @@ typedef struct gr_i2cmst_regs {
#define GRI2C_STS_AL 0x00000020 /* Arbitration lost */ #define GRI2C_STS_AL 0x00000020 /* Arbitration lost */
#define GRI2C_STS_TIP 0x00000002 /* Transfer in progress */ #define GRI2C_STS_TIP 0x00000002 /* Transfer in progress */
#define GRI2C_STS_IF 0x00000001 /* Interrupt flag */ #define GRI2C_STS_IF 0x00000001 /* Interrupt flag */
#define GRI2C_STATUS_IDLE 0x00000000 #define GRI2C_STATUS_IDLE 0x00000000
/* The OC I2C core will perform a write after a start unless the RD bit /* The OC I2C core will perform a write after a start unless the RD bit
@@ -57,7 +57,7 @@ typedef struct gr_i2cmst_regs {
typedef struct gr_i2cmst_prv { typedef struct gr_i2cmst_prv {
gr_i2cmst_regs_t *reg_ptr; gr_i2cmst_regs_t *reg_ptr;
unsigned int sysfreq; /* System clock frequency in kHz */ unsigned int sysfreq; /* System clock frequency in kHz */
unsigned char sendstart; /* START events are buffered here */ unsigned char sendstart; /* START events are buffered here */
/* rtems_irq_number irq_number; */ /* rtems_irq_number irq_number; */
/* rtems_id irq_sema_id; */ /* rtems_id irq_sema_id; */
} gr_i2cmst_prv_t; } gr_i2cmst_prv_t;

30
c/src/lib/libbsp/sparc/shared/include/occan.h
View File

@@ -24,7 +24,7 @@ extern "C" {
typedef struct { typedef struct {
char extended; /* 1= Extended Frame (29-bit id), 0= STD Frame (11-bit id) */ char extended; /* 1= Extended Frame (29-bit id), 0= STD Frame (11-bit id) */
char rtr; /* RTR - Remote Transmission Request */ char rtr; /* RTR - Remote Transmission Request */
char sshot; /* single shot */ char sshot; /* single shot */
unsigned char len; unsigned char len;
unsigned char data[8]; unsigned char data[8];
unsigned int id; unsigned int id;
@@ -34,50 +34,50 @@ typedef struct {
/* tx/rx stats */ /* tx/rx stats */
unsigned int rx_msgs; unsigned int rx_msgs;
unsigned int tx_msgs; unsigned int tx_msgs;
/* Error Interrupt counters */ /* Error Interrupt counters */
unsigned int err_warn; unsigned int err_warn;
unsigned int err_dovr; unsigned int err_dovr;
unsigned int err_errp; unsigned int err_errp;
unsigned int err_arb; unsigned int err_arb;
unsigned int err_bus; unsigned int err_bus;
/**** BUS ERRORS (err_arb) ****/ /**** BUS ERRORS (err_arb) ****/
/* ALC 4-0 */ /* ALC 4-0 */
unsigned int err_arb_bitnum[32]; /* At what bit arbitration is lost */ unsigned int err_arb_bitnum[32]; /* At what bit arbitration is lost */
/******************************/ /******************************/
/**** BUS ERRORS (err_bus) ****/ /**** BUS ERRORS (err_bus) ****/
/* ECC 7-6 */ /* ECC 7-6 */
unsigned int err_bus_bit; /* Bit error */ unsigned int err_bus_bit; /* Bit error */
unsigned int err_bus_form; /* Form Error */ unsigned int err_bus_form; /* Form Error */
unsigned int err_bus_stuff; /* Stuff Error */ unsigned int err_bus_stuff; /* Stuff Error */
unsigned int err_bus_other; /* Other Error */ unsigned int err_bus_other; /* Other Error */
/* ECC 5 */ /* ECC 5 */
unsigned int err_bus_rx; /* Errors during Reception */ unsigned int err_bus_rx; /* Errors during Reception */
unsigned int err_bus_tx; /* Errors during Transmission */ unsigned int err_bus_tx; /* Errors during Transmission */
/* ECC 4:0 */ /* ECC 4:0 */
unsigned int err_bus_segs[32]; /* Segment (Where in frame error occured) unsigned int err_bus_segs[32]; /* Segment (Where in frame error occured)
* See OCCAN_SEG_* defines for indexes * See OCCAN_SEG_* defines for indexes
*/ */
/******************************/ /******************************/
/* total number of interrupts */ /* total number of interrupts */
unsigned int ints; unsigned int ints;
/* software monitoring hw errors */ /* software monitoring hw errors */
unsigned int tx_buf_error; unsigned int tx_buf_error;
/* Software fifo overrun */ /* Software fifo overrun */
unsigned int rx_sw_dovr; unsigned int rx_sw_dovr;
} occan_stats; } occan_stats;
/* indexes into occan_stats.err_bus_segs[index] */ /* indexes into occan_stats.err_bus_segs[index] */

2
c/src/lib/libbsp/sparc/shared/include/occan_pci.h
View File

@@ -29,7 +29,7 @@ int occan_pci_register(amba_confarea_type *bus);
* PCI interrupt handler. irq = AMBA IRQ assigned to the OC_CAN device, * PCI interrupt handler. irq = AMBA IRQ assigned to the OC_CAN device,
* is found by reading pending register on IRQMP connected to the OC_CAN * is found by reading pending register on IRQMP connected to the OC_CAN
* device. * device.
* *
*/ */
void occanpci_interrupt_handler(int irq, void *arg); void occanpci_interrupt_handler(int irq, void *arg);

24
c/src/lib/libbsp/sparc/shared/include/pci.h
View File

@@ -47,7 +47,7 @@ extern "C" {
#define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */ #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
#define PCI_STATUS_PARITY 0x100 /* Detected parity error */ #define PCI_STATUS_PARITY 0x100 /* Detected parity error */
#define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */ #define PCI_STATUS_DEVSEL_MASK 0x600 /* DEVSEL timing */
#define PCI_STATUS_DEVSEL_FAST 0x000 #define PCI_STATUS_DEVSEL_FAST 0x000
#define PCI_STATUS_DEVSEL_MEDIUM 0x200 #define PCI_STATUS_DEVSEL_MEDIUM 0x200
#define PCI_STATUS_DEVSEL_SLOW 0x400 #define PCI_STATUS_DEVSEL_SLOW 0x400
#define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */ #define PCI_STATUS_SIG_TARGET_ABORT 0x800 /* Set on target abort */
@@ -76,8 +76,8 @@ extern "C" {
/* /*
* Base addresses specify locations in memory or I/O space. * Base addresses specify locations in memory or I/O space.
* Decoded size can be determined by writing a value of * Decoded size can be determined by writing a value of
* 0xffffffff to the register, and reading it back. Only * 0xffffffff to the register, and reading it back. Only
* 1 bits are decoded. * 1 bits are decoded.
*/ */
#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */ #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
@@ -101,7 +101,7 @@ extern "C" {
/* Header type 0 (normal devices) */ /* Header type 0 (normal devices) */
#define PCI_CARDBUS_CIS 0x28 #define PCI_CARDBUS_CIS 0x28
#define PCI_SUBSYSTEM_VENDOR_ID 0x2c #define PCI_SUBSYSTEM_VENDOR_ID 0x2c
#define PCI_SUBSYSTEM_ID 0x2e #define PCI_SUBSYSTEM_ID 0x2e
#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */ #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
#define PCI_ROM_ADDRESS_ENABLE 0x01 #define PCI_ROM_ADDRESS_ENABLE 0x01
#define PCI_ROM_ADDRESS_MASK (~0x7ffUL) #define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
@@ -460,8 +460,8 @@ extern "C" {
#define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010 #define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010
#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
#define PCI_VENDOR_ID_DPT 0x1044 #define PCI_VENDOR_ID_DPT 0x1044
#define PCI_DEVICE_ID_DPT 0xa400 #define PCI_DEVICE_ID_DPT 0xa400
#define PCI_VENDOR_ID_OPTI 0x1045 #define PCI_VENDOR_ID_OPTI 0x1045
#define PCI_DEVICE_ID_OPTI_92C178 0xc178 #define PCI_DEVICE_ID_OPTI_92C178 0xc178
@@ -1116,37 +1116,37 @@ typedef struct {
extern pci_config BSP_pci_configuration; extern pci_config BSP_pci_configuration;
extern inline int extern inline int
pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned char * val) { unsigned char where, unsigned char * val) {
return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val); return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val);
} }
extern inline int extern inline int
pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned short * val) { unsigned char where, unsigned short * val) {
return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val); return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val);
} }
extern inline int extern inline int
pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned int * val) { unsigned char where, unsigned int * val) {
return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val); return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val);
} }
extern inline int extern inline int
pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned char val) { unsigned char where, unsigned char val) {
return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val); return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val);
} }
extern inline int extern inline int
pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned short val) { unsigned char where, unsigned short val) {
return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val); return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val);
} }
extern inline int extern inline int
pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function,
unsigned char where, unsigned int val) { unsigned char where, unsigned int val) {
return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val); return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val);
} }

2
c/src/lib/libbsp/sparc/shared/pci/pcifinddevice.c
View File

@@ -28,7 +28,7 @@ BSP_pciFindDevice( unsigned short vendorid, unsigned short deviceid,
hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1); hd = (hd & PCI_MULTI_FUNCTION ? PCI_MAX_FUNCTIONS : 1);
for (fun=0; fun<hd; fun++) { for (fun=0; fun<hd; fun++) {
/* /*
* The last devfn id/slot is special; must skip it * The last devfn id/slot is special; must skip it
*/ */
if (PCI_MAX_DEVICES-1==dev && PCI_MAX_FUNCTIONS-1 == fun) if (PCI_MAX_DEVICES-1==dev && PCI_MAX_FUNCTIONS-1 == fun)

370
c/src/lib/libbsp/sparc/shared/spw/grspw.c
View File

File diff suppressed because it is too large Load Diff

16
c/src/lib/libbsp/sparc/shared/spw/grspw_pci.c
View File

@@ -29,9 +29,9 @@ unsigned int grspwpci_memarea_address;
#define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no)) #define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[13]='0'+(no))
/* Any non-static function will begin with */ /* Any non-static function will begin with */
#define GRSPW_PREFIX(name) grspwpci##name #define GRSPW_PREFIX(name) grspwpci##name
/* do nothing, assume that the interrupt handler is called /* do nothing, assume that the interrupt handler is called
* setup externally calling b1553_interrupt_handler. * setup externally calling b1553_interrupt_handler.
*/ */
#define GRSPW_REG_INT(handler,irq,arg) \ #define GRSPW_REG_INT(handler,irq,arg) \
@@ -40,7 +40,7 @@ unsigned int grspwpci_memarea_address;
void (*grspw_pci_int_reg)(void *handler, int irq, void *arg) = 0; void (*grspw_pci_int_reg)(void *handler, int irq, void *arg) = 0;
#ifdef GRSPW_ADR_TO #ifdef GRSPW_ADR_TO
/* Translate an address within the Memory Region (memarea) into an Hardware /* Translate an address within the Memory Region (memarea) into an Hardware
* device address. This address is put into hardware registers or descriptors * device address. This address is put into hardware registers or descriptors
@@ -79,13 +79,13 @@ int grspwpci_interrupt_handler(int irq, void *arg);
*/ */
int grspw_pci_register( int grspw_pci_register(
amba_confarea_type *bus, amba_confarea_type *bus,
unsigned int memarea, unsigned int memarea,
unsigned int hw_address unsigned int hw_address
) )
{ {
/* Setup configuration */ /* Setup configuration */
/* if zero the malloc will be used */ /* if zero the malloc will be used */
grspwpci_memarea_address = memarea; grspwpci_memarea_address = memarea;
@@ -94,14 +94,14 @@ int grspw_pci_register(
#ifdef GRSPW_ADR_FROM #ifdef GRSPW_ADR_FROM
grspwpci_cpu_address = memarea & 0xf0000000; grspwpci_cpu_address = memarea & 0xf0000000;
#endif #endif
/* Register the driver */ /* Register the driver */
return GRSPW_PREFIX(_register)(bus); return GRSPW_PREFIX(_register)(bus);
} }
/* Call this from PCI interrupt handler /* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller * irq = the irq number of the HW device local to that IRQMP controller
* *
*/ */
int grspwpci_interrupt_handler(int irq, void *arg){ int grspwpci_interrupt_handler(int irq, void *arg){
grspw_interrupt( (GRSPW_DEV *)arg ); grspw_interrupt( (GRSPW_DEV *)arg );

30
c/src/lib/libbsp/sparc/shared/spw/grspw_rasta.c
View File

@@ -4,12 +4,12 @@
#undef GRSPW_MAXDEVS #undef GRSPW_MAXDEVS
#undef DEBUG_SPACEWIRE_ONOFF #undef DEBUG_SPACEWIRE_ONOFF
/*#define DEBUG_SPACEWIRE_ONOFF*/ /*#define DEBUG_SPACEWIRE_ONOFF*/
/* /*
* If USE_AT697_RAM is defined the RAM on the AT697 board will be used for DMA buffers (but rx message queue is always in AT697 ram). * If USE_AT697_RAM is defined the RAM on the AT697 board will be used for DMA buffers (but rx message queue is always in AT697 ram).
* USE_AT697_DMA specifies whether the messages will be fetched using DMA or PIO. * USE_AT697_DMA specifies whether the messages will be fetched using DMA or PIO.
* *
* RASTA_PCI_BASE is the base address of the GRPCI AHB slave * RASTA_PCI_BASE is the base address of the GRPCI AHB slave
* *
*/ */
#define USE_AT697_RAM 1 #define USE_AT697_RAM 1
@@ -44,9 +44,9 @@
#define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[15]='0'+(no)) #define GRSPW_DEVNAME_NO(devstr,no) ((devstr)[15]='0'+(no))
/* Any non-static function will begin with */ /* Any non-static function will begin with */
#define GRSPW_PREFIX(name) grspwrasta##name #define GRSPW_PREFIX(name) grspwrasta##name
/* do nothing, assume that the interrupt handler is called /* do nothing, assume that the interrupt handler is called
* setup externally calling grspw_interrupt_handler. * setup externally calling grspw_interrupt_handler.
*/ */
#define GRSPW_REG_INT(handler,irq,arg) \ #define GRSPW_REG_INT(handler,irq,arg) \
@@ -54,7 +54,7 @@
grspw_rasta_int_reg(handler,irq,arg); grspw_rasta_int_reg(handler,irq,arg);
#define GRSPW_DONT_BYPASS_CACHE #define GRSPW_DONT_BYPASS_CACHE
#ifdef GRSPW_ADR_TO #ifdef GRSPW_ADR_TO
/* Translate a address within the Memory Region (memarea) into an Hardware /* Translate a address within the Memory Region (memarea) into an Hardware
* device address. This address is put into hardware registers or descriptors * device address. This address is put into hardware registers or descriptors
@@ -86,12 +86,12 @@ unsigned int grspw_rasta_memarea_address;
*/ */
int grspw_rasta_register( int grspw_rasta_register(
amba_confarea_type *bus, amba_confarea_type *bus,
unsigned int ram_base unsigned int ram_base
) )
{ {
/* Setup configuration */ /* Setup configuration */
/* if zero the malloc will be used */ /* if zero the malloc will be used */
grspw_rasta_memarea_address = ram_base + GRSPW_RASTA_MEM_OFF; grspw_rasta_memarea_address = ram_base + GRSPW_RASTA_MEM_OFF;
@@ -124,30 +124,30 @@ void GRSPW_PREFIX(_interrupt_handler)(int irq, void *pDev)
#ifdef GRSPW_STATIC_MEM #ifdef GRSPW_STATIC_MEM
/* /*
* --------------------------------------- <- * --------------------------------------- <-
* | Core1: BD TABLE 1 and 2 | * | Core1: BD TABLE 1 and 2 |
* | Core2: BD TABLE 1 and 2 | * | Core2: BD TABLE 1 and 2 |
* | Core3: BD TABLE 1 and 2 | * | Core3: BD TABLE 1 and 2 |
* |-------------------------------------| * |-------------------------------------|
* | Core1: rx data buf + rx header buf | * | Core1: rx data buf + rx header buf |
* | Core2: rx data buf + rx header buf | * | Core2: rx data buf + rx header buf |
* | Core3: rx data buf + rx header buf | * | Core3: rx data buf + rx header buf |
* --------------------------------------- * ---------------------------------------
*/ */
static int grspw_rasta_calc_memoffs(int maxcores, int corenum, unsigned int *mem_base, unsigned int *mem_end, unsigned int *bdtable_base) static int grspw_rasta_calc_memoffs(int maxcores, int corenum, unsigned int *mem_base, unsigned int *mem_end, unsigned int *bdtable_base)
{ {
if ( maxcores > 3 ) if ( maxcores > 3 )
return -1; return -1;
if ( bdtable_base ) if ( bdtable_base )
*bdtable_base = grspw_rasta_memarea_address + corenum*2*SPACEWIRE_BDTABLE_SIZE; *bdtable_base = grspw_rasta_memarea_address + corenum*2*SPACEWIRE_BDTABLE_SIZE;
if ( mem_base ) if ( mem_base )
*mem_base = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + corenum*BUFMEM_PER_LINK; *mem_base = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + corenum*BUFMEM_PER_LINK;
if ( mem_end ) if ( mem_end )
*mem_end = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + (corenum+1)*BUFMEM_PER_LINK; *mem_end = grspw_rasta_memarea_address + coremax*2*SPACEWIRE_BDTABLE_SIZE + (corenum+1)*BUFMEM_PER_LINK;
return 0; return 0;
} }
#endif #endif

28
c/src/lib/libbsp/sparc/shared/start.S
View File

@@ -56,7 +56,7 @@ start:
SYM(trap_table): SYM(trap_table):
RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap
BAD_TRAP; ! 01 instruction access BAD_TRAP; ! 01 instruction access
! exception ! exception
BAD_TRAP; ! 02 illegal instruction BAD_TRAP; ! 02 illegal instruction
BAD_TRAP; ! 03 privileged instruction BAD_TRAP; ! 03 privileged instruction
@@ -231,21 +231,21 @@ SYM(hard_reset):
#if ENABLE_SIS_QUIRKS==1 #if ENABLE_SIS_QUIRKS==1
#include <erc32.h> #include <erc32.h>
/* Check if MEC is initialised. If not, this means that we are /* Check if MEC is initialised. If not, this means that we are
running on the simulator. Initiate some of the parameters running on the simulator. Initiate some of the parameters
that are done by the boot-prom otherwise. that are done by the boot-prom otherwise.
*/ */
set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals
ld [%g3], %g2 ld [%g3], %g2
set 0xfe080000, %g1 set 0xfe080000, %g1
andcc %g1, %g2, %g0 andcc %g1, %g2, %g0
bne 2f bne 2f
/* Set the correct memory size in MEC memory config register */ /* Set the correct memory size in MEC memory config register */
set SYM(PROM_SIZE), %l0 set SYM(PROM_SIZE), %l0
set 0, %l1 set 0, %l1
srl %l0, 18, %l0 srl %l0, 18, %l0
1: 1:
@@ -254,8 +254,8 @@ SYM(hard_reset):
bne,a 1b bne,a 1b
inc %l1 inc %l1
sll %l1, 8, %l1 sll %l1, 8, %l1
set SYM(RAM_SIZE), %l0 set SYM(RAM_SIZE), %l0
srl %l0, 19, %l0 srl %l0, 19, %l0
1: 1:
tst %l0 tst %l0
@@ -263,26 +263,26 @@ SYM(hard_reset):
bne,a 1b bne,a 1b
inc %l1 inc %l1
sll %l1, 10, %l1 sll %l1, 10, %l1
! set the Memory Configuration ! set the Memory Configuration
st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ] st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
!DISABLE THE HARDWARE WATCHDOG !DISABLE THE HARDWARE WATCHDOG
st %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ] st %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ]
!Reduce the number of wait states to 0 for all memory areas. !Reduce the number of wait states to 0 for all memory areas.
st %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ] st %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ]
set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker
set SYM(RAM_SIZE), %l2 set SYM(RAM_SIZE), %l2
add %l1, %l2, %sp add %l1, %l2, %sp
st %sp, [%g6] st %sp, [%g6]
set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator
set 14, %g1 set 14, %g1
st %g1, [%g6] st %g1, [%g6]
2: 2:
#endif #endif
/* /*
* Copy the initialized data to RAM * Copy the initialized data to RAM

268
c/src/lib/libbsp/sparc/shared/uart/apbuart.c
View File

@@ -83,27 +83,27 @@ typedef struct {
int irq; int irq;
int minor; int minor;
int scaler; int scaler;
unsigned int baud; unsigned int baud;
int txblk; /* Make write block until at least 1 char has int txblk; /* Make write block until at least 1 char has
* been put into software send fifo * been put into software send fifo
*/ */
int tx_flush; /* Set this to block until all data has int tx_flush; /* Set this to block until all data has
* placed into the hardware send fifo * placed into the hardware send fifo
*/ */
int rxblk; /* Make read block until at least 1 char has int rxblk; /* Make read block until at least 1 char has
* been received (or taken from software fifo). * been received (or taken from software fifo).
*/ */
int started; /* Set to 1 when in running mode */ int started; /* Set to 1 when in running mode */
int ascii_mode; /* Set to 1 to make \n be printed as \r\n */ int ascii_mode; /* Set to 1 to make \n be printed as \r\n */
/* TX/RX software FIFO Buffers */ /* TX/RX software FIFO Buffers */
apbuart_fifo *txfifo; apbuart_fifo *txfifo;
apbuart_fifo *rxfifo; apbuart_fifo *rxfifo;
apbuart_stats stats; apbuart_stats stats;
rtems_id dev_sem; rtems_id dev_sem;
rtems_id rx_sem; rtems_id rx_sem;
rtems_id tx_sem; rtems_id tx_sem;
@@ -126,18 +126,18 @@ static void apbuart_hw_close(apbuart_priv *uart);
static void apbuart_hw_open(apbuart_priv *uart); static void apbuart_hw_open(apbuart_priv *uart);
/* Uncomment for debug output */ /* Uncomment for debug output */
/* #define DEBUG 1 /* #define DEBUG 1
#define FUNCDEBUG 1 */ #define FUNCDEBUG 1 */
#ifdef DEBUG #ifdef DEBUG
#define DBG(x...) printk(x) #define DBG(x...) printk(x)
#else #else
#define DBG(x...) #define DBG(x...)
#endif #endif
#ifdef FUNCDEBUG #ifdef FUNCDEBUG
#define FUNCDBG(x...) printk(x) #define FUNCDBG(x...) printk(x)
#else #else
#define FUNCDBG(x...) #define FUNCDBG(x...)
#endif #endif
#ifndef READ_REG #ifndef READ_REG
@@ -157,7 +157,7 @@ static int apbuart_outbyte_try(ambapp_apb_uart *regs, unsigned char ch)
{ {
if ( (READ_REG(&regs->status) & LEON_REG_UART_STATUS_THE) == 0 ) if ( (READ_REG(&regs->status) & LEON_REG_UART_STATUS_THE) == 0 )
return -1; /* Failed */ return -1; /* Failed */
/* There is room in fifo, put ch in it */ /* There is room in fifo, put ch in it */
regs->data = (unsigned int) ch; regs->data = (unsigned int) ch;
return 0; return 0;
@@ -167,15 +167,15 @@ static int apbuart_outbyte_try(ambapp_apb_uart *regs, unsigned char ch)
static int apbuart_inbyte_try(ambapp_apb_uart *regs) static int apbuart_inbyte_try(ambapp_apb_uart *regs)
{ {
unsigned int status; unsigned int status;
/* Clear errors if any */ /* Clear errors if any */
if ( (status=READ_REG(&regs->status)) & LEON_REG_UART_STATUS_ERR) { if ( (status=READ_REG(&regs->status)) & LEON_REG_UART_STATUS_ERR) {
regs->status = status & ~LEON_REG_UART_STATUS_ERR; regs->status = status & ~LEON_REG_UART_STATUS_ERR;
} }
/* Is Data available? */ /* Is Data available? */
if ( (READ_REG(&regs->status) & LEON_REG_UART_STATUS_DR) == 0 ) if ( (READ_REG(&regs->status) & LEON_REG_UART_STATUS_DR) == 0 )
return -1; /* No data avail */ return -1; /* No data avail */
/* Return Data */ /* Return Data */
return (int)READ_REG(&regs->data); return (int)READ_REG(&regs->data);
} }
@@ -187,7 +187,7 @@ static int apbuart_write_support(apbuart_priv *uart, const char *buf, int len)
while (nwrite < len) { while (nwrite < len) {
if ( apbuart_outbyte_try(minor, *buf++) ){ if ( apbuart_outbyte_try(minor, *buf++) ){
/* TX Fifo full */ /* TX Fifo full */
} }
nwrite++; nwrite++;
} }
@@ -197,17 +197,17 @@ static int apbuart_write_support(apbuart_priv *uart, const char *buf, int len)
static void apbuart_hw_open(apbuart_priv *uart){ static void apbuart_hw_open(apbuart_priv *uart){
unsigned int scaler; unsigned int scaler;
/* Calculate Baudrate */ /* Calculate Baudrate */
if ( uart->scaler > 0 ) { if ( uart->scaler > 0 ) {
scaler = uart->scaler; scaler = uart->scaler;
}else{ }else{
scaler = (((sys_freq_hz*10)/(uart->baud*8))-5)/10; scaler = (((sys_freq_hz*10)/(uart->baud*8))-5)/10;
} }
/* Set new baud rate */ /* Set new baud rate */
uart->regs->scaler = scaler; uart->regs->scaler = scaler;
/* Enable receiver & Transmitter */ /* Enable receiver & Transmitter */
uart->regs->ctrl = APBUART_CTRL_RE | APBUART_CTRL_RF | APBUART_CTRL_RI | APBUART_CTRL_TI; uart->regs->ctrl = APBUART_CTRL_RE | APBUART_CTRL_RF | APBUART_CTRL_RI | APBUART_CTRL_TI;
} }
@@ -221,7 +221,7 @@ static void apbuart_hw_close(apbuart_priv *uart){
/* interrupt handler */ /* interrupt handler */
static void apbuart_interrupt_handler(rtems_vector_number v){ static void apbuart_interrupt_handler(rtems_vector_number v){
int minor; int minor;
/* convert to */ /* convert to */
for(minor = 0; minor < dev_cnt; minor++) { for(minor = 0; minor < dev_cnt; minor++) {
if ( v == (apbuarts[minor].irq+0x10) ) { if ( v == (apbuarts[minor].irq+0x10) ) {
@@ -232,7 +232,7 @@ static void apbuart_interrupt_handler(rtems_vector_number v){
} }
#endif #endif
/* The interrupt handler, taking care of the /* The interrupt handler, taking care of the
* APBUART hardware * APBUART hardware
*/ */
static void apbuart_interrupt(apbuart_priv *uart){ static void apbuart_interrupt(apbuart_priv *uart){
@@ -240,7 +240,7 @@ static void apbuart_interrupt(apbuart_priv *uart){
int empty; int empty;
unsigned char c, *next_char = NULL; unsigned char c, *next_char = NULL;
int signal; int signal;
/* Clear & record any error */ /* Clear & record any error */
status = READ_REG(&uart->regs->status); status = READ_REG(&uart->regs->status);
if ( status & (APBUART_STATUS_OV|APBUART_STATUS_PE|APBUART_STATUS_FE) ){ if ( status & (APBUART_STATUS_OV|APBUART_STATUS_PE|APBUART_STATUS_FE) ){
@@ -258,7 +258,7 @@ static void apbuart_interrupt(apbuart_priv *uart){
} }
uart->regs->status = status & ~(APBUART_STATUS_OV|APBUART_STATUS_PE|APBUART_STATUS_FE); uart->regs->status = status & ~(APBUART_STATUS_OV|APBUART_STATUS_PE|APBUART_STATUS_FE);
} }
/* Empty RX fifo into software fifo */ /* Empty RX fifo into software fifo */
signal = 0; signal = 0;
while ( (status=READ_REG(&uart->regs->status)) & APBUART_STATUS_DR ){ while ( (status=READ_REG(&uart->regs->status)) & APBUART_STATUS_DR ){
@@ -270,20 +270,20 @@ static void apbuart_interrupt(apbuart_priv *uart){
} }
/* put into fifo */ /* put into fifo */
apbuart_fifo_put(uart->rxfifo,c); apbuart_fifo_put(uart->rxfifo,c);
/* bump RX counter */ /* bump RX counter */
uart->stats.rx_cnt++; uart->stats.rx_cnt++;
signal = 1; signal = 1;
} }
/* Wake RX thread if any */ /* Wake RX thread if any */
if ( signal ) if ( signal )
rtems_semaphore_release(uart->rx_sem); rtems_semaphore_release(uart->rx_sem);
/* If room in HW fifo and we got more chars to be sent */ /* If room in HW fifo and we got more chars to be sent */
if ( !(status & APBUART_STATUS_TF) ){ if ( !(status & APBUART_STATUS_TF) ){
if ( apbuart_fifo_isEmpty(uart->txfifo) ){ if ( apbuart_fifo_isEmpty(uart->txfifo) ){
/* Turn off TX interrupt when no data is to be sent */ /* Turn off TX interrupt when no data is to be sent */
if ( status & APBUART_STATUS_TE ){ if ( status & APBUART_STATUS_TE ){
@@ -292,11 +292,11 @@ static void apbuart_interrupt(apbuart_priv *uart){
} }
return; return;
} }
/* signal when there will be more room in SW fifo */ /* signal when there will be more room in SW fifo */
if ( apbuart_fifo_isFull(uart->txfifo) ) if ( apbuart_fifo_isFull(uart->txfifo) )
signal = 1; signal = 1;
do{ do{
/* Put data into HW TX fifo */ /* Put data into HW TX fifo */
apbuart_fifo_peek(uart->txfifo,&next_char); apbuart_fifo_peek(uart->txfifo,&next_char);
@@ -310,9 +310,9 @@ static void apbuart_interrupt(apbuart_priv *uart){
} }
uart->regs->ctrl = READ_REG(&uart->regs->ctrl) | APBUART_CTRL_TE | APBUART_CTRL_TF; uart->regs->ctrl = READ_REG(&uart->regs->ctrl) | APBUART_CTRL_TE | APBUART_CTRL_TF;
DBG("!"); DBG("!");
}while(!(empty=apbuart_fifo_isEmpty(uart->txfifo)) && }while(!(empty=apbuart_fifo_isEmpty(uart->txfifo)) &&
!((status=READ_REG(&uart->regs->status))&APBUART_STATUS_TF) ); !((status=READ_REG(&uart->regs->status))&APBUART_STATUS_TF) );
/* Wake userspace thread, on empty or full fifo /* Wake userspace thread, on empty or full fifo
* This makes tx_flush and block work. * This makes tx_flush and block work.
*/ */
@@ -336,7 +336,7 @@ int APBUART_PREFIX(_register)(amba_confarea_type *bus) {
switch(r) { switch(r) {
case RTEMS_TOO_MANY: case RTEMS_TOO_MANY:
printk("APBUART rtems_io_register_driver failed: RTEMS_TOO_MANY\n"); return -1; printk("APBUART rtems_io_register_driver failed: RTEMS_TOO_MANY\n"); return -1;
case RTEMS_INVALID_NUMBER: case RTEMS_INVALID_NUMBER:
printk("APBUART rtems_io_register_driver failed: RTEMS_INVALID_NUMBER\n"); return -1; printk("APBUART rtems_io_register_driver failed: RTEMS_INVALID_NUMBER\n"); return -1;
case RTEMS_RESOURCE_IN_USE: case RTEMS_RESOURCE_IN_USE:
printk("APBUART rtems_io_register_driver failed: RTEMS_RESOURCE_IN_USE\n"); return -1; printk("APBUART rtems_io_register_driver failed: RTEMS_RESOURCE_IN_USE\n"); return -1;
@@ -350,7 +350,7 @@ int APBUART_PREFIX(_register)(amba_confarea_type *bus) {
static rtems_device_driver apbuart_initialize(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) static rtems_device_driver apbuart_initialize(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{ {
rtems_status_code status; rtems_status_code status;
int i; int i;
amba_apb_device dev; amba_apb_device dev;
@@ -365,28 +365,28 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
printk("APBUART: Failed to find any APBUART cores\n\r"); printk("APBUART: Failed to find any APBUART cores\n\r");
return -1; return -1;
} }
strcpy(fs_name,APBUART_DEVNAME); strcpy(fs_name,APBUART_DEVNAME);
DBG("Found %d APBUART(s)\n\r",dev_cnt); DBG("Found %d APBUART(s)\n\r",dev_cnt);
/* Allocate memory for device structures */ /* Allocate memory for device structures */
apbuarts = malloc(sizeof(apbuart_priv) * dev_cnt); apbuarts = malloc(sizeof(apbuart_priv) * dev_cnt);
if ( !apbuarts ){ if ( !apbuarts ){
printk("APBUART: Failed to allocate SW memory\n\r"); printk("APBUART: Failed to allocate SW memory\n\r");
return -1; return -1;
} }
memset(apbuarts,0,sizeof(sizeof(apbuart_priv) * dev_cnt)); memset(apbuarts,0,sizeof(sizeof(apbuart_priv) * dev_cnt));
/* Detect System Frequency from initialized timer */ /* Detect System Frequency from initialized timer */
#ifndef SYS_FREQ_HZ #ifndef SYS_FREQ_HZ
#if defined(LEON3) #if defined(LEON3)
/* LEON3: find timer address via AMBA Plug&Play info */ /* LEON3: find timer address via AMBA Plug&Play info */
{ {
amba_apb_device gptimer; amba_apb_device gptimer;
LEON3_Timer_Regs_Map *tregs; LEON3_Timer_Regs_Map *tregs;
if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&gptimer) == 1 ){ if ( amba_find_apbslv(&amba_conf,VENDOR_GAISLER,GAISLER_GPTIMER,&gptimer) == 1 ){
tregs = (LEON3_Timer_Regs_Map *)gptimer.start; tregs = (LEON3_Timer_Regs_Map *)gptimer.start;
sys_freq_hz = (tregs->scaler_reload+1)*1000*1000; sys_freq_hz = (tregs->scaler_reload+1)*1000*1000;
@@ -395,7 +395,7 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
sys_freq_hz = 40000000; /* Default to 40MHz */ sys_freq_hz = 40000000; /* Default to 40MHz */
printk("APBUART: Failed to detect system frequency\n\r"); printk("APBUART: Failed to detect system frequency\n\r");
} }
} }
#elif defined(LEON2) #elif defined(LEON2)
/* LEON2: use hardcoded address to get to timer */ /* LEON2: use hardcoded address to get to timer */
@@ -410,27 +410,27 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
/* Use hardcoded frequency */ /* Use hardcoded frequency */
sys_freq_hz = SYS_FREQ_HZ; sys_freq_hz = SYS_FREQ_HZ;
#endif #endif
for(i=0; i<dev_cnt; i++){ for(i=0; i<dev_cnt; i++){
/* Get AMBA AHB device info from Plug&Play */ /* Get AMBA AHB device info from Plug&Play */
amba_find_next_apbslv(amba_bus,VENDOR_GAISLER,GAISLER_APBUART,&dev,i); amba_find_next_apbslv(amba_bus,VENDOR_GAISLER,GAISLER_APBUART,&dev,i);
printk("APBUART[%d]: at 0x%x irq %d (0x%x)\n\r",i,dev.start,dev.irq,(unsigned int)&apbuarts[i]); printk("APBUART[%d]: at 0x%x irq %d (0x%x)\n\r",i,dev.start,dev.irq,(unsigned int)&apbuarts[i]);
apbuarts[i].regs = (ambapp_apb_uart *)dev.start; apbuarts[i].regs = (ambapp_apb_uart *)dev.start;
apbuarts[i].irq = dev.irq; apbuarts[i].irq = dev.irq;
apbuarts[i].minor = i; apbuarts[i].minor = i;
/* Clear HW regs */ /* Clear HW regs */
apbuarts[i].regs->status = 0; apbuarts[i].regs->status = 0;
apbuarts[i].regs->ctrl = 0; apbuarts[i].regs->ctrl = 0;
/* Allocate default software buffers */ /* Allocate default software buffers */
apbuarts[i].txfifo = apbuart_fifo_create(DEFAULT_TXBUF_SIZE); apbuarts[i].txfifo = apbuart_fifo_create(DEFAULT_TXBUF_SIZE);
apbuarts[i].rxfifo = apbuart_fifo_create(DEFAULT_RXBUF_SIZE); apbuarts[i].rxfifo = apbuart_fifo_create(DEFAULT_RXBUF_SIZE);
if ( !apbuarts[i].txfifo || !apbuarts[i].rxfifo ) if ( !apbuarts[i].txfifo || !apbuarts[i].rxfifo )
rtems_fatal_error_occurred(RTEMS_NO_MEMORY); rtems_fatal_error_occurred(RTEMS_NO_MEMORY);
APBUART_DEVNAME_NO(fs_name,i); APBUART_DEVNAME_NO(fs_name,i);
/* Bind name to device */ /* Bind name to device */
@@ -438,28 +438,28 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
status = rtems_io_register_name(fs_name, major, i); status = rtems_io_register_name(fs_name, major, i);
if (status != RTEMS_SUCCESSFUL) if (status != RTEMS_SUCCESSFUL)
rtems_fatal_error_occurred(status); rtems_fatal_error_occurred(status);
/* Setup interrupt handler for each channel */ /* Setup interrupt handler for each channel */
APBUART_REG_INT(APBUART_PREFIX(_interrupt_handler), apbuarts[i].irq, &apbuarts[i]); APBUART_REG_INT(APBUART_PREFIX(_interrupt_handler), apbuarts[i].irq, &apbuarts[i]);
/* Device A Semaphore created with count = 1 */ /* Device A Semaphore created with count = 1 */
if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'D', '0'+i), if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'D', '0'+i),
1, 1,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING, RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0, 0,
&apbuarts[i].dev_sem) != RTEMS_SUCCESSFUL ) &apbuarts[i].dev_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR; return RTEMS_INTERNAL_ERROR;
if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'T', '0'+i), if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'T', '0'+i),
1, 1,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING, RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0, 0,
&apbuarts[i].tx_sem) != RTEMS_SUCCESSFUL ) &apbuarts[i].tx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR; return RTEMS_INTERNAL_ERROR;
if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'R', '0'+i), if ( rtems_semaphore_create(rtems_build_name('A', 'U', 'R', '0'+i),
1, 1,
RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING, RTEMS_FIFO|RTEMS_SIMPLE_BINARY_SEMAPHORE|RTEMS_NO_INHERIT_PRIORITY|RTEMS_LOCAL|RTEMS_NO_PRIORITY_CEILING,
0, 0,
&apbuarts[i].rx_sem) != RTEMS_SUCCESSFUL ) &apbuarts[i].rx_sem) != RTEMS_SUCCESSFUL )
return RTEMS_INTERNAL_ERROR; return RTEMS_INTERNAL_ERROR;
@@ -469,95 +469,95 @@ static rtems_device_driver apbuart_initialize(rtems_device_major_number major,
} }
static rtems_device_driver apbuart_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) static rtems_device_driver apbuart_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{ {
apbuart_priv *uart; apbuart_priv *uart;
FUNCDBG("apbuart_open: major %d, minor %d\n", major, minor); FUNCDBG("apbuart_open: major %d, minor %d\n", major, minor);
if ( (minor < 0) || (minor >= dev_cnt) ) { if ( (minor < 0) || (minor >= dev_cnt) ) {
DBG("Wrong minor %d\n", minor); DBG("Wrong minor %d\n", minor);
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
} }
uart = &apbuarts[minor]; uart = &apbuarts[minor];
if (rtems_semaphore_obtain(uart->dev_sem, RTEMS_NO_WAIT, RTEMS_NO_TIMEOUT) != RTEMS_SUCCESSFUL) { if (rtems_semaphore_obtain(uart->dev_sem, RTEMS_NO_WAIT, RTEMS_NO_TIMEOUT) != RTEMS_SUCCESSFUL) {
DBG("apbuart_open: resource in use\n"); DBG("apbuart_open: resource in use\n");
return RTEMS_RESOURCE_IN_USE; return RTEMS_RESOURCE_IN_USE;
} }
/* Clear HW regs */ /* Clear HW regs */
uart->regs->status = 0; uart->regs->status = 0;
uart->regs->ctrl = 0; uart->regs->ctrl = 0;
/* Set Defaults */ /* Set Defaults */
/* 38400 baudrate */ /* 38400 baudrate */
uart->scaler = 0; /* use uart->baud */ uart->scaler = 0; /* use uart->baud */
uart->baud = 38400; uart->baud = 38400;
/* Default to Blocking mode */ /* Default to Blocking mode */
uart->txblk = 1; uart->txblk = 1;
uart->rxblk = 1; uart->rxblk = 1;
/* Default to no flush mode */ /* Default to no flush mode */
uart->tx_flush = 0; uart->tx_flush = 0;
/* non-ascii mode */ /* non-ascii mode */
uart->ascii_mode = 0; uart->ascii_mode = 0;
/* not started */ /* not started */
uart->started = 0; uart->started = 0;
if ( !uart->txfifo || (uart->txfifo->size!=DEFAULT_TXBUF_SIZE) ){ if ( !uart->txfifo || (uart->txfifo->size!=DEFAULT_TXBUF_SIZE) ){
apbuart_fifo_free(uart->txfifo); apbuart_fifo_free(uart->txfifo);
uart->txfifo = apbuart_fifo_create(DEFAULT_TXBUF_SIZE); uart->txfifo = apbuart_fifo_create(DEFAULT_TXBUF_SIZE);
} }
if ( !uart->rxfifo || (uart->rxfifo->size!=DEFAULT_RXBUF_SIZE) ){ if ( !uart->rxfifo || (uart->rxfifo->size!=DEFAULT_RXBUF_SIZE) ){
apbuart_fifo_free(uart->rxfifo); apbuart_fifo_free(uart->rxfifo);
uart->rxfifo = apbuart_fifo_create(DEFAULT_RXBUF_SIZE); uart->rxfifo = apbuart_fifo_create(DEFAULT_RXBUF_SIZE);
} }
if ( !uart->rxfifo || !uart->txfifo ){ if ( !uart->rxfifo || !uart->txfifo ){
/* Failed to get memory */ /* Failed to get memory */
return RTEMS_NO_MEMORY; return RTEMS_NO_MEMORY;
} }
/* Now user must call ioctl(START,0) to begin */ /* Now user must call ioctl(START,0) to begin */
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
static rtems_device_driver apbuart_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) static rtems_device_driver apbuart_close(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{ {
apbuart_priv *uart = &apbuarts[minor]; apbuart_priv *uart = &apbuarts[minor];
FUNCDBG("apbuart_close[%d]:\n",minor); FUNCDBG("apbuart_close[%d]:\n",minor);
apbuart_hw_close(uart); apbuart_hw_close(uart);
/* Software state will be set when open is called again */ /* Software state will be set when open is called again */
rtems_semaphore_release(uart->rx_sem); rtems_semaphore_release(uart->rx_sem);
rtems_semaphore_release(uart->tx_sem); rtems_semaphore_release(uart->tx_sem);
uart->started = 0; uart->started = 0;
rtems_semaphore_release(uart->dev_sem); rtems_semaphore_release(uart->dev_sem);
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
static rtems_device_driver apbuart_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) static rtems_device_driver apbuart_read(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{ {
rtems_libio_rw_args_t *rw_args; rtems_libio_rw_args_t *rw_args;
unsigned int count = 0, oldLevel; unsigned int count = 0, oldLevel;
unsigned char *buf; unsigned char *buf;
apbuart_priv *uart = &apbuarts[minor]; apbuart_priv *uart = &apbuarts[minor];
rw_args = (rtems_libio_rw_args_t *) arg; rw_args = (rtems_libio_rw_args_t *) arg;
FUNCDBG("apbuart_read\n"); FUNCDBG("apbuart_read\n");
buf = (unsigned char *)rw_args->buffer; buf = (unsigned char *)rw_args->buffer;
if ( (rw_args->count < 1) || !buf ) if ( (rw_args->count < 1) || !buf )
return RTEMS_INVALID_NAME; /* EINVAL */ return RTEMS_INVALID_NAME; /* EINVAL */
@@ -568,35 +568,35 @@ static rtems_device_driver apbuart_read(rtems_device_major_number major, rtems_d
printk("UART %x is screwed\n",uart); printk("UART %x is screwed\n",uart);
} }
/* Read from SW fifo */ /* Read from SW fifo */
if ( apbuart_fifo_get(uart->rxfifo,&buf[count]) != 0 ){ if ( apbuart_fifo_get(uart->rxfifo,&buf[count]) != 0 ){
/* non blocking or read at least 1 byte */ /* non blocking or read at least 1 byte */
if ( (count > 0) || (!uart->rxblk) ) if ( (count > 0) || (!uart->rxblk) )
break; /* Return */ break; /* Return */
rtems_interrupt_enable(oldLevel); rtems_interrupt_enable(oldLevel);
/* Block thread until a char is received */ /* Block thread until a char is received */
rtems_semaphore_obtain(uart->rx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT); rtems_semaphore_obtain(uart->rx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
rtems_interrupt_disable(oldLevel); rtems_interrupt_disable(oldLevel);
continue; continue;
} }
/* Got char from SW FIFO */ /* Got char from SW FIFO */
count++; count++;
} while (count < rw_args->count ); } while (count < rw_args->count );
rtems_interrupt_enable(oldLevel); rtems_interrupt_enable(oldLevel);
rw_args->bytes_moved = count; rw_args->bytes_moved = count;
if (count == 0) if (count == 0)
return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */ return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_device_minor_number minor, void *arg)
{ {
rtems_libio_rw_args_t *rw_args; rtems_libio_rw_args_t *rw_args;
@@ -604,26 +604,26 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
char *buf; char *buf;
apbuart_priv *uart = &apbuarts[minor]; apbuart_priv *uart = &apbuarts[minor];
int direct=0; int direct=0;
rw_args = (rtems_libio_rw_args_t *) arg; rw_args = (rtems_libio_rw_args_t *) arg;
FUNCDBG("apbuart_write\n"); FUNCDBG("apbuart_write\n");
buf = rw_args->buffer; buf = rw_args->buffer;
if ( rw_args->count < 1 || !buf ) if ( rw_args->count < 1 || !buf )
return RTEMS_INVALID_NAME; /* EINVAL */ return RTEMS_INVALID_NAME; /* EINVAL */
count = 0; count = 0;
rtems_interrupt_disable(oldLevel); rtems_interrupt_disable(oldLevel);
/* Do we need to start to send first char direct via HW /* Do we need to start to send first char direct via HW
* to get IRQ going. * to get IRQ going.
*/ */
ctrl = READ_REG(&uart->regs->ctrl); ctrl = READ_REG(&uart->regs->ctrl);
if ( (ctrl & APBUART_CTRL_TF) == 0 ){ if ( (ctrl & APBUART_CTRL_TF) == 0 ){
/* TX interrupt is disabled ==> /* TX interrupt is disabled ==>
* SW FIFO is empty and, * SW FIFO is empty and,
* HW FIFO empty * HW FIFO empty
*/ */
@@ -637,7 +637,7 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
uart->regs->ctrl = ctrl | APBUART_CTRL_TE | APBUART_CTRL_TF; uart->regs->ctrl = ctrl | APBUART_CTRL_TE | APBUART_CTRL_TF;
direct = 1; direct = 1;
} }
while( count < rw_args->count ) { while( count < rw_args->count ) {
/* write to HW FIFO direct skipping SW FIFO */ /* write to HW FIFO direct skipping SW FIFO */
if ( direct && ((READ_REG(&uart->regs->status) & APBUART_STATUS_TF) == 0) ){ if ( direct && ((READ_REG(&uart->regs->status) & APBUART_STATUS_TF) == 0) ){
@@ -647,23 +647,23 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
else if ( apbuart_fifo_put(uart->txfifo,buf[count]) ){ else if ( apbuart_fifo_put(uart->txfifo,buf[count]) ){
direct = 0; direct = 0;
DBG("APBUART[%d]: write: SW FIFO Full\n\r",minor); DBG("APBUART[%d]: write: SW FIFO Full\n\r",minor);
/* is full, block? */ /* is full, block? */
if ( ((count < 1) && uart->txblk) || uart->tx_flush ){ if ( ((count < 1) && uart->txblk) || uart->tx_flush ){
rtems_interrupt_enable(oldLevel); rtems_interrupt_enable(oldLevel);
rtems_semaphore_obtain(uart->tx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT); rtems_semaphore_obtain(uart->tx_sem, RTEMS_WAIT, RTEMS_NO_TIMEOUT);
rtems_interrupt_disable(oldLevel); rtems_interrupt_disable(oldLevel);
/* Do we need to start to send first char direct via HW /* Do we need to start to send first char direct via HW
* to get IRQ going. * to get IRQ going.
*/ */
ctrl = READ_REG(&uart->regs->ctrl); ctrl = READ_REG(&uart->regs->ctrl);
if ( (ctrl & APBUART_CTRL_TF) == 0 ){ if ( (ctrl & APBUART_CTRL_TF) == 0 ){
/* TX interrupt is disabled ==> /* TX interrupt is disabled ==>
* SW FIFO is empty and, * SW FIFO is empty and,
* HW FIFO empty * HW FIFO empty
*/ */
@@ -677,7 +677,7 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
uart->regs->ctrl = ctrl | APBUART_CTRL_TF | APBUART_CTRL_TE; uart->regs->ctrl = ctrl | APBUART_CTRL_TF | APBUART_CTRL_TE;
direct = 1; direct = 1;
} }
continue; continue;
} }
/* don't block, return current status */ /* don't block, return current status */
@@ -685,18 +685,18 @@ static rtems_device_driver apbuart_write(rtems_device_major_number major, rtems_
}else{ }else{
direct = 0; direct = 0;
} }
count++; count++;
} }
rtems_interrupt_enable(oldLevel); rtems_interrupt_enable(oldLevel);
rw_args->bytes_moved = count; rw_args->bytes_moved = count;
if (count == 0) if (count == 0)
return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */ return RTEMS_TIMEOUT; /* ETIMEDOUT should be EAGAIN/EWOULDBLOCK */
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
@@ -710,13 +710,13 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
apbuart_stats *stats; apbuart_stats *stats;
FUNCDBG("apbuart_control [%i,%i]\n",major, minor); FUNCDBG("apbuart_control [%i,%i]\n",major, minor);
if (!ioarg) if (!ioarg)
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
ioarg->ioctl_return = 0; ioarg->ioctl_return = 0;
switch(ioarg->command) { switch(ioarg->command) {
/* Enable Receiver & transmitter */ /* Enable Receiver & transmitter */
case APBUART_START: case APBUART_START:
if ( uart->started ) if ( uart->started )
@@ -724,7 +724,7 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
apbuart_hw_open(uart); apbuart_hw_open(uart);
uart->started = 1; uart->started = 1;
break; break;
/* Close Receiver & transmitter */ /* Close Receiver & transmitter */
case APBUART_STOP: case APBUART_STOP:
if ( !uart->started ) if ( !uart->started )
@@ -732,49 +732,49 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
apbuart_hw_close(uart); apbuart_hw_close(uart);
uart->started = 0; uart->started = 0;
break; break;
/* Set RX FIFO Software buffer length /* Set RX FIFO Software buffer length
* It is only possible to change buffer size in * It is only possible to change buffer size in
* non-running mode. * non-running mode.
*/ */
case APBUART_SET_RXFIFO_LEN: case APBUART_SET_RXFIFO_LEN:
if ( uart->started ) if ( uart->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */ return RTEMS_RESOURCE_IN_USE; /* EBUSY */
size = (int)ioarg->buffer; size = (int)ioarg->buffer;
if ( size < 1 ) if ( size < 1 )
return RTEMS_INVALID_NAME; /* EINVAL */ return RTEMS_INVALID_NAME; /* EINVAL */
/* Free old buffer */ /* Free old buffer */
apbuart_fifo_free(uart->rxfifo); apbuart_fifo_free(uart->rxfifo);
/* Allocate new buffer & init it */ /* Allocate new buffer & init it */
uart->rxfifo = apbuart_fifo_create(size); uart->rxfifo = apbuart_fifo_create(size);
if ( !uart->rxfifo ) if ( !uart->rxfifo )
return RTEMS_NO_MEMORY; return RTEMS_NO_MEMORY;
break; break;
/* Set TX FIFO Software buffer length /* Set TX FIFO Software buffer length
* It is only possible to change buffer size * It is only possible to change buffer size
* while in non-running mode. * while in non-running mode.
*/ */
case APBUART_SET_TXFIFO_LEN: case APBUART_SET_TXFIFO_LEN:
if ( uart->started ) if ( uart->started )
return RTEMS_RESOURCE_IN_USE; /* EBUSY */ return RTEMS_RESOURCE_IN_USE; /* EBUSY */
size = (int)ioarg->buffer; size = (int)ioarg->buffer;
if ( size < 1 ) if ( size < 1 )
return RTEMS_INVALID_NAME; /* EINVAL */ return RTEMS_INVALID_NAME; /* EINVAL */
/* Free old buffer */ /* Free old buffer */
apbuart_fifo_free(uart->txfifo); apbuart_fifo_free(uart->txfifo);
/* Allocate new buffer & init it */ /* Allocate new buffer & init it */
uart->txfifo = apbuart_fifo_create(size); uart->txfifo = apbuart_fifo_create(size);
if ( !uart->txfifo ) if ( !uart->txfifo )
return RTEMS_NO_MEMORY; return RTEMS_NO_MEMORY;
break; break;
case APBUART_SET_BAUDRATE: case APBUART_SET_BAUDRATE:
/* Set baud rate of */ /* Set baud rate of */
baudrate = (int)ioarg->buffer; baudrate = (int)ioarg->buffer;
@@ -784,37 +784,37 @@ static rtems_device_driver apbuart_control(rtems_device_major_number major, rtem
uart->scaler = 0; /* use uart->baud */ uart->scaler = 0; /* use uart->baud */
uart->baud = baudrate; uart->baud = baudrate;
break; break;
case APBUART_SET_SCALER: case APBUART_SET_SCALER:
/* use uart->scaler not uart->baud */ /* use uart->scaler not uart->baud */
uart->scaler = data[0]; uart->scaler = data[0];
break; break;
case APBUART_SET_BLOCKING: case APBUART_SET_BLOCKING:
blocking = (unsigned int)ioarg->buffer; blocking = (unsigned int)ioarg->buffer;
uart->rxblk = ( blocking & APBUART_BLK_RX ); uart->rxblk = ( blocking & APBUART_BLK_RX );
uart->txblk = ( blocking & APBUART_BLK_TX ); uart->txblk = ( blocking & APBUART_BLK_TX );
uart->tx_flush = ( blocking & APBUART_BLK_FLUSH ); uart->tx_flush = ( blocking & APBUART_BLK_FLUSH );
break; break;
case APBUART_GET_STATS: case APBUART_GET_STATS:
stats = (void *)ioarg->buffer; stats = (void *)ioarg->buffer;
if ( !stats ) if ( !stats )
return RTEMS_INVALID_NAME; return RTEMS_INVALID_NAME;
/* Copy Stats */ /* Copy Stats */
*stats = uart->stats; *stats = uart->stats;
break; break;
case APBUART_CLR_STATS: case APBUART_CLR_STATS:
/* Clear/reset Stats */ /* Clear/reset Stats */
memset(&uart->stats,0,sizeof(uart->stats)); memset(&uart->stats,0,sizeof(uart->stats));
break; break;
case APBUART_SET_ASCII_MODE: case APBUART_SET_ASCII_MODE:
uart->ascii_mode = (int)ioarg->buffer; uart->ascii_mode = (int)ioarg->buffer;
break; break;
default: default:
return RTEMS_NOT_DEFINED; return RTEMS_NOT_DEFINED;
} }

8
c/src/lib/libbsp/sparc/shared/uart/apbuart_pci.c
View File

@@ -8,7 +8,7 @@
/* Any non-static function will begin with */ /* Any non-static function will begin with */
#define APBUART_PREFIX(name) apbuartpci##name #define APBUART_PREFIX(name) apbuartpci##name
/* do nothing, assume that the interrupt handler is called /* do nothing, assume that the interrupt handler is called
* setup externally calling apbuartpci_interrupt_handler. * setup externally calling apbuartpci_interrupt_handler.
*/ */
#define APBUART_REG_INT(handler,irq,arg) \ #define APBUART_REG_INT(handler,irq,arg) \
@@ -27,15 +27,15 @@ void apbuartpci_interrupt_handler(int irq, void *arg);
int apbuart_pci_register(amba_confarea_type *bus) int apbuart_pci_register(amba_confarea_type *bus)
{ {
/* Setup configuration */ /* Setup configuration */
/* Register the driver */ /* Register the driver */
return APBUART_PREFIX(_register)(bus); return APBUART_PREFIX(_register)(bus);
} }
/* Call this from PCI interrupt handler /* Call this from PCI interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller * irq = the irq number of the HW device local to that IRQMP controller
* *
*/ */
void apbuartpci_interrupt_handler(int irq, void *arg){ void apbuartpci_interrupt_handler(int irq, void *arg){
apbuart_interrupt(arg); apbuart_interrupt(arg);

8
c/src/lib/libbsp/sparc/shared/uart/apbuart_rasta.c
View File

@@ -8,7 +8,7 @@
/* Any non-static function will begin with */ /* Any non-static function will begin with */
#define APBUART_PREFIX(name) apbuartrasta##name #define APBUART_PREFIX(name) apbuartrasta##name
/* do nothing, assume that the interrupt handler is called /* do nothing, assume that the interrupt handler is called
* setup externally calling apbuartrasta_interrupt_handler. * setup externally calling apbuartrasta_interrupt_handler.
*/ */
#define APBUART_REG_INT(handler,irq,arg) \ #define APBUART_REG_INT(handler,irq,arg) \
@@ -27,15 +27,15 @@ void apbuartrasta_interrupt_handler(int irq, void *arg);
int apbuart_rasta_register(amba_confarea_type *bus) int apbuart_rasta_register(amba_confarea_type *bus)
{ {
/* Setup configuration */ /* Setup configuration */
/* Register the driver */ /* Register the driver */
return APBUART_PREFIX(_register)(bus); return APBUART_PREFIX(_register)(bus);
} }
/* Call this from RASTA interrupt handler /* Call this from RASTA interrupt handler
* irq = the irq number of the HW device local to that IRQMP controller * irq = the irq number of the HW device local to that IRQMP controller
* *
*/ */
void apbuartrasta_interrupt_handler(int irq, void *arg){ void apbuartrasta_interrupt_handler(int irq, void *arg){
apbuart_interrupt(arg); apbuart_interrupt(arg);