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2009-05-05 Jennifer Averett <jennifer.averett@OARcorp.com>

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* Makefile.am, configure.ac, preinstall.am, PCI_bus/PCI.c,
	PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c,
	console/85c30.h, console/console.c, console/consolebsp.h,
	console/tbl85c30.c, include/bsp.h, include/gen2.h,
	include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h,
	irq/irq_init.c, start/start.S, startup/Hwr_init.c,
	startup/bspstart.c, startup/linkcmds, timer/timer.c, tod/tod.c,
	vme/VMEConfig.h: Updated and tested with latest interrupt source.
	Modified with latest memory allocation, but this needs testing.
	* irq/no_pic.c: New file.
This commit is contained in:
Jennifer Averett
2009-05-05 16:24:04 +00:00
parent 3c4d2451f0
commit 42b6dd2a53
28 changed files with 461 additions and 757 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
c/src/lib/libbsp/powerpc/score603e/ChangeLog
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@@ -1,3 +1,16 @@
2009-05-05 Jennifer Averett <jennifer.averett@OARcorp.com>
* Makefile.am, configure.ac, preinstall.am, PCI_bus/PCI.c,
PCI_bus/PCI.h, PCI_bus/flash.c, PCI_bus/universe.c, console/85c30.c,
console/85c30.h, console/console.c, console/consolebsp.h,
console/tbl85c30.c, include/bsp.h, include/gen2.h,
include/irq-config.h, include/tm27.h, irq/FPGA.c, irq/irq.h,
irq/irq_init.c, start/start.S, startup/Hwr_init.c,
startup/bspstart.c, startup/linkcmds, timer/timer.c, tod/tod.c,
vme/VMEConfig.h: Updated and tested with latest interrupt source.
Modified with latest memory allocation, but this needs testing.
* irq/no_pic.c: New file.
2009-04-28 Chris Johns <chrisj@rtems.org> 2009-04-28 Chris Johns <chrisj@rtems.org>
* start/start.S: Update for boot_card command line change. * start/start.S: Update for boot_card command line change.

82
c/src/lib/libbsp/powerpc/score603e/Makefile.am
View File

@@ -5,8 +5,7 @@
ACLOCAL_AMFLAGS = -I ../../../../aclocal ACLOCAL_AMFLAGS = -I ../../../../aclocal
include $(top_srcdir)/../../../../automake/compile.am include $(top_srcdir)/../../../../automake/compile.am
include $(top_srcdir)/../../bsp.am
include_bspdir = $(includedir)/bsp
dist_project_lib_DATA = bsp_specs dist_project_lib_DATA = bsp_specs
@@ -17,70 +16,58 @@ nodist_include_HEADERS = include/bspopts.h
nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
DISTCLEANFILES = include/bspopts.h DISTCLEANFILES = include/bspopts.h
include_bspdir = $(includedir)/bsp
include_HEADERS += ../../shared/tod.h include_HEADERS += ../../shared/tod.h
include_HEADERS += ../../shared/include/coverhd.h include/gen2.h include_HEADERS += ../../shared/include/coverhd.h include/gen2.h
### ###
dist_project_lib_DATA += startup/linkcmds dist_project_lib_DATA += startup/linkcmds
noinst_LIBRARIES = libbspstart.a startup_SOURCES = ../../shared/bspclean.c ../../shared/bsplibc.c \
libbspstart_a_SOURCES = start/start.S
project_lib_DATA = start.$(OBJEXT)
libbspstart_a_SOURCES += ../../powerpc/shared/start/rtems_crti.S
project_lib_DATA += rtems_crti.$(OBJEXT)
noinst_LIBRARIES += libbsp.a
libbsp_a_SOURCES =
# startup
libbsp_a_SOURCES += ../../shared/bspclean.c ../../shared/bsplibc.c \
startup/bspstart.c ../../powerpc/shared/startup/bspgetworkarea.c \ startup/bspstart.c ../../powerpc/shared/startup/bspgetworkarea.c \
../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \ ../../shared/bsppost.c \
startup/Hwr_init.c startup/genpvec.c ../../shared/gnatinstallhandler.c \ ../../shared/bootcard.c ../../shared/bsppretaskinghook.c \
../../powerpc/shared/showbats.c \ startup/Hwr_init.c \
../../shared/bsppretaskinghook.c ../../powerpc/shared/startup/sbrk.c ../../shared/gnatinstallhandler.c \
../../powerpc/shared/showbats.c
# pclock pclock_SOURCES = ../../powerpc/shared/clock/p_clock.c
libbsp_a_SOURCES += ../../powerpc/shared/clock/p_clock.c console_SOURCES = console/85c30.c console/85c30.h console/console.c \
# console
libbsp_a_SOURCES += console/85c30.c console/85c30.h console/console.c \
console/tbl85c30.c console/consolebsp.h console/tbl85c30.c console/consolebsp.h
include_bsp_HEADERS = ../../powerpc/shared/pci/pci.h \ include_bsp_HEADERS = ../../powerpc/shared/pci/pci.h \
PCI_bus/PCI.h ../../powerpc/shared/residual/residual.h \ PCI_bus/PCI.h \
../../powerpc/shared/residual/residual.h \
../../powerpc/shared/residual/pnp.h \ ../../powerpc/shared/residual/pnp.h \
../../powerpc/shared/console/consoleIo.h \ ../../powerpc/shared/console/consoleIo.h
../../shared/include/irq-generic.h include/irq-config.h
# pci pci_SOURCES = PCI_bus/flash.c ../../powerpc/shared/pci/pci.c \
libbsp_a_SOURCES += ../../powerpc/shared/pci/pci.c \
../../powerpc/shared/pci/pcifinddevice.c PCI_bus/PCI.c PCI_bus/universe.c ../../powerpc/shared/pci/pcifinddevice.c PCI_bus/PCI.c PCI_bus/universe.c
include_bsp_HEADERS += irq/irq.h \ include_bsp_HEADERS += irq/irq.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \ ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
# irq
libbsp_a_SOURCES += include/irq-config.h irq/FPGA.c irq/irq.c \
../../shared/src/irq-generic.c ../../powerpc/shared/irq/irq_asm.S
include_bsp_HEADERS += ../../powerpc/shared/vectors/vectors.h irq_SOURCES = irq/no_pic.c irq/irq_init.c \
# vectors irq/FPGA.c
libbsp_a_SOURCES += ../../powerpc/shared/vectors/vectors_init.c \
../../powerpc/shared/vectors/vectors.S
include_bsp_HEADERS += ../../shared/vmeUniverse/vmeUniverse.h \ vectors_SOURCES =
../../shared/vmeUniverse/vme_am_defs.h \
../../shared/vmeUniverse/VME.h \ EXTRA_DIST = start/start.S
vme/VMEConfig.h \ start.$(OBJEXT): start/start.S
../../powerpc/shared/motorola/motorola.h \ $(CPPASCOMPILE) -o $@ -c $<
../../shared/vmeUniverse/vmeUniverseDMA.h\ project_lib_DATA = start.$(OBJEXT)
../../shared/vmeUniverse/bspVmeDmaList.h\
../../shared/vmeUniverse/VMEDMA.h EXTRA_DIST += ../../powerpc/shared/start/rtems_crti.S
# vme rtems_crti.$(OBJEXT): ../../powerpc/shared/start/rtems_crti.S
libbsp_a_SOURCES += \ $(CPPASCOMPILE) -o $@ -c $<
../../shared/vmeUniverse/bspVmeDmaList.c \ project_lib_DATA += rtems_crti.$(OBJEXT)
../../shared/vmeUniverse/vme_am_defs.h \
../shared/vme/vmeconfig.c noinst_LIBRARIES = libbsp.a
libbsp_a_SOURCES = $(pclock_SOURCES) $(console_SOURCES) $(irq_SOURCES) \
$(pci_SOURCES) $(vectors_SOURCES) $(startup_SOURCES)
libbsp_a_LIBADD = \ libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
@@ -88,6 +75,7 @@ libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \ ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \ ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \ ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel

3
c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.c
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@@ -1,5 +1,6 @@
/* /*
* COPYRIGHT (c) 1989-2008 *
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be

12
c/src/lib/libbsp/powerpc/score603e/PCI_bus/PCI.h
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@@ -1,17 +1,17 @@
/* /* PCI.h
*
* This include file contains prototypes for chips attached to the * This include file contains prototypes for chips attached to the
* PCI bus. * PCI bus.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id:
*/ */
#ifndef __PCI_h #ifndef __PCI_h
#define __PCI_h #define __PCI_h

9
c/src/lib/libbsp/powerpc/score603e/PCI_bus/flash.c
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@@ -1,6 +1,6 @@
/* /*
* *
* COPYRIGHT (c) 1989-2008 * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -13,9 +13,12 @@
#include <rtems.h> #include <rtems.h>
#include <assert.h> #include <assert.h>
#include <stdio.h> #include <stdio.h>
#include <inttypes.h>
#include <bsp.h> #include <bsp.h>
#include <bsp/irq.h>
#include "PCI.h" #include "PCI.h"
/*PAGE /*PAGE
* *
* SCORE603e_FLASH_Disable * SCORE603e_FLASH_Disable
@@ -34,7 +37,7 @@ unsigned int SCORE603e_FLASH_Disable(
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
unsigned int SCORE603e_FLASH_verify_enable() unsigned int SCORE603e_FLASH_verify_enable( void )
{ {
volatile uint8_t *Ctrl_Status_Register = volatile uint8_t *Ctrl_Status_Register =
(void *)SCORE603E_BOARD_CTRL_REG; (void *)SCORE603E_BOARD_CTRL_REG;
@@ -77,7 +80,7 @@ unsigned int SCORE603e_FLASH_pci_reset_reg(
Write_pci_device_register( reg, pci_value ); Write_pci_device_register( reg, pci_value );
value = Read_pci_device_register( reg ); value = Read_pci_device_register( reg );
if (value != pci_value) { if (value != pci_value) {
printf("Error PCI %x wrote %x read %x\n", reg, pci_value, value); printf("Error PCI 0x%2"PRIX8" wrote 0x%8"PRIX32" read %8"PRIX32"\n", reg, pci_value, value);
} }
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }

6
c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
View File

@@ -1,5 +1,5 @@
/* /*
* COPYRIGHT (c) 1989-2008 * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -229,7 +229,7 @@ void set_vme_base_address (
/* /*
* Gets the VME base address * Gets the VME base address
*/ */
uint32_t get_vme_base_address () uint32_t get_vme_base_address (void)
{ {
volatile uint32_t temp; volatile uint32_t temp;
@@ -238,7 +238,7 @@ uint32_t get_vme_base_address ()
return (temp); return (temp);
} }
uint32_t get_vme_slave_size() uint32_t get_vme_slave_size(void)
{ {
volatile uint32_t temp; volatile uint32_t temp;
temp = PCI_bus_read( &UNIVERSE->VSI0_BD); temp = PCI_bus_read( &UNIVERSE->VSI0_BD);

4
c/src/lib/libbsp/powerpc/score603e/configure.ac
View File

@@ -37,7 +37,7 @@ RTEMS_BSPOPTS_SET([CONSOLE_USE_INTERRUPTS],[*],[0])
RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS], RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS],
[whether using console interrupts]) [whether using console interrupts])
RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[1]) RTEMS_BSPOPTS_SET([HAS_PMC_PSC8],[*],[0])
RTEMS_BSPOPTS_HELP([HAS_PMC_PSC8], RTEMS_BSPOPTS_HELP([HAS_PMC_PSC8],
[whether has a PSC8 PMC board attached to PMC slot]) [whether has a PSC8 PMC board attached to PMC slot])
@@ -69,8 +69,6 @@ RTEMS_BSPOPTS_HELP([PPC_VECTOR_FILE_BASE],
RTEMS_CHECK_NETWORKING RTEMS_CHECK_NETWORKING
AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
BSP_BOOTCARD_OPTIONS
# Explicitly list all Makefiles here # Explicitly list all Makefiles here
AC_CONFIG_FILES([Makefile]) AC_CONFIG_FILES([Makefile])

23
c/src/lib/libbsp/powerpc/score603e/console/85c30.c
View File

@@ -4,7 +4,7 @@
* *
* Currently only polled mode is supported. * Currently only polled mode is supported.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -129,8 +129,6 @@ void initialize_85c30_port(
Console_Protocol *Setup; Console_Protocol *Setup;
uint16_t baud_constant; uint16_t baud_constant;
printk("initialize_85c30_port start\n");
Setup = Port->Protocol; Setup = Port->Protocol;
ctrl = Port->ctrl; ctrl = Port->ctrl;
@@ -155,20 +153,17 @@ printk("initialize_85c30_port start\n");
/* /*
* Set Write Register 2 to contain the interrupt vector * Set Write Register 2 to contain the interrupt vector
*/ */
printk("initialize_85c30_port 2, %d\n", Port->Chip->vector );
Write_85c30_register( ctrl, 2, Port->Chip->vector ); Write_85c30_register( ctrl, 2, Port->Chip->vector );
#endif #endif
/* /*
* Set Write Register 3 to disable the Receiver * Set Write Register 3 to disable the Receiver
*/ */
printk("initialize_85c30_port 0x03, 0x00\n");
Write_85c30_register( ctrl, 0x03, 0x00 ); Write_85c30_register( ctrl, 0x03, 0x00 );
/* /*
* Set Write Register 5 to disable the Transmitter * Set Write Register 5 to disable the Transmitter
*/ */
printk("initialize_85c30_port 5, 0x00\n");
Write_85c30_register( ctrl, 5, 0x00 ); Write_85c30_register( ctrl, 5, 0x00 );
/* WR 6 -- unneeded in asynchronous mode */ /* WR 6 -- unneeded in asynchronous mode */
@@ -178,13 +173,11 @@ printk("initialize_85c30_port 5, 0x00\n");
/* /*
* Set Write Register 9 to disable all interrupt sources * Set Write Register 9 to disable all interrupt sources
*/ */
printk("initialize_85c30_port 9, 0x00\n");
Write_85c30_register( ctrl, 9, 0x00 ); Write_85c30_register( ctrl, 9, 0x00 );
/* /*
* Set Write Register 10 for simple Asynchronous operation * Set Write Register 10 for simple Asynchronous operation
*/ */
printk("initialize_85c30_port 0x0a, 0x00\n");
Write_85c30_register( ctrl, 0x0a, 0x00 ); Write_85c30_register( ctrl, 0x0a, 0x00 );
/* /*
@@ -192,7 +185,6 @@ printk("initialize_85c30_port 0x0a, 0x00\n");
* clock as BRG output and the transmit clock * clock as BRG output and the transmit clock
* as the output source for TRxC pin via register 11 * as the output source for TRxC pin via register 11
*/ */
printk("initialize_85c30_port 0x0b, 0x56\n");
Write_85c30_register( ctrl, 0x0b, 0x56 ); Write_85c30_register( ctrl, 0x0b, 0x56 );
value = baud_constant; value = baud_constant;
@@ -202,14 +194,12 @@ printk("initialize_85c30_port 0x0b, 0x56\n");
* If the time constans = 1E, then the desire * If the time constans = 1E, then the desire
* baud rate will be equilvalent to 9600, via register 12. * baud rate will be equilvalent to 9600, via register 12.
*/ */
printk("initialize_85c30_port 0x0c, 0x%x\n", value & 0xff);
Write_85c30_register( ctrl, 0x0c, value & 0xff ); Write_85c30_register( ctrl, 0x0c, value & 0xff );
/* /*
* using register 13 * using register 13
* Setup the upper 8 bits time constants = 0 * Setup the upper 8 bits time constants = 0
*/ */
printk("initialize_85c30_port 0x0d, 0x%x\n", value>>8);
Write_85c30_register( ctrl, 0x0d, value>>8 ); Write_85c30_register( ctrl, 0x0d, value>>8 );
/* /*
@@ -218,7 +208,6 @@ printk("initialize_85c30_port 0x0d, 0x%x\n", value>>8);
* rate generator enable with clock from the * rate generator enable with clock from the
* SCC's PCLK input via register 14. * SCC's PCLK input via register 14.
*/ */
printk("initialize_85c30_port 0x0e, 0x07\n");
Write_85c30_register( ctrl, 0x0e, 0x07 ); Write_85c30_register( ctrl, 0x0e, 0x07 );
/* /*
@@ -234,7 +223,6 @@ printk("initialize_85c30_port 0x0e, 0x07\n");
value = 0x01; value = 0x01;
value = value | Char_size_85c30[ Setup->read_char_bits ].read_setup; value = value | Char_size_85c30[ Setup->read_char_bits ].read_setup;
printk("initialize_85c30_port 0x03, 0x%x\n", value);
Write_85c30_register( ctrl, 0x03, value ); Write_85c30_register( ctrl, 0x03, value );
/* /*
@@ -249,21 +237,18 @@ printk("initialize_85c30_port 0x03, 0x%x\n", value);
*/ */
value = 0x8a; value = 0x8a;
value = value | Char_size_85c30[ Setup->write_char_bits ].write_setup; value = value | Char_size_85c30[ Setup->write_char_bits ].write_setup;
printk("initialize_85c30_port 0x05, 0x%x\n", value);
Write_85c30_register( ctrl, 0x05, value ); Write_85c30_register( ctrl, 0x05, value );
/* /*
* Reset Tx UNDERRUN/EOM LATCH and ERROR * Reset Tx UNDERRUN/EOM LATCH and ERROR
* via register 0 * via register 0
*/ */
printk("initialize_85c30_port 0x00, 0xf0\n");
Write_85c30_register( ctrl, 0x00, 0xf0 ); Write_85c30_register( ctrl, 0x00, 0xf0 );
#if CONSOLE_USE_INTERRUPTS #if CONSOLE_USE_INTERRUPTS
/* /*
* Set Write Register 1 to interrupt on Rx characters or special condition. * Set Write Register 1 to interrupt on Rx characters or special condition.
*/ */
printk("initialize_85c30_port 1, 0x10\n");
Write_85c30_register( ctrl, 1, 0x10 ); Write_85c30_register( ctrl, 1, 0x10 );
#endif #endif
@@ -271,13 +256,11 @@ printk("initialize_85c30_port 1, 0x10\n");
* Set Write Register 15 to disable extended functions. * Set Write Register 15 to disable extended functions.
*/ */
printk("initialize_85c30_port 15, 0x00\n");
Write_85c30_register( ctrl, 15, 0x00 ); Write_85c30_register( ctrl, 15, 0x00 );
/* /*
* Set the Command Register to Reset Ext/STATUS. * Set the Command Register to Reset Ext/STATUS.
*/ */
printk("initialize_85c30_port 0x00, 0x10\n");
Write_85c30_register( ctrl, 0x00, 0x10 ); Write_85c30_register( ctrl, 0x00, 0x10 );
#if CONSOLE_USE_INTERRUPTS #if CONSOLE_USE_INTERRUPTS
@@ -288,14 +271,12 @@ printk("initialize_85c30_port 0x00, 0x10\n");
* Enables parity as a special condition. * Enables parity as a special condition.
* Enables Tx interrupt. * Enables Tx interrupt.
*/ */
printk("initialize_85c30_port 1, 0x16\n");
Write_85c30_register( ctrl, 1, 0x16 ); Write_85c30_register( ctrl, 1, 0x16 );
/* /*
* Set Write Register 9 to enable all interrupt sources * Set Write Register 9 to enable all interrupt sources
* Changed from 0 to a * Changed from 0 to a
*/ */
printk("initialize_85c30_port 9, 0x0A\n");
Write_85c30_register( ctrl, 9, 0x0A ); Write_85c30_register( ctrl, 9, 0x0A );
/* XXX */ /* XXX */
@@ -303,12 +284,10 @@ printk("initialize_85c30_port 9, 0x0A\n");
/* /*
* Issue reset highest Interrupt Under Service (IUS) command. * Issue reset highest Interrupt Under Service (IUS) command.
*/ */
printk("initialize_85c30_port STATUS_REGISTER, 0X38\n");
Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 ); Write_85c30_register( Port->ctrl, STATUS_REGISTER, 0x38 );
#endif #endif
printk("initialize_85c30_port end of method\n");
} }
/* PAGE /* PAGE

9
c/src/lib/libbsp/powerpc/score603e/console/85c30.h
View File

@@ -1,11 +1,12 @@
/* /* 85c30.h
*
* This include file contains z85c30 chip information. * This include file contains z85c30 chip information.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$

11
c/src/lib/libbsp/powerpc/score603e/console/console.c
View File

@@ -5,7 +5,7 @@
* *
* Currently only polled mode is supported. * Currently only polled mode is supported.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -181,8 +181,6 @@ rtems_device_driver console_initialize(
rtems_device_minor_number console; rtems_device_minor_number console;
int port, chip, p0,p1; int port, chip, p0,p1;
printk("console_initialize start\n");
/* /*
* initialize the termio interface. * initialize the termio interface.
*/ */
@@ -207,7 +205,6 @@ printk("console_initialize start\n");
* debugger...) * debugger...)
*/ */
#if ( INITIALIZE_COM_PORTS ) #if ( INITIALIZE_COM_PORTS )
/* /*
* Force to perform a hardware reset w/o * Force to perform a hardware reset w/o
* Master interrupt enable via register 9 * Master interrupt enable via register 9
@@ -239,16 +236,13 @@ printk("console_initialize start\n");
for (port=1; port<NUM_Z85C30_PORTS; port++) { for (port=1; port<NUM_Z85C30_PORTS; port++) {
chip = port >> 1; chip = port >> 1;
printk("console_initialize initialize_85c30_port %d\n", port);
initialize_85c30_port( &Ports_85C30[port] ); initialize_85c30_port( &Ports_85C30[port] );
} }
#if CONSOLE_USE_INTERRUPTS #if CONSOLE_USE_INTERRUPTS
printk("console_initialize console_initialize_interrupts\n");
console_initialize_interrupts(); console_initialize_interrupts();
#endif #endif
printk("console_initialize end\n");
return RTEMS_SUCCESSFUL; return RTEMS_SUCCESSFUL;
} }
@@ -420,12 +414,13 @@ debug_putc_onlcr(const char c)
if ('\n'==c){ if ('\n'==c){
rtems_interrupt_disable( isrlevel ); rtems_interrupt_disable( isrlevel );
outbyte_polled_85c30( csr, '\r' ); outbyte_polled_85c30( csr, '\r' );
rtems_interrupt_enable( isrlevel );
asm volatile("isync"); asm volatile("isync");
rtems_interrupt_enable( isrlevel );
} }
rtems_interrupt_disable( isrlevel ); rtems_interrupt_disable( isrlevel );
outbyte_polled_85c30( csr, c ); outbyte_polled_85c30( csr, c );
asm volatile("isync");
rtems_interrupt_enable( isrlevel ); rtems_interrupt_enable( isrlevel );
} }

9
c/src/lib/libbsp/powerpc/score603e/console/consolebsp.h
View File

@@ -1,11 +1,12 @@
/* /* consolebsp.h
*
* This include file contains all console driver definations * This include file contains all console driver definations
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$

3
c/src/lib/libbsp/powerpc/score603e/console/tbl85c30.c
View File

@@ -2,7 +2,7 @@
* This file contains the table for the z85c30 port * This file contains the table for the z85c30 port
* used by the console driver. * used by the console driver.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -14,6 +14,7 @@
#include "consolebsp.h" #include "consolebsp.h"
#include <bsp.h> #include <bsp.h>
#include <bsp/irq.h>
#define CONSOLE_DEFAULT_BAUD_RATE 9600 #define CONSOLE_DEFAULT_BAUD_RATE 9600
#define CONSOLE_DEFAULT_BAUD_CONSTANT Score603e_Z8530_Chip0_Baud(9600) #define CONSOLE_DEFAULT_BAUD_CONSTANT Score603e_Z8530_Chip0_Baud(9600)

56
c/src/lib/libbsp/powerpc/score603e/include/bsp.h
View File

@@ -1,11 +1,12 @@
/* /* bsp.h
*
* This include file contains all board IO definitions. * This include file contains all board IO definitions.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$
@@ -18,6 +19,8 @@
extern "C" { extern "C" {
#endif #endif
#define BSP_ZERO_WORKSPACE_AUTOMATICALLY TRUE
#include <bspopts.h> #include <bspopts.h>
#include <rtems.h> #include <rtems.h>
#include <rtems/console.h> #include <rtems/console.h>
@@ -34,8 +37,6 @@ extern "C" {
#if (HAS_PMC_PSC8) #if (HAS_PMC_PSC8)
#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4) #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
#else #else
/* XXXXX FIX THIS */
#error "MUST HAVE PSC8 SET FOR BOEING CODE"
#define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4) #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
#endif #endif
@@ -54,6 +55,7 @@ extern "C" {
*/ */
#include <gen2.h> #include <gen2.h>
#include <bsp/irq.h>
/* /*
* The following macro calculates the Baud constant. For the Z8530 chip. * The following macro calculates the Baud constant. For the Z8530 chip.
@@ -80,25 +82,55 @@ extern "C" {
asm volatile(" eieio ") asm volatile(" eieio ")
/* Constants */
/*
* Device Driver Table Entries
*/
/*
* NOTE: Use the standard Console driver entry
*/
/*
* NOTE: Use the standard Clock driver entry
*/
/* /*
* Information placed in the linkcmds file. * Information placed in the linkcmds file.
*/ */
extern void *RAM_END; extern int RAM_START;
extern void *end; extern int RAM_END;
extern int RAM_SIZE;
extern int PROM_START;
extern int PROM_END;
extern int PROM_SIZE;
extern int CLOCK_SPEED; extern int CLOCK_SPEED;
extern int CPU_PPC_CLICKS_PER_MS; extern int CPU_PPC_CLICKS_PER_MS;
extern int end; /* last address in the program */
/* /*
* Total RAM available * Total RAM available
*/ */
extern unsigned int BSP_mem_size; extern int end; /* last address in the program */
extern int RAM_END;
extern uint32_t BSP_mem_size;
/*
* How many libio files we want
*/
#define BSP_LIBIO_MAX_FDS 20
/* functions */ /* functions */
/* /*
* genvec.c *
*/ */
rtems_isr_entry set_EE_vector( rtems_isr_entry set_EE_vector(
rtems_isr_entry handler, /* isr routine */ rtems_isr_entry handler, /* isr routine */
@@ -140,6 +172,10 @@ void unmask_irq(
uint16_t irq_idx uint16_t irq_idx
); );
void mask_irq(
uint16_t irq_idx
);
void init_irq_data_register(); void init_irq_data_register();
uint16_t read_and_clear_PMC_irq( uint16_t read_and_clear_PMC_irq(

75
c/src/lib/libbsp/powerpc/score603e/include/gen2.h
View File

@@ -1,11 +1,12 @@
/* /* Gen2.h
*
* This include file contains all Generation 2 board addreses * This include file contains all Generation 2 board addreses
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$
@@ -177,67 +178,6 @@ extern "C" {
* Score603e Interupt Definations. * Score603e Interupt Definations.
*/ */
/*
* First Score Unique IRQ
*/
#define Score_IRQ_First ( PPC_IRQ_LAST + 1 )
/*
* The Following Are part of a Score603e FPGA.
*/
#define SCORE603E_IRQ00 ( Score_IRQ_First + 0 )
#define SCORE603E_IRQ01 ( Score_IRQ_First + 1 )
#define SCORE603E_IRQ02 ( Score_IRQ_First + 2 )
#define SCORE603E_IRQ03 ( Score_IRQ_First + 3 )
#define SCORE603E_IRQ04 ( Score_IRQ_First + 4 )
#define SCORE603E_IRQ05 ( Score_IRQ_First + 5 )
#define SCORE603E_IRQ06 ( Score_IRQ_First + 6 )
#define SCORE603E_IRQ07 ( Score_IRQ_First + 7 )
#define SCORE603E_IRQ08 ( Score_IRQ_First + 8 )
#define SCORE603E_IRQ09 ( Score_IRQ_First + 9 )
#define SCORE603E_IRQ10 ( Score_IRQ_First + 10 )
#define SCORE603E_IRQ11 ( Score_IRQ_First + 11 )
#define SCORE603E_IRQ12 ( Score_IRQ_First + 12 )
#define SCORE603E_IRQ13 ( Score_IRQ_First + 13 )
#define SCORE603E_IRQ14 ( Score_IRQ_First + 14 )
#define SCORE603E_IRQ15 ( Score_IRQ_First + 15 )
#define SCORE603E_TIMER1_IRQ SCORE603E_IRQ00
#define SCORE603E_TIMER2_IRQ SCORE603E_IRQ01
#define SCORE603E_TIMER3_IRQ SCORE603E_IRQ02
#define SCORE603E_85C30_1_IRQ SCORE603E_IRQ03
#define SCORE603E_85C30_0_IRQ SCORE603E_IRQ04
#define SCORE603E_RTC_IRQ SCORE603E_IRQ05
#define SCORE603E_PCI_IRQ_0 SCORE603E_IRQ06
#define SCORE603E_PCI_IRQ_1 SCORE603E_IRQ07
#define SCORE603E_PCI_IRQ_2 SCORE603E_IRQ08
#define SCORE603E_PCI_IRQ_3 SCORE603E_IRQ09
#define SCORE603E_UNIVERSE_IRQ SCORE603E_IRQ10
#define SCORE603E_1553_IRQ SCORE603E_IRQ11
#define SCORE603E_MAIL_BOX_IRQ_0 SCORE603E_IRQ12
#define SCORE603E_MAIL_BOX_IRQ_1 SCORE603E_IRQ13
#define SCORE603E_MAIL_BOX_IRQ_2 SCORE603E_IRQ14
#define SCORE603E_MAIL_BOX_IRQ_3 SCORE603E_IRQ15
/*
* The Score FPGA maps all interrupts comming from the PMC card to
* the FPGA interrupt SCORE603E_PCI_IRQ_0 the PMC status word must be
* read to indicate which interrupt was chained to the FPGA.
*/
#define SCORE603E_IRQ16 ( Score_IRQ_First + 16 )
#define SCORE603E_IRQ17 ( Score_IRQ_First + 17 )
#define SCORE603E_IRQ18 ( Score_IRQ_First + 18 )
#define SCORE603E_IRQ19 ( Score_IRQ_First + 19 )
/*
* IRQ'a read from the PMC card
*/
#define SCORE603E_85C30_4_IRQ SCORE603E_IRQ16 /* SCC 422-1 */
#define SCORE603E_85C30_2_IRQ SCORE603E_IRQ17 /* SCC 232-1 */
#define SCORE603E_85C30_5_IRQ SCORE603E_IRQ18 /* SCC 422-2 */
#define SCORE603E_85C30_3_IRQ SCORE603E_IRQ19 /* SCC 232-2 */
#define MAX_BOARD_IRQS SCORE603E_IRQ19
/* /*
* BSP_TIMER_AVG_OVERHEAD and BSP_TIMER_LEAST_VALID for the shared timer * BSP_TIMER_AVG_OVERHEAD and BSP_TIMER_LEAST_VALID for the shared timer
@@ -263,8 +203,9 @@ extern "C" {
#define BSP_Convert_decrementer( _value ) \ #define BSP_Convert_decrementer( _value ) \
(int) (((_value) * 4000) / 6667) (int) (((_value) * 4000) / 6667)
#endif
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif

2
c/src/lib/libbsp/powerpc/score603e/include/irq-config.h
View File

@@ -4,6 +4,8 @@
* @ingroup bsp_interrupt * @ingroup bsp_interrupt
* *
* @brief BSP interrupt support configuration. * @brief BSP interrupt support configuration.
*
* $Id$
*/ */
/* /*

3
c/src/lib/libbsp/powerpc/score603e/include/tm27.h
View File

@@ -1,6 +1,9 @@
/* /*
* tm27.h * tm27.h
* *
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.

49
c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
View File

@@ -1,20 +1,23 @@
/* FPGA.c -- Bridge for second and subsequent generations /* FPGA.c -- Bridge for second and subsequent generations
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$
*/ */
#include <bsp.h> #include <bsp.h>
#include <bsp/irq.h>
#include <string.h> #include <string.h>
#include <fcntl.h> #include <fcntl.h>
#include <assert.h> #include <assert.h>
#include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <rtems/bspIo.h> #include <rtems/bspIo.h>
/* /*
@@ -25,23 +28,22 @@ void initialize_PCI_bridge (void)
/* Note: Accept DINKs setup of the PCI Bridge and don't /* Note: Accept DINKs setup of the PCI Bridge and don't
* change anything. * change anything.
*/ */
printk("initialize_PCI_bridge: \n");
} }
void set_irq_mask( void set_irq_mask(
uint16_t value uint16_t value
) )
{ {
uint16_t *loc; volatile uint16_t *loc;
loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA; loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA;
*loc = value; *loc = value;
} }
uint16_t get_irq_mask(voi) uint16_t get_irq_mask( void )
{ {
uint16_t *loc; volatile uint16_t *loc;
uint16_t value; uint16_t value;
loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA; loc = (uint16_t*)SCORE603E_FPGA_MASK_DATA;
@@ -51,6 +53,32 @@ uint16_t get_irq_mask(voi)
return value; return value;
} }
void mask_irq(
uint16_t irq_idx
)
{
uint16_t value;
uint32_t mask_idx = irq_idx;
value = get_irq_mask();
#if (HAS_PMC_PSC8)
switch (irq_idx + Score_IRQ_First ) {
case SCORE603E_85C30_4_IRQ:
case SCORE603E_85C30_2_IRQ:
case SCORE603E_85C30_5_IRQ:
case SCORE603E_85C30_3_IRQ:
mask_idx = SCORE603E_PCI_IRQ_0 - Score_IRQ_First;
break;
default:
break;
}
#endif
value |= (0x1 << mask_idx);
set_irq_mask( value );
}
void unmask_irq( void unmask_irq(
uint16_t irq_idx uint16_t irq_idx
) )
@@ -137,14 +165,15 @@ uint16_t read_and_clear_irq(void)
{ {
uint16_t irq; uint16_t irq;
irq = (*SCORE603E_FPGA_VECT_DATA);
irq = (*SCORE603E_FPGA_VECT_DATA);
Processor_Synchronize();
if ((irq & 0xffff0) != 0x10) { if ((irq & 0xffff0) != 0x10) {
printk( "ERROR:: no irq data\n"); printk( "read_and_clear_irq:: ERROR==>no irq data 0x%x\n", irq);
return (irq | 0x80); return (irq | 0x80);
} }
irq &=0xf; irq &=0xf;
irq += Score_IRQ_First;
return irq; return irq;
} }

185
c/src/lib/libbsp/powerpc/score603e/irq/irq.h
View File

@@ -1,17 +1,19 @@
/* /* irq.h
*
* This include file describe the data structure and the functions implemented * This include file describe the data structure and the functions implemented
* by RTEMS to write interrupt handlers. * by RTEMS to write interrupt handlers.
* *
* Copyright (C) 1999 valette@crf.canon.fr
*
* This code is heavilly inspired by the public specification of STREAM V2 * This code is heavilly inspired by the public specification of STREAM V2
* that can be found at : * that can be found at :
* *
* <http://www.chorus.com/Documentation/index.html> by following * <http://www.chorus.com/Documentation/index.html> by following
* the STREAM API Specification Document link. * the STREAM API Specification Document link.
* *
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
* found in found in the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$
@@ -23,46 +25,13 @@
#define BSP_SHARED_HANDLER_SUPPORT 1 #define BSP_SHARED_HANDLER_SUPPORT 1
#include <rtems/irq.h> #include <rtems/irq.h>
/*
* 8259 edge/level control definitions at VIA
*/
#define ISA8259_M_ELCR 0x4d0
#define ISA8259_S_ELCR 0x4d1
#define ELCRS_INT15_LVL 0x80
#define ELCRS_INT14_LVL 0x40
#define ELCRS_INT13_LVL 0x20
#define ELCRS_INT12_LVL 0x10
#define ELCRS_INT11_LVL 0x08
#define ELCRS_INT10_LVL 0x04
#define ELCRS_INT9_LVL 0x02
#define ELCRS_INT8_LVL 0x01
#define ELCRM_INT7_LVL 0x80
#define ELCRM_INT6_LVL 0x40
#define ELCRM_INT5_LVL 0x20
#define ELCRM_INT4_LVL 0x10
#define ELCRM_INT3_LVL 0x8
#define ELCRM_INT2_LVL 0x4
#define ELCRM_INT1_LVL 0x2
#define ELCRM_INT0_LVL 0x1
/* PIC's command and mask registers */
#define PIC_MASTER_COMMAND_IO_PORT 0x20 /* Master PIC command register */
#define PIC_SLAVE_COMMAND_IO_PORT 0xa0 /* Slave PIC command register */
#define PIC_MASTER_IMR_IO_PORT 0x21 /* Master PIC Interrupt Mask Register */
#define PIC_SLAVE_IMR_IO_PORT 0xa1 /* Slave PIC Interrupt Mask Register */
/* Command for specific EOI (End Of Interrupt): Interrupt acknowledge */
#define PIC_EOSI 0x60 /* End of Specific Interrupt (EOSI) */
#define SLAVE_PIC_EOSI 0x62 /* End of Specific Interrupt (EOSI) for cascade */
#define PIC_EOI 0x20 /* Generic End of Interrupt (EOI) */
#ifndef ASM #ifndef ASM
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* /*
* rtems_irq_number Definitions * rtems_irq_number Definitions
*/ */
@@ -73,20 +42,30 @@ extern "C" {
#define BSP_ISA_IRQ_NUMBER (16) #define BSP_ISA_IRQ_NUMBER (16)
#define BSP_ISA_IRQ_LOWEST_OFFSET (0) #define BSP_ISA_IRQ_LOWEST_OFFSET (0)
#define BSP_ISA_IRQ_MAX_OFFSET (BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1) #define BSP_ISA_IRQ_MAX_OFFSET (BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1)
/* /*
* PCI IRQ handlers related definitions * PCI IRQ handlers related definitions
* CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
*/ */
#define BSP_PCI_IRQ_NUMBER (16) #define BSP_PCI_IRQ_NUMBER (16)
#define BSP_PCI_IRQ_LOWEST_OFFSET (BSP_ISA_IRQ_NUMBER) #define BSP_PCI_IRQ_LOWEST_OFFSET (BSP_ISA_IRQ_NUMBER)
#define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1) #define BSP_PCI_IRQ_MAX_OFFSET (BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1)
/*
* PMC IRQ
*/
#define BSP_PMC_IRQ_NUMBER (4)
#define BSP_PMC_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET + 1)
#define BSP_PMC_IRQ_MAX_OFFSET (BSP_PMC_IRQ_LOWEST_OFFSET + BSP_PMC_IRQ_NUMBER - 1)
/* /*
* PowerPC exceptions handled as interrupt where an RTEMS managed interrupt * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
* handler might be connected * handler might be connected
*/ */
#define BSP_PROCESSOR_IRQ_NUMBER (1) #define BSP_PROCESSOR_IRQ_NUMBER (1)
#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET + 1) #define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PMC_IRQ_MAX_OFFSET + 1)
#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1) #define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
/* Misc vectors for OPENPIC irqs (IPI, timers) /* Misc vectors for OPENPIC irqs (IPI, timers)
*/ */
#define BSP_MISC_IRQ_NUMBER (8) #define BSP_MISC_IRQ_NUMBER (8)
@@ -98,96 +77,76 @@ extern "C" {
#define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1) #define BSP_IRQ_NUMBER (BSP_MISC_IRQ_MAX_OFFSET + 1)
#define BSP_LOWEST_OFFSET (BSP_ISA_IRQ_LOWEST_OFFSET) #define BSP_LOWEST_OFFSET (BSP_ISA_IRQ_LOWEST_OFFSET)
#define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET) #define BSP_MAX_OFFSET (BSP_MISC_IRQ_MAX_OFFSET)
/*
* Some ISA IRQ symbolic name definition
*/
#define BSP_ISA_PERIODIC_TIMER (0)
#define BSP_ISA_KEYBOARD (1)
#define BSP_ISA_UART_COM2_IRQ (3)
#define BSP_ISA_UART_COM1_IRQ (4)
#define BSP_ISA_RT_TIMER1 (8)
#define BSP_ISA_RT_TIMER3 (10)
/*
* Some PCI IRQ symbolic name definition
*/
#define BSP_PCI_IRQ0 (BSP_PCI_IRQ_LOWEST_OFFSET)
#define BSP_PCI_ISA_BRIDGE_IRQ (BSP_PCI_IRQ0)
#if defined(mvme2100)
#define BSP_DEC21143_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 1)
#define BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 2)
#define BSP_PCMIP_TYPE1_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 3)
#define BSP_PCMIP_TYPE2_SLOT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 4)
#define BSP_PCMIP_TYPE2_SLOT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 5)
#define BSP_PCI_INTA_UNIVERSE_LINT0_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 7)
#define BSP_PCI_INTB_UNIVERSE_LINT1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 8)
#define BSP_PCI_INTC_UNIVERSE_LINT2_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 9)
#define BSP_PCI_INTD_UNIVERSE_LINT3_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 10)
#define BSP_UART_COM1_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 13)
#define BSP_FRONT_PANEL_ABORT_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 14)
#define BSP_RTC_IRQ (BSP_PCI_IRQ_LOWEST_OFFSET + 15)
#else
#define BSP_UART_COM1_IRQ BSP_ISA_UART_COM1_IRQ
#define BSP_UART_COM2_IRQ BSP_ISA_UART_COM2_IRQ
#endif
/* /*
* Some Processor execption handled as RTEMS IRQ symbolic name definition * Some Processor execption handled as RTEMS IRQ symbolic name definition
*/ */
#define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET) #define BSP_DECREMENTER (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
/*
* First Score Unique IRQ
*/
#define Score_IRQ_First ( BSP_PCI_IRQ_LOWEST_OFFSET )
/* /*
* Type definition for RTEMS managed interrupts * The Following Are part of a Score603e FPGA.
*/ */
typedef unsigned short rtems_i8259_masks; #define SCORE603E_IRQ00 ( Score_IRQ_First + 0 )
#define SCORE603E_IRQ01 ( Score_IRQ_First + 1 )
#define SCORE603E_IRQ02 ( Score_IRQ_First + 2 )
#define SCORE603E_IRQ03 ( Score_IRQ_First + 3 )
#define SCORE603E_IRQ04 ( Score_IRQ_First + 4 )
#define SCORE603E_IRQ05 ( Score_IRQ_First + 5 )
#define SCORE603E_IRQ06 ( Score_IRQ_First + 6 )
#define SCORE603E_IRQ07 ( Score_IRQ_First + 7 )
#define SCORE603E_IRQ08 ( Score_IRQ_First + 8 )
#define SCORE603E_IRQ09 ( Score_IRQ_First + 9 )
#define SCORE603E_IRQ10 ( Score_IRQ_First + 10 )
#define SCORE603E_IRQ11 ( Score_IRQ_First + 11 )
#define SCORE603E_IRQ12 ( Score_IRQ_First + 12 )
#define SCORE603E_IRQ13 ( Score_IRQ_First + 13 )
#define SCORE603E_IRQ14 ( Score_IRQ_First + 14 )
#define SCORE603E_IRQ15 ( Score_IRQ_First + 15 )
extern volatile rtems_i8259_masks i8259s_cache; #define SCORE603E_TIMER1_IRQ SCORE603E_IRQ00
#define SCORE603E_TIMER2_IRQ SCORE603E_IRQ01
/*-------------------------------------------------------------------------+ #define SCORE603E_TIMER3_IRQ SCORE603E_IRQ02
| Function Prototypes. #define SCORE603E_85C30_1_IRQ SCORE603E_IRQ03
+--------------------------------------------------------------------------*/ #define SCORE603E_85C30_0_IRQ SCORE603E_IRQ04
/* #define SCORE603E_RTC_IRQ SCORE603E_IRQ05
* ------------------------ Intel 8259 (or emulation) Mngt Routines ------- #define SCORE603E_PCI_IRQ_0 SCORE603E_IRQ06
*/ #define SCORE603E_PCI_IRQ_1 SCORE603E_IRQ07
void BSP_i8259s_init(void); #define SCORE603E_PCI_IRQ_2 SCORE603E_IRQ08
#define SCORE603E_PCI_IRQ_3 SCORE603E_IRQ09
#define SCORE603E_UNIVERSE_IRQ SCORE603E_IRQ10
#define SCORE603E_1553_IRQ SCORE603E_IRQ11
#define SCORE603E_MAIL_BOX_IRQ_0 SCORE603E_IRQ12
#define SCORE603E_MAIL_BOX_IRQ_1 SCORE603E_IRQ13
#define SCORE603E_MAIL_BOX_IRQ_2 SCORE603E_IRQ14
#define SCORE603E_MAIL_BOX_IRQ_3 SCORE603E_IRQ15
/* /*
* function to disable a particular irq at 8259 level. After calling * The Score FPGA maps all interrupts comming from the PMC card to
* this function, even if the device asserts the interrupt line it will * the FPGA interrupt SCORE603E_PCI_IRQ_0 the PMC status word must be
* not be propagated further to the processor * read to indicate which interrupt was chained to the FPGA.
*
* RETURNS: 1/0 if the interrupt was enabled/disabled originally or
* a value < 0 on error.
*/ */
int BSP_irq_disable_at_i8259s (const rtems_irq_number irqLine); #define SCORE603E_IRQ16 ( Score_IRQ_First + 16 )
/* #define SCORE603E_IRQ17 ( Score_IRQ_First + 17 )
* function to enable a particular irq at 8259 level. After calling #define SCORE603E_IRQ18 ( Score_IRQ_First + 18 )
* this function, if the device asserts the interrupt line it will #define SCORE603E_IRQ19 ( Score_IRQ_First + 19 )
* be propagated further to the processor
*/
int BSP_irq_enable_at_i8259s (const rtems_irq_number irqLine);
/*
* function to acknowledge a particular irq at 8259 level. After calling
* this function, if a device asserts an enabled interrupt line it will
* be propagated further to the processor. Mainly usefull for people
* writing raw handlers as this is automagically done for RTEMS managed
* handlers.
*/
int BSP_irq_ack_at_i8259s (const rtems_irq_number irqLine);
/*
* function to check if a particular irq is enabled at 8259 level. After calling
*/
int BSP_irq_enabled_at_i8259s (const rtems_irq_number irqLine);
extern void BSP_rtems_irq_mng_init(unsigned cpuId); /*
extern void BSP_i8259s_init(void); * IRQ'a read from the PMC card
*/
#define SCORE603E_85C30_4_IRQ SCORE603E_IRQ16 /* SCC 422-1 */
#define SCORE603E_85C30_2_IRQ SCORE603E_IRQ17 /* SCC 232-1 */
#define SCORE603E_85C30_5_IRQ SCORE603E_IRQ18 /* SCC 422-2 */
#define SCORE603E_85C30_3_IRQ SCORE603E_IRQ19 /* SCC 232-2 */
/* Stuff in irq_supp.h should eventually go into <rtems/irq.h> */ #define MAX_BOARD_IRQS SCORE603E_IRQ19
/* #include <bsp/irq_supp.h> */
#ifdef __cplusplus #ifdef __cplusplus
}; }
#endif #endif
#endif #endif

289
c/src/lib/libbsp/powerpc/score603e/irq/irq_init.c
View File

@@ -1,4 +1,5 @@
/* /* irq_init.c
*
* This file contains the implementation of rtems initialization * This file contains the implementation of rtems initialization
* related to interrupt handling. * related to interrupt handling.
* *
@@ -21,16 +22,14 @@
#include <libcpu/spr.h> #include <libcpu/spr.h>
#include <bsp/pci.h> #include <bsp/pci.h>
#include <bsp/residual.h> #include <bsp/residual.h>
#include <bsp/openpic.h>
#include <bsp/irq.h> #include <bsp/irq.h>
#include <bsp.h> #include <bsp.h>
#include <libcpu/raw_exception.h> #include <libcpu/raw_exception.h>
#include <bsp/motorola.h>
#include <rtems/bspIo.h> #include <rtems/bspIo.h>
#define SHOW_ISA_PCI_BRIDGE_SETTINGS 1 #define SHOW_ISA_PCI_BRIDGE_SETTINGS 1
#define SCAN_PCI_PRINT 1 #define SCAN_PCI_PRINT 1
#define TRACE_IRQ_INIT 1 #define TRACE_IRQ_INIT 0
typedef struct { typedef struct {
unsigned char bus; /* few chance the PCI/ISA bridge is not on first bus but ... */ unsigned char bus; /* few chance the PCI/ISA bridge is not on first bus but ... */
@@ -39,223 +38,26 @@ typedef struct {
} pci_isa_bridge_device; } pci_isa_bridge_device;
pci_isa_bridge_device* via_82c586 = 0; pci_isa_bridge_device* via_82c586 = 0;
static pci_isa_bridge_device bridge;
extern unsigned int external_exception_vector_prolog_code_size[]; extern unsigned int external_exception_vector_prolog_code_size[];
extern void external_exception_vector_prolog_code(void); extern void external_exception_vector_prolog_code(void);
extern unsigned int decrementer_exception_vector_prolog_code_size[]; extern unsigned int decrementer_exception_vector_prolog_code_size[];
extern void decrementer_exception_vector_prolog_code(void); extern void decrementer_exception_vector_prolog_code(void);
/* static void IRQ_Default_rtems_irq_hdl( rtems_irq_hdl_param ptr ) {}
* default on/off function static void IRQ_Default_rtems_irq_enable (const struct __rtems_irq_connect_data__ *ptr){}
*/ static void IRQ_Default_rtems_irq_disable(const struct __rtems_irq_connect_data__ *ptr){}
static void nop_func(void){} static int IRQ_Default_rtems_irq_is_enabled(const struct __rtems_irq_connect_data__ *ptr){ return 1; }
/*
* default isOn function
*/
static int not_connected(void) {return 0;}
/*
* default possible isOn function
*/
static int connected(void) {return 1;}
static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER];
static rtems_irq_global_settings initial_config; static rtems_irq_global_settings initial_config;
static rtems_irq_connect_data defaultIrq = { static rtems_irq_connect_data defaultIrq = {
/* vectorIdex, hdl , handle , on , off , isOn */ /*name, hdl handle on off isOn */
0, nop_func , NULL , nop_func , nop_func , not_connected 0, IRQ_Default_rtems_irq_hdl, NULL, IRQ_Default_rtems_irq_enable, IRQ_Default_rtems_irq_disable, IRQ_Default_rtems_irq_is_enabled
};
static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={
/*
* actual priorities for interrupt :
* 0 means that only current interrupt is masked
* 255 means all other interrupts are masked
*/
/*
* ISA interrupts.
* The second entry has a priority of 255 because
* it is the slave pic entry and should always remain
* unmasked.
*/
0,0,
255,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*
* PCI Interrupts
*/
8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, /* for raven prio 0 means unactive... */
/*
* Processor exceptions handled as interrupts
*/
0
}; };
#if defined(mvme2100) static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER];
static unsigned char mvme2100_openpic_initpolarities[16] = {
0, /* Not used - should be disabled */
0, /* DEC21143 Controller */
0, /* PMC/PC-MIP Type I Slot 0 */
0, /* PC-MIP Type I Slot 1 */
0, /* PC-MIP Type II Slot 0 */
0, /* PC-MIP Type II Slot 1 */
0, /* Not used - should be disabled */
0, /* PCI Expansion Interrupt A/Universe II (LINT0) */
0, /* PCI Expansion Interrupt B/Universe II (LINT1) */
0, /* PCI Expansion Interrupt C/Universe II (LINT2) */
0, /* PCI Expansion Interrupt D/Universe II (LINT3) */
0, /* Not used - should be disabled */
0, /* Not used - should be disabled */
1, /* 16550 UART */
0, /* Front panel Abort Switch */
0, /* RTC IRQ */
};
static unsigned char mvme2100_openpic_initsenses[] = {
0, /* Not used - should be disabled */
1, /* DEC21143 Controller */
1, /* PMC/PC-MIP Type I Slot 0 */
1, /* PC-MIP Type I Slot 1 */
1, /* PC-MIP Type II Slot 0 */
1, /* PC-MIP Type II Slot 1 */
0, /* Not used - should be disabled */
1, /* PCI Expansion Interrupt A/Universe II (LINT0) */
1, /* PCI Expansion Interrupt B/Universe II (LINT1) */
1, /* PCI Expansion Interrupt C/Universe II (LINT2) */
1, /* PCI Expansion Interrupt D/Universe II (LINT3) */
0, /* Not used - should be disabled */
0, /* Not used - should be disabled */
1, /* 16550 UART */
0, /* Front panel Abort Switch */
1, /* RTC IRQ */
};
#else
static unsigned char mcp750_openpic_initpolarities[16] = {
1, /* 8259 cascade */
0, /* all the rest of them */
};
static unsigned char mcp750_openpic_initsenses[] = {
1, /* MCP750_INT_PCB(8259) */
0, /* MCP750_INT_FALCON_ECC_ERR */
1, /* MCP750_INT_PCI_ETHERNET */
1, /* MCP750_INT_PCI_PMC */
1, /* MCP750_INT_PCI_WATCHDOG_TIMER1 */
1, /* MCP750_INT_PCI_PRST_SIGNAL */
1, /* MCP750_INT_PCI_FALL_SIGNAL */
1, /* MCP750_INT_PCI_DEG_SIGNAL */
1, /* MCP750_INT_PCI_BUS1_INTA */
1, /* MCP750_INT_PCI_BUS1_INTB */
1, /* MCP750_INT_PCI_BUS1_INTC */
1, /* MCP750_INT_PCI_BUS1_INTD */
1, /* MCP750_INT_PCI_BUS2_INTA */
1, /* MCP750_INT_PCI_BUS2_INTB */
1, /* MCP750_INT_PCI_BUS2_INTC */
1, /* MCP750_INT_PCI_BUS2_INTD */
};
#endif
void VIA_isa_bridge_interrupts_setup(void)
{
pci_isa_bridge_device pci_dev;
unsigned int temp;
unsigned char tmp;
unsigned char maxBus;
unsigned found = 0;
maxBus = pci_bus_count();
pci_dev.function = 0; /* Assumes the bidge is the first function */
for (pci_dev.bus = 0; pci_dev.bus < maxBus; pci_dev.bus++) {
#ifdef SCAN_PCI_PRINT
printk("isa_bridge_interrupts_setup: Scanning bus %d\n", pci_dev.bus);
#endif
for (pci_dev.device = 0; pci_dev.device < PCI_MAX_DEVICES; pci_dev.device++) {
#ifdef SCAN_PCI_PRINT
printk("isa_bridge_interrupts_setup: Scanning device %d\n", pci_dev.device);
#endif
pci_read_config_dword(pci_dev.bus, pci_dev.device, pci_dev.function,
PCI_VENDOR_ID, &temp);
#ifdef SCAN_PCI_PRINT
printk("Vendor/device = %x\n", temp);
#endif
if ((temp == (((unsigned short) PCI_VENDOR_ID_VIA) | (PCI_DEVICE_ID_VIA_82C586_0 << 16)))
) {
bridge = pci_dev;
via_82c586 = &bridge;
#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
/*
* Should print : bus = 0, device = 11, function = 0 on a MCP750.
*/
printk("Via PCI/ISA bridge found at bus = %d, device = %d, function = %d\n",
via_82c586->bus,
via_82c586->device,
via_82c586->function);
#endif
found = 1;
goto loop_exit;
}
}
}
loop_exit:
if (!found) BSP_panic("VIA_82C586 PCI/ISA bridge not found!n");
tmp = inb(0x810);
if ( !(tmp & 0x2)) {
#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
printk("This is a second generation MCP750 board\n");
printk("We must reprogram the PCI/ISA bridge...\n");
#endif
pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
0x47, &tmp);
#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
#endif
/*
* Enable 4D0/4D1 ISA interrupt level/edge config registers
*/
tmp |= 0x20;
pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
0x47, tmp);
/*
* Now program the ISA interrupt edge/level
*/
tmp = ELCRS_INT9_LVL | ELCRS_INT10_LVL | ELCRS_INT11_LVL;
outb(tmp, ISA8259_S_ELCR);
tmp = ELCRM_INT5_LVL;
outb(tmp, ISA8259_M_ELCR);;
/*
* Set the Interrupt inputs to non-inverting level interrupt
*/
pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
0x54, &tmp);
#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
#endif
tmp = 0;
pci_write_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
0x54, tmp);
}
else {
#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
printk("This is a first generation MCP750 board\n");
printk("We just show the actual value used by PCI/ISA bridge\n");
#endif
pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
0x47, &tmp);
#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
printk(" PCI ISA bridge control2 = %x\n", (unsigned) tmp);
#endif
/*
* Show the Interrupt inputs inverting/non-inverting level status
*/
pci_read_config_byte(via_82c586->bus, via_82c586->device, via_82c586->function,
0x54, &tmp);
#ifdef SHOW_ISA_PCI_BRIDGE_SETTINGS
printk(" PCI ISA bridge PCI/IRQ Edge/Level Select = %x\n", (unsigned) tmp);
#endif
}
}
/* /*
* This code assumes the exceptions management setup has already * This code assumes the exceptions management setup has already
@@ -265,54 +67,11 @@ loop_exit:
*/ */
void BSP_rtems_irq_mng_init(unsigned cpuId) void BSP_rtems_irq_mng_init(unsigned cpuId)
{ {
#if !defined(mvme2100)
int known_cpi_isa_bridge = 0;
#endif
rtems_raw_except_connect_data vectorDesc;
int i; int i;
/* /*
* First initialize the Interrupt management hardware * First initialize the Interrupt management hardware
*/ */
#if defined(mvme2100)
#ifdef TRACE_IRQ_INIT
printk("Going to initialize EPIC interrupt controller (openpic compliant)\n");
#endif
openpic_init(1, mvme2100_openpic_initpolarities, mvme2100_openpic_initsenses);
#else
#ifdef TRACE_IRQ_INIT
printk("Going to initialize raven interrupt controller (openpic compliant)\n");
#endif
openpic_init(1, mcp750_openpic_initpolarities, mcp750_openpic_initsenses);
#endif
#if !defined(mvme2100)
#ifdef TRACE_IRQ_INIT
printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n");
#endif
if ( currentBoard == MESQUITE ) {
VIA_isa_bridge_interrupts_setup();
known_cpi_isa_bridge = 1;
}
if ( currentBoard == MVME_2300 ) {
/* nothing to do for W83C553 bridge */
known_cpi_isa_bridge = 1;
}
if ( currentBoard == MTX_WO_PP || currentBoard == MTX_W_PP ) {
/* W83C554, don't to anything at the moment. gregm 11/6/2002 */
known_cpi_isa_bridge = 1;
}
if (!known_cpi_isa_bridge) {
printk("Please add code for PCI/ISA bridge init to libbsp/powerpc/shared/irq/irq_init.c\n");
printk("If your card works correctly please add a test and set known_cpi_isa_bridge to true\n");
printk("currentBoard = %i\n", currentBoard);
}
#ifdef TRACE_IRQ_INIT
printk("Going to initialize the ISA PC legacy IRQ management hardware\n");
#endif
BSP_i8259s_init();
#endif
/* /*
* Initialize RTEMS management interrupt table * Initialize RTEMS management interrupt table
@@ -321,9 +80,14 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
* re-init the rtemsIrq table * re-init the rtemsIrq table
*/ */
for (i = 0; i < BSP_IRQ_NUMBER; i++) { for (i = 0; i < BSP_IRQ_NUMBER; i++) {
irqPrioTable[i] = 8;
rtemsIrq[i] = defaultIrq; rtemsIrq[i] = defaultIrq;
rtemsIrq[i].name = i; rtemsIrq[i].name = i;
#ifdef BSP_SHARED_HANDLER_SUPPORT
rtemsIrq[i].next_handler = NULL;
#endif
} }
/* /*
* Init initial Interrupt management config * Init initial Interrupt management config
*/ */
@@ -340,27 +104,6 @@ void BSP_rtems_irq_mng_init(unsigned cpuId)
BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n");
} }
/*
* We must connect the raw irq handler for the two
* expected interrupt sources : decrementer and external interrupts.
*/
vectorDesc.exceptIndex = ASM_DEC_VECTOR;
vectorDesc.hdl.vector = ASM_DEC_VECTOR;
vectorDesc.hdl.raw_hdl = decrementer_exception_vector_prolog_code;
vectorDesc.hdl.raw_hdl_size = (unsigned) decrementer_exception_vector_prolog_code_size;
vectorDesc.on = nop_func;
vectorDesc.off = nop_func;
vectorDesc.isOn = connected;
if (!ppc_set_exception (&vectorDesc)) {
BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
}
vectorDesc.exceptIndex = ASM_EXT_VECTOR;
vectorDesc.hdl.vector = ASM_EXT_VECTOR;
vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code;
vectorDesc.hdl.raw_hdl_size = (unsigned) external_exception_vector_prolog_code_size;
if (!ppc_set_exception (&vectorDesc)) {
BSP_panic("Unable to initialize RTEMS external raw exception\n");
}
#ifdef TRACE_IRQ_INIT #ifdef TRACE_IRQ_INIT
printk("RTEMS IRQ management is now operational\n"); printk("RTEMS IRQ management is now operational\n");
#endif #endif

84
c/src/lib/libbsp/powerpc/score603e/irq/no_pic.c Normal file
View File

@@ -0,0 +1,84 @@
/*
*
* This file contains the implementation of the function described in irq.h
*
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR).
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
* $Id$
*/
#include <rtems.h>
#include <bsp.h>
#include <bsp/irq.h>
#include <bsp/irq_supp.h>
#include <libcpu/raw_exception.h>
static rtems_irq_connect_data *rtems_hdl_tbl;
static rtems_irq_connect_data dflt_entry;
/*
* High level IRQ handler called from shared_raw_irq_code_entry
*/
int C_dispatch_irq_handler(
struct _BSP_Exception_frame *frame,
unsigned int excNum
)
{
register unsigned int irq;
#if (HAS_PMC_PSC8)
uint16_t check_irq;
uint16_t status_word;
#endif
if (excNum == ASM_DEC_VECTOR) {
bsp_irq_dispatch_list(rtems_hdl_tbl, BSP_DECREMENTER, dflt_entry.hdl);
return 0;
}
irq = read_and_clear_irq();
#if (HAS_PMC_PSC8)
if (irq == SCORE603E_PCI_IRQ_0) {
status_word = read_and_clear_PMC_irq( irq );
for (check_irq=SCORE603E_IRQ16; check_irq<=SCORE603E_IRQ19; check_irq++) {
if ( Is_PMC_IRQ( check_irq, status_word )) {
bsp_irq_dispatch_list_base(rtems_hdl_tbl, check_irq, dflt_entry.hdl);
}
}
} else
#endif
{
bsp_irq_dispatch_list_base(rtems_hdl_tbl, irq, dflt_entry.hdl);
}
return 0;
}
void
BSP_enable_irq_at_pic(const rtems_irq_number irq)
{
uint16_t vec_idx = irq - Score_IRQ_First;
unmask_irq( vec_idx );
}
int
BSP_disable_irq_at_pic(const rtems_irq_number irq)
{
uint16_t vec_idx = irq - Score_IRQ_First;
unmask_irq( vec_idx );
return 0;
}
int
BSP_setup_the_pic(rtems_irq_global_settings *config)
{
dflt_entry = config->defaultEntry;
rtems_hdl_tbl = config->irqHdlTbl;
init_irq_data_register();
return 1;
}

70
c/src/lib/libbsp/powerpc/score603e/preinstall.am
View File

@@ -28,11 +28,6 @@ $(PROJECT_INCLUDE)/$(dirstamp):
@: > $(PROJECT_INCLUDE)/$(dirstamp) @: > $(PROJECT_INCLUDE)/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) $(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
@@ -53,6 +48,11 @@ $(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INC
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
$(PROJECT_INCLUDE)/bsp/$(dirstamp):
@$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
@: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(PROJECT_INCLUDE)/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/$(dirstamp) $(PROJECT_INCLUDE)/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tod.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tod.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/tod.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/tod.h
@@ -69,14 +69,6 @@ $(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
$(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_INCLUDE)/bsp/pci.h: ../../powerpc/shared/pci/pci.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/pci.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/pci.h
@@ -97,14 +89,6 @@ $(PROJECT_INCLUDE)/bsp/consoleIo.h: ../../powerpc/shared/console/consoleIo.h $(P
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/consoleIo.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h
$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
$(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
@@ -113,43 +97,19 @@ $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h: ../../../libcpu/@RTEMS_CPU@/@exception
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/ppc_exc_bspsupp.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
$(PROJECT_INCLUDE)/bsp/vectors.h: ../../powerpc/shared/vectors/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT)
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT)
$(PROJECT_INCLUDE)/bsp/vmeUniverse.h: ../../shared/vmeUniverse/vmeUniverse.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) $(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverse.h $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverse.h TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
$(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vme_am_defs.h
$(PROJECT_INCLUDE)/bsp/VME.h: ../../shared/vmeUniverse/VME.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VME.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VME.h
$(PROJECT_INCLUDE)/bsp/VMEConfig.h: vme/VMEConfig.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEConfig.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEConfig.h
$(PROJECT_INCLUDE)/bsp/motorola.h: ../../powerpc/shared/motorola/motorola.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/motorola.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/motorola.h
$(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h: ../../shared/vmeUniverse/vmeUniverseDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverseDMA.h
$(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h: ../../shared/vmeUniverse/bspVmeDmaList.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bspVmeDmaList.h
$(PROJECT_INCLUDE)/bsp/VMEDMA.h: ../../shared/vmeUniverse/VMEDMA.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/VMEDMA.h
PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/VMEDMA.h

5
c/src/lib/libbsp/powerpc/score603e/start/start.S
View File

@@ -17,11 +17,6 @@
* $Id$ * $Id$
*/ */
#warning Call to boot_card has changed and needs checking.
#warning The call is "void boot_card(const char* cmdline);"
#warning You need to pass a NULL.
#warning Please check and remove these warnings.
#include "ppc-asm.h" #include "ppc-asm.h"
.file "start.s" .file "start.s"

11
c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
View File

@@ -1,5 +1,6 @@
/* /* Hwr_init.c
* COPYRIGHT (c) 1989-2008. *
* COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be
@@ -88,8 +89,6 @@ void init_PCI(void)
{ {
/* DINK Monitor setsup and uses all 4 BAT registers. */ /* DINK Monitor setsup and uses all 4 BAT registers. */
/* The fourth BAT register can be modified to access this area */ /* The fourth BAT register can be modified to access this area */
printk("init_PCI:\n");
} }
#define PPC_Get_HID0( _value ) \ #define PPC_Get_HID0( _value ) \
@@ -114,7 +113,7 @@ void init_PCI(void)
); \ ); \
} while (0) } while (0)
void instruction_cache_enable () void instruction_cache_enable (void)
{ {
uint32_t value; uint32_t value;
@@ -129,7 +128,7 @@ void instruction_cache_enable ()
PPC_Set_HID0( value ); PPC_Set_HID0( value );
} }
void data_cache_enable () void data_cache_enable (void)
{ {
uint32_t value; uint32_t value;

134
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
View File

@@ -1,14 +1,15 @@
/* /* bspstart.c
*
* This set of routines starts the application. It includes application, * This set of routines starts the application. It includes application,
* board, and monitor specific initialization and configuration. * board, and monitor specific initialization and configuration.
* The generic CPU dependent initialization has been performed * The generic CPU dependent initialization has been performed
* before any of these are invoked. * before any of these are invoked.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$
@@ -17,44 +18,46 @@
#include <string.h> #include <string.h>
#include <bsp.h> #include <bsp.h>
#include <rtems/bspIo.h>
#include <rtems/libio.h> #include <rtems/libio.h>
#include <rtems/libcsupport.h>
#include <rtems/bspIo.h>
#include <libcpu/cpuIdent.h> #include <libcpu/cpuIdent.h>
#define DEBUG 1
#define DEBUG 0
/* /*
* Where the heap starts; is used by bsp_pretasking_hook; * Where the heap starts; is used by bsp_pretasking_hook;
*/ */
unsigned int BSP_heap_start; unsigned int BSP_heap_start;
/*
* Total RAM available and associated linker symbol
*/
unsigned int BSP_mem_size;
extern char RamSize[];
/* /*
* PCI Bus Frequency * PCI Bus Frequency
*/ */
unsigned int BSP_bus_frequency; /* XXX - Set this based upon the Score board */ unsigned int BSP_bus_frequency;
/* /*
* processor clock frequency * processor clock frequency
*/ */
unsigned int BSP_processor_frequency; /* XXX - Set this based upon the Score board */ unsigned int BSP_processor_frequency;
/* /*
* Time base divisior (how many tick for 1 second). * Time base divisior (how many tick for 1 second).
*/ */
unsigned int BSP_time_base_divisor = 4000; unsigned int BSP_time_base_divisor = 4000;
extern unsigned long __rtems_end[];
/* /*
* Driver configuration parameters * Driver configuration parameters
*/ */
uint32_t bsp_clicks_per_usec; uint32_t bsp_clicks_per_usec;
/*
* Memory on this board.
*/
extern char RamSize[];
uint32_t BSP_mem_size;
extern unsigned long __rtems_end[];
void BSP_panic(char *s) void BSP_panic(char *s)
{ {
printk("%s PANIC %s\n",_RTEMS_version, s); printk("%s PANIC %s\n",_RTEMS_version, s);
@@ -68,16 +71,30 @@ void _BSP_Fatal_error(unsigned int v)
} }
/* /*
* Use the shared implementations of the following routines
*/
void bsp_libc_init( void *, uint32_t, int );
/*PAGE
*
* bsp_predriver_hook * bsp_predriver_hook
* *
* Before drivers are setup initialize interupt vectors. * Before drivers are setup initialize interupt vectors.
*/ */
void init_RTC(); void init_RTC(void);
void initialize_PMC(); void initialize_PMC(void);
void bsp_predriver_hook(void) void bsp_predriver_hook(void)
{ {
init_PCI();
initialize_universe();
#if DEBUG
printk("bsp_predriver_hook: initialize_PCI_bridge\n");
#endif
initialize_PCI_bridge ();
#if (HAS_PMC_PSC8) #if (HAS_PMC_PSC8)
#if DEBUG #if DEBUG
@@ -97,7 +114,7 @@ void bsp_predriver_hook(void)
* initialize_PMC * initialize_PMC
*/ */
void initialize_PMC() { void initialize_PMC(void) {
volatile uint32_t *PMC_addr; volatile uint32_t *PMC_addr;
uint32_t data; uint32_t data;
@@ -129,37 +146,6 @@ void initialize_PMC() {
*PMC_addr = data & 0xfc; *PMC_addr = data & 0xfc;
} }
/*PAGE
*
* bsp_postdriver_hook
*
* Standard post driver hook plus some BSP specific stuff.
*/
void bsp_postdriver_hook(void)
{
extern void Init_EE_mask_init(void);
extern void open_dev_console(void);
#if DEBUG
printk("bsp_postdriver_hook: initialize libio\n");
#endif
if (rtems_libio_supp_helper)
(*rtems_libio_supp_helper)();
ShowBATS();
#if DEBUG
printk("bsp_postdriver_hook: Init_EE_mask_init\n");
#endif
Init_EE_mask_init();
ShowBATS();
#if DEBUG
printk("bsp_postdriver_hook: Finished procedure\n");
#endif
}
void bsp_set_trap_vectors( void );
/*PAGE /*PAGE
* *
* bsp_start * bsp_start
@@ -169,6 +155,7 @@ void bsp_set_trap_vectors( void );
void bsp_start( void ) void bsp_start( void )
{ {
unsigned char *work_space_start;
unsigned int msr_value = 0x0000; unsigned int msr_value = 0x0000;
uint32_t intrStackStart; uint32_t intrStackStart;
uint32_t intrStackSize; uint32_t intrStackSize;
@@ -185,12 +172,6 @@ void bsp_start( void )
printk("bsp_start: Zero out lots of memory\n"); printk("bsp_start: Zero out lots of memory\n");
#endif #endif
memset(
&end,
0,
(unsigned char *)&RAM_END - (unsigned char *) &end
);
BSP_processor_frequency = 266000000; BSP_processor_frequency = 266000000;
BSP_bus_frequency = 66000000; BSP_bus_frequency = 66000000;
@@ -209,9 +190,13 @@ void bsp_start( void )
*/ */
intrStackStart = (uint32_t) __rtems_end; intrStackStart = (uint32_t) __rtems_end;
intrStackSize = rtems_configuration_get_interrupt_stack_size(); intrStackSize = rtems_configuration_get_interrupt_stack_size();
printk("Interrupt Stack Start: 0x%x Size: 0x%x Heap Start: 0x%x\n",
intrStackStart, intrStackSize, BSP_heap_start
);
BSP_mem_size = RamSize;
printk("BSP_mem_size: 0x%x\n", BSP_mem_size );
BSP_heap_start = intrStackStart + intrStackSize;
BSP_mem_size = (uintptr_t) RamSize;
/* /*
* Initialize default raw exception handlers. * Initialize default raw exception handlers.
@@ -221,24 +206,10 @@ void bsp_start( void )
intrStackStart, intrStackStart,
intrStackSize intrStackSize
); );
#if DEBUG
printk("bsp_predriver_hook: init_RTC\n");
#endif
/* init_RTC(); */
init_PCI();
initialize_universe();
#if DEBUG
printk("bsp_predriver_hook: initialize_PCI_bridge\n");
#endif
initialize_PCI_bridge ();
msr_value = 0x2030; msr_value = 0x2030;
_CPU_MSR_SET( msr_value ); _CPU_MSR_SET( msr_value );
asm volatile("sync; isync");
_CPU_MSR_SET( msr_value );
/* /*
* initialize the device driver parameters * initialize the device driver parameters
@@ -246,9 +217,9 @@ void bsp_start( void )
#if DEBUG #if DEBUG
printk("bsp_start: set clicks poer usec\n"); printk("bsp_start: set clicks poer usec\n");
#endif #endif
bsp_clicks_per_usec = 66 / 4; /* XXX get from linkcmds */ bsp_clicks_per_usec = 66 / 4;
#if ( PPC_USE_DATA_CACHE ) #if ( PPC_USE_DATA_CACHE )
#if DEBUG #if DEBUG
printk("bsp_start: cache_enable\n"); printk("bsp_start: cache_enable\n");
#endif #endif
@@ -257,12 +228,15 @@ void bsp_start( void )
#if DEBUG #if DEBUG
printk("bsp_start: END PPC_USE_DATA_CACHE\n"); printk("bsp_start: END PPC_USE_DATA_CACHE\n");
#endif #endif
#endif #endif
/* Initalize interrupt support */ /*
if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) { * Initalize RTEMS IRQ system
BSP_panic( "Cannot intitialize interrupt support\n"); */
} #if DEBUG
printk("bspstart: Call BSP_rtems_irq_mng_init\n");
#endif
BSP_rtems_irq_mng_init(0);
#if DEBUG #if DEBUG
printk("bsp_start: end BSPSTART\n"); printk("bsp_start: end BSPSTART\n");

13
c/src/lib/libbsp/powerpc/score603e/startup/linkcmds
View File

@@ -177,7 +177,6 @@ SECTIONS
PROVIDE (_edata = .); PROVIDE (_edata = .);
PROVIDE (RAM_END = ADDR(.text) + 10M); PROVIDE (RAM_END = ADDR(.text) + 10M);
. = ALIGN(8) + 0x1000; . = ALIGN(8) + 0x1000;
PROVIDE (__SBSS_START__ = .);
.sbss : .sbss :
{ {
PROVIDE (__sbss_start = .); PROVIDE (__sbss_start = .);
@@ -186,19 +185,19 @@ SECTIONS
*(.gnu.linkonce.sb.*) *(.gnu.linkonce.sb.*)
PROVIDE (__sbss_end = .); PROVIDE (__sbss_end = .);
} >RAM } >RAM
PROVIDE (__SBSS_END__ = .);
.bss : .bss :
{ {
PROVIDE (__bss_start = .); PROVIDE (__bss_start = .);
*(.dynbss) *(.dynbss)
*(.bss .bss* .gnu.linkonce.b*) *(.bss .bss* .gnu.linkonce.b*)
*(COMMON) *(COMMON)
. = ALIGN(8) + 0x8000;
PROVIDE (__stack = .);
_end = . ;
__rtems_end = . ;
PROVIDE (end = .);
} >RAM } >RAM
. = ALIGN(16) + 0x8000;
PROVIDE (__stack = .);
__rtems_end = . ;
. = ALIGN(8) + 0x8000;
PROVIDE(_end = .);
PROVIDE(end = .);
/* These are needed for ELF backends which have not yet been /* These are needed for ELF backends which have not yet been
converted to the new style linker. */ converted to the new style linker. */

9
c/src/lib/libbsp/powerpc/score603e/timer/timer.c
View File

@@ -1,4 +1,5 @@
/* /* timer.c
*
* This file implements a benchmark timer using the General Purpose Timer. * This file implements a benchmark timer using the General Purpose Timer.
* *
* Notes: * Notes:
@@ -6,11 +7,11 @@
* BSP_TIMER_AVG_OVERHEAD and BSP_TIMER_LEAST_VALID are required to be * BSP_TIMER_AVG_OVERHEAD and BSP_TIMER_LEAST_VALID are required to be
* provided in bsp.h * provided in bsp.h
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may in * The license and distribution terms for this file may be
* the file LICENSE in this distribution or at * found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE. * http://www.rtems.com/license/LICENSE.
* *
* $Id$ * $Id$

2
c/src/lib/libbsp/powerpc/score603e/tod/tod.c
View File

@@ -3,7 +3,7 @@
* *
* This part is found on the second generation of this board. * This part is found on the second generation of this board.
* *
* COPYRIGHT (c) 1989-2008. * COPYRIGHT (c) 1989-2009.
* On-Line Applications Research Corporation (OAR). * On-Line Applications Research Corporation (OAR).
* *
* The license and distribution terms for this file may be * The license and distribution terms for this file may be

1
c/src/lib/libbsp/powerpc/score603e/vme/VMEConfig.h
View File

@@ -1,6 +1,5 @@
#ifndef RTEMS_BSP_VME_CONFIG_H #ifndef RTEMS_BSP_VME_CONFIG_H
#define RTEMS_BSP_VME_CONFIG_H #define RTEMS_BSP_VME_CONFIG_H
/* $Id$ */ /* $Id$ */
/* BSP specific address space configuration parameters */ /* BSP specific address space configuration parameters */