diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog
index f78e26e011..5518dadc8e 100644
--- a/cpukit/score/cpu/mips/ChangeLog
+++ b/cpukit/score/cpu/mips/ChangeLog
@@ -1,3 +1,8 @@
+2004-04-09	Joel Sherrill <joel@OARcorp.com>
+
+	PR 605/bsps
+	* cpu.c: Do not use C++ style comments.
+
 2004-04-03	Art Ferrer <arturo.b.ferrer@nasa.gov>
 
 	PR 598/bsps
diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c
index 4b525d5544..56882f40f9 100644
--- a/cpukit/score/cpu/mips/cpu.c
+++ b/cpukit/score/cpu/mips/cpu.c
@@ -99,7 +99,7 @@ unsigned32 _CPU_ISR_Get_level( void )
 
   mips_get_sr(sr);
 
-  //printf("current sr=%08X, ",sr);
+  /* printf("current sr=%08X, ",sr); */
 
 #if __mips == 3
 /* EXL bit and shift down hardware ints into bits 1 thru 6 */
@@ -112,7 +112,7 @@ unsigned32 _CPU_ISR_Get_level( void )
 #else
 #error "CPU ISR level: unknown MIPS level for SR handling"
 #endif
-  //printf("intlevel=%02X\n",sr);
+  /* printf("intlevel=%02X\n",sr); */
   return sr;
 }