Imagelibrary/rtems
1
0
Fork 1
mirror of https://gitlab.rtems.org/rtems/rtos/rtems.git synced 2025-12-05 15:15:44 +00:00
Code Issues Packages Projects Releases Wiki Activity

bsps/arm: Set VBAR in start.S

Browse Source 
Set the VBAR to the vector table in the start section before
bsp_start_hook_0() is called to earlier handle exceptions in RTEMS.

Set the VBAR to the normal vector table in start.S for the main
processor.  Secondary processors set it in bsp_start_hook_0().

Update #4202.
This commit is contained in:
Sebastian Huber
2020-12-18 10:11:51 +01:00
parent 854ea2b4d8
commit 272534eb72
11 changed files with 34 additions and 94 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
bsps/arm/beagle/start/bspstarthooks.c
View File

@@ -15,9 +15,6 @@
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/arm-cp15-start.h>
#include <bsp/arm-a8core-start.h>
#include <bsp/uart-output-char.h>
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
@@ -25,7 +22,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
arm_a8core_start_hook_1();
bsp_start_copy_sections();
beagle_setup_mmu_and_cache();
bsp_start_clear_bss();

1
bsps/arm/headers.am
View File

@@ -10,7 +10,6 @@ include_HEADERS += ../../../../../bsps/arm/include/uart.h
include_bspdir = $(includedir)/bsp
include_bsp_HEADERS =
include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a8core-start.h
include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-clock.h
include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-irq.h
include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-regs.h

1
bsps/arm/imx/start/bspstarthooks.c
View File

@@ -102,7 +102,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
arm_a9mpcore_start_set_vector_base();
bsp_start_copy_sections();
setup_mmu_and_cache();
bsp_start_clear_bss();

55
bsps/arm/include/bsp/arm-a8core-start.h
View File

@@ -1,55 +0,0 @@
/**
* @file
*
* @ingroup RTEMSBSPsARMShared
*
* @brief A8CORE_START Support
*/
/*
* Copyright (c) 2014 Chris Johns <chrisj@rtems.org>. All rights reserved.
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.org/license/LICENSE.
*/
#ifndef LIBBSP_ARM_SHARED_ARM_A8CORE_START_H
#define LIBBSP_ARM_SHARED_ARM_A8CORE_START_H
#include <libcpu/arm-cp15.h>
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/arm-errata.h>
#ifdef __cplusplus
extern "C" {
#endif /* __cplusplus */
BSP_START_TEXT_SECTION static inline void arm_a8core_start_set_vector_base(void)
{
/*
* Do not use bsp_vector_table_begin == 0, since this will get optimized away.
*/
if (bsp_vector_table_end != bsp_vector_table_size) {
uint32_t ctrl;
arm_cp15_set_vector_base_address(bsp_vector_table_begin);
ctrl = arm_cp15_get_control();
ctrl &= ~ARM_CP15_CTRL_V;
arm_cp15_set_control(ctrl);
}
}
BSP_START_TEXT_SECTION static inline void arm_a8core_start_hook_1(void)
{
arm_a8core_start_set_vector_base();
}
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* LIBBSP_ARM_SHARED_ARM_A8CORE_START_H */

28
bsps/arm/include/bsp/arm-a9mpcore-start.h
View File

@@ -30,6 +30,7 @@
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/arm-a9mpcore-regs.h>
#include <bsp/arm-cp15-start.h>
#include <bsp/arm-errata.h>
#include <dev/irq/arm-gic-irq.h>
@@ -37,27 +38,6 @@
extern "C" {
#endif /* __cplusplus */
BSP_START_TEXT_SECTION static inline void
arm_a9mpcore_start_set_vector_base(void)
{
/*
* Do not use bsp_vector_table_begin == 0, since this will get optimized away.
*/
if (bsp_vector_table_end != bsp_vector_table_size) {
uint32_t ctrl;
/*
* For now we assume that every Cortex-A9 MPCore has the Security Extensions.
* Later it might be necessary to evaluate the ID_PFR1 register.
*/
arm_cp15_set_vector_base_address(bsp_vector_table_begin);
ctrl = arm_cp15_get_control();
ctrl &= ~ARM_CP15_CTRL_V;
arm_cp15_set_control(ctrl);
}
}
BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_scu_invalidate(
volatile a9mpcore_scu *scu,
uint32_t cpu_id,
@@ -88,10 +68,11 @@ arm_a9mpcore_start_on_secondary_processor(void)
{
uint32_t ctrl;
arm_a9mpcore_start_set_vector_base();
arm_gic_irq_initialize_secondary_cpu();
/* Change the VBAR from the start to the normal vector table */
arm_cp15_set_vector_base_address(bsp_vector_table_begin);
ctrl = arm_cp15_start_setup_mmu_and_cache(
0,
ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
@@ -194,7 +175,6 @@ BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_global_timer(void)
BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_hook_1(void)
{
arm_a9mpcore_start_global_timer();
arm_a9mpcore_start_set_vector_base();
}
#ifdef __cplusplus

3
bsps/arm/raspberrypi/start/bspsmp_init.c
View File

@@ -55,6 +55,9 @@ void rpi_start_rtems_on_secondary_processor(void)
{
uint32_t ctrl;
/* Change the VBAR from the start to the normal vector table */
arm_cp15_set_vector_base_address(bsp_vector_table_begin);
ctrl = arm_cp15_start_setup_mmu_and_cache(
0,
ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z

3
bsps/arm/raspberrypi/start/bspstarthooks.c
View File

@@ -117,9 +117,6 @@ void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
/* Clear Translation Table Base Control Register */
arm_cp15_set_translation_table_base_control_register(0);
/* Clear Secure or Non-secure Vector Base Address Register */
arm_cp15_set_vector_base_address(bsp_vector_table_begin);
#ifdef RTEMS_SMP
if (cpu_index_self == 0) {
rpi_ipi_initialize();

28
bsps/arm/shared/start/start.S
View File

@@ -377,6 +377,20 @@ _start:
#endif /* ARM_MULTILIB_VFP */
#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
/*
* Set VBAR to the vector table in the start section and make sure
* SCTLR[V] is cleared. Afterwards, exceptions are handled by RTEMS.
*/
ldr r0, =bsp_start_vector_table_begin
dsb
mcr p15, 0, r0, c12, c0, 0
mrc p15, 0, r0, c1, c0, 0
bic r1, r0, #0x2000
mcr p15, 0, r1, c1, c0, 0
isb
#endif
/*
* Invoke the start hook 0.
*
@@ -414,7 +428,7 @@ bsp_start_hook_0_done:
stmdb sp!, {r4, r5, r6}
ldr r0, =bsp_vector_table_begin
adr r1, bsp_start_vector_table_begin
ldr r1, =bsp_start_vector_table_begin
cmp r0, r1
beq .Lvector_table_copy_done
ldmia r1!, {r2-r9}
@@ -424,6 +438,18 @@ bsp_start_hook_0_done:
.Lvector_table_copy_done:
#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
/*
* This code path is only executed by the primary processor. Set the
* VBAR to the normal vector table. For secondary processors, this is
* done by bsp_start_hook_0().
*/
ldr r0, =bsp_vector_table_begin
dsb
mcr p15, 0, r0, c12, c0, 0
isb
#endif
ldmia sp!, {r0, r1, r2}
SWITCH_FROM_ARM_TO_THUMB r3

2
bsps/arm/xen/start/bspstarthooks.c
View File

@@ -28,7 +28,6 @@
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/arm-a9mpcore-start.h>
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
@@ -37,7 +36,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
arm_a9mpcore_start_set_vector_base();
bsp_start_copy_sections();
bsp_xen_setup_mmu_and_cache();
bsp_start_clear_bss();

2
bsps/arm/xilinx-zynqmp/start/bspstarthooks.c
View File

@@ -35,7 +35,6 @@
#include <bsp.h>
#include <bsp/start.h>
#include <bsp/arm-cp15-start.h>
#include <bsp/arm-a9mpcore-start.h>
BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
{
@@ -80,7 +79,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
{
arm_a9mpcore_start_set_vector_base();
bsp_start_copy_sections();
zynqmp_setup_mmu_and_cache();
bsp_start_clear_bss();

1
spec/build/bsps/arm/grp.yml
View File

@@ -15,7 +15,6 @@ install:
- bsps/arm/include/uart.h
- destination: ${BSP_INCLUDEDIR}/bsp
source:
- bsps/arm/include/bsp/arm-a8core-start.h
- bsps/arm/include/bsp/arm-a9mpcore-clock.h
- bsps/arm/include/bsp/arm-a9mpcore-irq.h
- bsps/arm/include/bsp/arm-a9mpcore-regs.h