mirror of
https://gitlab.rtems.org/rtems/rtos/rtems.git
synced 2025-12-05 15:15:44 +00:00
bsps/arm: Set VBAR in start.S
Set the VBAR to the vector table in the start section before bsp_start_hook_0() is called to earlier handle exceptions in RTEMS. Set the VBAR to the normal vector table in start.S for the main processor. Secondary processors set it in bsp_start_hook_0(). Update #4202.
This commit is contained in:
@@ -15,9 +15,6 @@
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#include <bsp.h>
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#include <bsp.h>
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#include <bsp/start.h>
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#include <bsp/start.h>
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#include <bsp/arm-cp15-start.h>
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#include <bsp/arm-cp15-start.h>
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#include <bsp/arm-a8core-start.h>
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#include <bsp/uart-output-char.h>
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BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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{
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{
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@@ -25,7 +22,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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{
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{
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arm_a8core_start_hook_1();
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bsp_start_copy_sections();
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bsp_start_copy_sections();
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beagle_setup_mmu_and_cache();
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beagle_setup_mmu_and_cache();
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bsp_start_clear_bss();
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bsp_start_clear_bss();
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@@ -10,7 +10,6 @@ include_HEADERS += ../../../../../bsps/arm/include/uart.h
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include_bspdir = $(includedir)/bsp
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include_bspdir = $(includedir)/bsp
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include_bsp_HEADERS =
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include_bsp_HEADERS =
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include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a8core-start.h
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include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-clock.h
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include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-clock.h
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include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-irq.h
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include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-irq.h
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include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-regs.h
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include_bsp_HEADERS += ../../../../../bsps/arm/include/bsp/arm-a9mpcore-regs.h
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@@ -102,7 +102,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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{
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{
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arm_a9mpcore_start_set_vector_base();
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bsp_start_copy_sections();
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bsp_start_copy_sections();
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setup_mmu_and_cache();
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setup_mmu_and_cache();
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bsp_start_clear_bss();
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bsp_start_clear_bss();
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@@ -1,55 +0,0 @@
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/**
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* @file
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*
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* @ingroup RTEMSBSPsARMShared
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*
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* @brief A8CORE_START Support
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*/
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/*
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* Copyright (c) 2014 Chris Johns <chrisj@rtems.org>. All rights reserved.
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rtems.org/license/LICENSE.
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*/
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#ifndef LIBBSP_ARM_SHARED_ARM_A8CORE_START_H
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#define LIBBSP_ARM_SHARED_ARM_A8CORE_START_H
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#include <libcpu/arm-cp15.h>
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#include <bsp.h>
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#include <bsp/start.h>
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#include <bsp/arm-errata.h>
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#ifdef __cplusplus
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extern "C" {
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#endif /* __cplusplus */
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BSP_START_TEXT_SECTION static inline void arm_a8core_start_set_vector_base(void)
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{
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/*
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* Do not use bsp_vector_table_begin == 0, since this will get optimized away.
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*/
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if (bsp_vector_table_end != bsp_vector_table_size) {
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uint32_t ctrl;
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arm_cp15_set_vector_base_address(bsp_vector_table_begin);
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ctrl = arm_cp15_get_control();
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ctrl &= ~ARM_CP15_CTRL_V;
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arm_cp15_set_control(ctrl);
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}
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}
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BSP_START_TEXT_SECTION static inline void arm_a8core_start_hook_1(void)
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{
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arm_a8core_start_set_vector_base();
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}
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#ifdef __cplusplus
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}
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#endif /* __cplusplus */
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#endif /* LIBBSP_ARM_SHARED_ARM_A8CORE_START_H */
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@@ -30,6 +30,7 @@
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#include <bsp.h>
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#include <bsp.h>
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#include <bsp/start.h>
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#include <bsp/start.h>
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#include <bsp/arm-a9mpcore-regs.h>
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#include <bsp/arm-a9mpcore-regs.h>
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#include <bsp/arm-cp15-start.h>
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#include <bsp/arm-errata.h>
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#include <bsp/arm-errata.h>
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#include <dev/irq/arm-gic-irq.h>
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#include <dev/irq/arm-gic-irq.h>
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@@ -37,27 +38,6 @@
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extern "C" {
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extern "C" {
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#endif /* __cplusplus */
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#endif /* __cplusplus */
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BSP_START_TEXT_SECTION static inline void
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arm_a9mpcore_start_set_vector_base(void)
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{
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/*
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* Do not use bsp_vector_table_begin == 0, since this will get optimized away.
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*/
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if (bsp_vector_table_end != bsp_vector_table_size) {
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uint32_t ctrl;
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/*
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* For now we assume that every Cortex-A9 MPCore has the Security Extensions.
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* Later it might be necessary to evaluate the ID_PFR1 register.
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*/
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arm_cp15_set_vector_base_address(bsp_vector_table_begin);
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ctrl = arm_cp15_get_control();
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ctrl &= ~ARM_CP15_CTRL_V;
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arm_cp15_set_control(ctrl);
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}
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}
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BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_scu_invalidate(
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BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_scu_invalidate(
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volatile a9mpcore_scu *scu,
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volatile a9mpcore_scu *scu,
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uint32_t cpu_id,
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uint32_t cpu_id,
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@@ -88,10 +68,11 @@ arm_a9mpcore_start_on_secondary_processor(void)
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{
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{
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uint32_t ctrl;
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uint32_t ctrl;
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arm_a9mpcore_start_set_vector_base();
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arm_gic_irq_initialize_secondary_cpu();
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arm_gic_irq_initialize_secondary_cpu();
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/* Change the VBAR from the start to the normal vector table */
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arm_cp15_set_vector_base_address(bsp_vector_table_begin);
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ctrl = arm_cp15_start_setup_mmu_and_cache(
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ctrl = arm_cp15_start_setup_mmu_and_cache(
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0,
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0,
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ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
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ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
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@@ -194,7 +175,6 @@ BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_global_timer(void)
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BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_hook_1(void)
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BSP_START_TEXT_SECTION static inline void arm_a9mpcore_start_hook_1(void)
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{
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{
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arm_a9mpcore_start_global_timer();
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arm_a9mpcore_start_global_timer();
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arm_a9mpcore_start_set_vector_base();
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}
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}
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#ifdef __cplusplus
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#ifdef __cplusplus
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@@ -55,6 +55,9 @@ void rpi_start_rtems_on_secondary_processor(void)
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{
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{
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uint32_t ctrl;
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uint32_t ctrl;
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/* Change the VBAR from the start to the normal vector table */
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arm_cp15_set_vector_base_address(bsp_vector_table_begin);
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ctrl = arm_cp15_start_setup_mmu_and_cache(
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ctrl = arm_cp15_start_setup_mmu_and_cache(
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0,
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0,
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ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
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ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z
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@@ -117,9 +117,6 @@ void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
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/* Clear Translation Table Base Control Register */
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/* Clear Translation Table Base Control Register */
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arm_cp15_set_translation_table_base_control_register(0);
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arm_cp15_set_translation_table_base_control_register(0);
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/* Clear Secure or Non-secure Vector Base Address Register */
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arm_cp15_set_vector_base_address(bsp_vector_table_begin);
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#ifdef RTEMS_SMP
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#ifdef RTEMS_SMP
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if (cpu_index_self == 0) {
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if (cpu_index_self == 0) {
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rpi_ipi_initialize();
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rpi_ipi_initialize();
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@@ -377,6 +377,20 @@ _start:
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#endif /* ARM_MULTILIB_VFP */
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#endif /* ARM_MULTILIB_VFP */
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#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
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/*
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* Set VBAR to the vector table in the start section and make sure
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* SCTLR[V] is cleared. Afterwards, exceptions are handled by RTEMS.
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*/
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ldr r0, =bsp_start_vector_table_begin
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dsb
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mcr p15, 0, r0, c12, c0, 0
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mrc p15, 0, r0, c1, c0, 0
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bic r1, r0, #0x2000
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mcr p15, 0, r1, c1, c0, 0
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isb
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#endif
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/*
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/*
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* Invoke the start hook 0.
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* Invoke the start hook 0.
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*
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*
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@@ -414,7 +428,7 @@ bsp_start_hook_0_done:
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stmdb sp!, {r4, r5, r6}
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stmdb sp!, {r4, r5, r6}
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ldr r0, =bsp_vector_table_begin
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ldr r0, =bsp_vector_table_begin
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adr r1, bsp_start_vector_table_begin
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ldr r1, =bsp_start_vector_table_begin
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cmp r0, r1
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cmp r0, r1
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beq .Lvector_table_copy_done
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beq .Lvector_table_copy_done
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ldmia r1!, {r2-r9}
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ldmia r1!, {r2-r9}
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@@ -424,6 +438,18 @@ bsp_start_hook_0_done:
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.Lvector_table_copy_done:
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.Lvector_table_copy_done:
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#if (__ARM_ARCH >= 7 && __ARM_ARCH_PROFILE == 'A') || __ARM_ARCH >= 8
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/*
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* This code path is only executed by the primary processor. Set the
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* VBAR to the normal vector table. For secondary processors, this is
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* done by bsp_start_hook_0().
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*/
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ldr r0, =bsp_vector_table_begin
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dsb
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mcr p15, 0, r0, c12, c0, 0
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isb
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#endif
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ldmia sp!, {r0, r1, r2}
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ldmia sp!, {r0, r1, r2}
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SWITCH_FROM_ARM_TO_THUMB r3
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SWITCH_FROM_ARM_TO_THUMB r3
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@@ -28,7 +28,6 @@
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#include <bsp.h>
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#include <bsp.h>
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#include <bsp/start.h>
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#include <bsp/start.h>
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#include <bsp/arm-a9mpcore-start.h>
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BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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{
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{
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@@ -37,7 +36,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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{
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{
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arm_a9mpcore_start_set_vector_base();
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bsp_start_copy_sections();
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bsp_start_copy_sections();
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bsp_xen_setup_mmu_and_cache();
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bsp_xen_setup_mmu_and_cache();
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bsp_start_clear_bss();
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bsp_start_clear_bss();
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@@ -35,7 +35,6 @@
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#include <bsp.h>
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#include <bsp.h>
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#include <bsp/start.h>
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#include <bsp/start.h>
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#include <bsp/arm-cp15-start.h>
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#include <bsp/arm-cp15-start.h>
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#include <bsp/arm-a9mpcore-start.h>
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BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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{
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{
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@@ -80,7 +79,6 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
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{
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{
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arm_a9mpcore_start_set_vector_base();
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bsp_start_copy_sections();
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bsp_start_copy_sections();
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zynqmp_setup_mmu_and_cache();
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zynqmp_setup_mmu_and_cache();
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bsp_start_clear_bss();
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bsp_start_clear_bss();
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@@ -15,7 +15,6 @@ install:
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- bsps/arm/include/uart.h
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- bsps/arm/include/uart.h
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- destination: ${BSP_INCLUDEDIR}/bsp
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- destination: ${BSP_INCLUDEDIR}/bsp
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source:
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source:
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- bsps/arm/include/bsp/arm-a8core-start.h
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- bsps/arm/include/bsp/arm-a9mpcore-clock.h
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- bsps/arm/include/bsp/arm-a9mpcore-clock.h
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- bsps/arm/include/bsp/arm-a9mpcore-irq.h
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- bsps/arm/include/bsp/arm-a9mpcore-irq.h
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- bsps/arm/include/bsp/arm-a9mpcore-regs.h
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- bsps/arm/include/bsp/arm-a9mpcore-regs.h
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Block a user