From 1b5549ae690e4e4c7f597a7bc8a5fac126b72175 Mon Sep 17 00:00:00 2001 From: Kinsey Moore Date: Wed, 30 Oct 2024 09:25:23 -0500 Subject: [PATCH] bsps/arm/zynq: Make secondary core wait on QEMU When using QEMU configurations that support SMP for Zynq7000 systems, the second core is started at the same time as the first core instead of waiting for an event to trigger a check for the value at 0xfffffff0 before jumping into RTEMS code. This makes the erroneously started core wait as expected and prevents prefetch and data aborts from occurring before the MMU has been properly configured. This was recently exposed by cleanup done to the ARM GICv2 driver that removed some delays which were allowing this to operate normally. --- bsps/arm/xilinx-zynq/start/bspstarthooks.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/bsps/arm/xilinx-zynq/start/bspstarthooks.c b/bsps/arm/xilinx-zynq/start/bspstarthooks.c index de6a4ccd54..6d353a62bf 100644 --- a/bsps/arm/xilinx-zynq/start/bspstarthooks.c +++ b/bsps/arm/xilinx-zynq/start/bspstarthooks.c @@ -42,6 +42,18 @@ BSP_START_TEXT_SECTION void bsp_start_hook_0(void) { + /* CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR is an indicator for QEMU BSPs */ +#if defined(CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR) && defined(RTEMS_SMP) + uint32_t cpu_id = arm_cortex_a9_get_multiprocessor_cpu_id(); + + /* QEMU starts both cores, so wait until this core is intended to start. */ + if (cpu_id != 0) { + volatile uint32_t *kick_address = (uint32_t *)0xfffffff0; + while (*kick_address == 0) { + _ARM_Wait_for_event(); + } + } +#endif arm_a9mpcore_start_hook_0(); }