From 1119981e7c5dab3ea042479c86576148b933091d Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Thu, 19 Sep 2024 04:34:38 +0200 Subject: [PATCH] tests: Enable ISR in fatal extensions Fix code locations left over by commit 3332e54772fb477e81dbe87921fb3a1cca7e3b14. Update #5067. --- testsuites/sptests/spmutex01/init.c | 1 + testsuites/sptests/spsyslock01/init.c | 1 + testsuites/validation/tc-cache-no-disable-data.c | 1 + testsuites/validation/tr-fatal-smp.c | 1 + 4 files changed, 4 insertions(+) diff --git a/testsuites/sptests/spmutex01/init.c b/testsuites/sptests/spmutex01/init.c index 12590317c5..f5d8491555 100644 --- a/testsuites/sptests/spmutex01/init.c +++ b/testsuites/sptests/spmutex01/init.c @@ -727,6 +727,7 @@ static void fatal_extension( ) { test_context *ctx = &test_instance; + _ISR_Set_level(0); longjmp(ctx->deadlock_return_context, 1); } } diff --git a/testsuites/sptests/spsyslock01/init.c b/testsuites/sptests/spsyslock01/init.c index 74e3d67530..76af036407 100644 --- a/testsuites/sptests/spsyslock01/init.c +++ b/testsuites/sptests/spsyslock01/init.c @@ -765,6 +765,7 @@ static void fatal_extension( ) { test_context *ctx = &test_instance; + _ISR_Set_level(0); longjmp(ctx->deadlock_return_context, 1); } } diff --git a/testsuites/validation/tc-cache-no-disable-data.c b/testsuites/validation/tc-cache-no-disable-data.c index 6ce0df825f..56bda429e0 100644 --- a/testsuites/validation/tc-cache-no-disable-data.c +++ b/testsuites/validation/tc-cache-no-disable-data.c @@ -100,6 +100,7 @@ static void FatalRecordAndJump( fatal_source = source; fatal_code = code; _Atomic_Fetch_add_uint( &fatal_counter, 1, ATOMIC_ORDER_RELAXED ); + _ISR_Set_level( 0 ); longjmp( fatal_before, 1 ); } diff --git a/testsuites/validation/tr-fatal-smp.c b/testsuites/validation/tr-fatal-smp.c index c2369d0ae7..674f0aff23 100644 --- a/testsuites/validation/tr-fatal-smp.c +++ b/testsuites/validation/tr-fatal-smp.c @@ -146,6 +146,7 @@ static void FatalRecordAndJump( fatal_source = source; fatal_code = code; _Atomic_Fetch_add_uint( &fatal_counter, 1, ATOMIC_ORDER_RELAXED ); + _ISR_Set_level( 0 ); longjmp( fatal_before, 1 ); }