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2011-04-10 Kate Feng <feng@bnl.gov>

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PR 1786/bsps
	* Makefile.am: Add support for Altivec.
	* startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
	* make/custom/mvme5500.cfg: Change CPU_CFLAGS to
	"-mcpu=7450 -mtune=7450 -Dmpc7455"
	* irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c:
	Remove warnings.
	* vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
	* network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there
	is any Rx error.
This commit is contained in:
Joel Sherrill
2011-06-17 13:22:25 +00:00
parent fcd8a63b84
commit fca42af6aa
14 changed files with 123 additions and 81 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
c/src/lib/libbsp/powerpc/mvme5500/ChangeLog
View File

@@ -1,3 +1,16 @@
2011-04-10 Kate Feng <feng@bnl.gov>
PR 1786/bsps
* Makefile.am: Add support for Altivec.
* startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
* make/custom/mvme5500.cfg: Change CPU_CFLAGS to
"-mcpu=7450 -mtune=7450 -Dmpc7455"
* irq/BSP_irq.c, pci/detect_host_bridge.c, pci.c, pcifinddevice.c:
Remove warnings.
* vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
* network/if_100MHz/GT64260eth.c: Recycle the Rx mbuf if there
is any Rx error.
2011-05-17 Till Straumann <strauman@slac.stanford.edu>
PR1797/bsps

5
c/src/lib/libbsp/powerpc/mvme5500/Makefile.am
View File

@@ -34,6 +34,7 @@ EXTRA_DIST = startup/bootpstuff.c
libbsp_a_SOURCES += startup/bspstart.c \
../../powerpc/shared/startup/pgtbl_setup.c startup/pgtbl_activate.c \
../../powerpc/shared/startup/pretaskinghook.c \
../../powerpc/shared/startup/zerobss.c \
../../powerpc/shared/startup/bspgetworkarea.c \
../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \
../../shared/bsppredriverhook.c startup/bspclean.c \
@@ -121,7 +122,9 @@ libbsp_a_LIBADD = \
../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel\
../../../libcpu/@RTEMS_CPU@/mpc6xx/altivec.rel
if HAS_NETWORKING
libbsp_a_LIBADD += network.rel
endif

3
c/src/lib/libbsp/powerpc/mvme5500/bsp_specs
View File

@@ -4,8 +4,7 @@
*startfile:
%{!qrtems: %(old_startfile)} \
%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
mvme5500start.o%s -e __rtems_entry_point -u __vectors}}
%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s -e __rtems_entry_point -u __vectors mvme5500start.o%s}}
*link:
%{!qrtems: %(old_link)} %{qrtems: -dp -Bstatic}

4
c/src/lib/libbsp/powerpc/mvme5500/include/bsp.h
View File

@@ -103,11 +103,7 @@ DiscoveryChipVersion BSP_getDiscoveryChipVersion();
/* The glues to Till's vmeUniverse, although the name does not
* actually reflect the relevant architect of the MVME5500.
* Till TODO ? : BSP_PCI_DO_EOI instead ?
* BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?
*
*/
#define BSP_PIC_DO_EOI inl(0xc34) /* PCI IACK */
#define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
/*

3
c/src/lib/libbsp/powerpc/mvme5500/irq/BSP_irq.c
View File

@@ -381,7 +381,8 @@ int BSP_setup_the_pic(rtems_irq_global_settings* config)
* bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
* MOTload default is set as level sensitive(1). Set it agin to make sure.
*/
out_le32(GT_CommUnitArb_Ctrl, (in_le32(GT_CommUnitArb_Ctrl)| (1<<10)));
out_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl,
(in_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl)| (1<<10)));
#if 0
printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",

11
c/src/lib/libbsp/powerpc/mvme5500/make/custom/mvme5500.cfg
View File

@@ -9,12 +9,12 @@ include $(RTEMS_ROOT)/make/custom/default.cfg
RTEMS_CPU=powerpc
RTEMS_CPU_MODEL=mpc7455
# This is the actual bsp directory used during the build process.
RTEMS_BSP_FAMILY=mvme5500
# This contains the compiler options necessary to select the CPU model
# and (hopefully) optimize for it.
# if gcc does not regonize 7450 then change -mcpu=750
#
CPU_CFLAGS = -fno-strict-aliasing -mcpu=7450 -Dmpc7455 -mno-altivec -mabi=altivec -mvrsave=no -mmultiple -mstring -mstrict-align
#T. Straumann; disable sdata=eabi for now until CEXP supports it -meabi -msdata=eabi
CPU_CFLAGS = -mcpu=7450 -mtune=7450 -Dmpc7455
# optimize flag: typically -O2
CFLAGS_OPTIMIZE_V = -O2 -g
@@ -23,3 +23,6 @@ define bsp-post-link
$(default-bsp-post-link)
$(OBJCOPY) -O binary $(basename $@).exe $(basename $@)$(DOWNEXT)
endef
#
START_BASE=mvme5500start

29
c/src/lib/libbsp/powerpc/mvme5500/network/if_100MHz/GT64260eth.c
View File

@@ -745,21 +745,22 @@ static int GT64260eth_rx(struct GTeth_softc *sc)
if (cmdsts & RX_STS_SF) sc->stats.frame_errors++;
if ((cmdsts & RX_STS_LC) || (cmdsts & RX_STS_COL))
ifp->if_collisions++;
goto give_it_back;
/* recycle the buffer */
m->m_len=sc->rx_buf_sz;
}
else {
m = sc->rxq_mbuf[sc->rxq_fi];
m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header);
eh = mtod (m, struct ether_header *);
m->m_data += sizeof(struct ether_header);
ether_input (ifp, eh, m);
ifp->if_ipackets++;
ifp->if_ibytes+=byteCount;
--sc->rxq_active;
MGETHDR (m, M_WAIT, MT_DATA);
MCLGET (m, M_WAIT);
}
m = sc->rxq_mbuf[sc->rxq_fi];
m->m_len = m->m_pkthdr.len = byteCount - sizeof(struct ether_header);
eh = mtod (m, struct ether_header *);
m->m_data += sizeof(struct ether_header);
ether_input (ifp, eh, m);
ifp->if_ipackets++;
ifp->if_ibytes+=byteCount;
--sc->rxq_active;
give_it_back:
MGETHDR (m, M_WAIT, MT_DATA);
MCLGET (m, M_WAIT);
m->m_pkthdr.rcvif = ifp;
sc->rxq_mbuf[sc->rxq_fi]= m;
/* convert mbuf pointer to data pointer of correct type */

2
c/src/lib/libbsp/powerpc/mvme5500/network/if_1GHz/if_wm.c
View File

@@ -1730,7 +1730,7 @@ static void wm_gmii_mediainit(struct wm_softc *sc)
/* We have MII. */
sc->sc_flags |= WM_F_HAS_MII;
#if 1
#if 0
/* <skf> May 2009 : The value that should be programmed into IPGT is 10 */
sc->sc_tipg = TIPG_IPGT(10)+TIPG_IPGR1(8)+TIPG_IPGR2(6);
#else

2
c/src/lib/libbsp/powerpc/mvme5500/pci/detect_host_bridge.c
View File

@@ -27,7 +27,7 @@
unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet)
{
unsigned int pcidata, pcidata1;
uint32_t pcidata, pcidata1;
int PciLocal, busNumber=0;
/* On the mvme5500 board, the GT64260B system controller had the MCP

22
c/src/lib/libbsp/powerpc/mvme5500/pci/pci.c
View File

@@ -108,7 +108,7 @@ unsigned char offset, uint8_t *val)
BSP_pci[n].config_data,pciConfigPack(bus,dev,func,offset));
#endif
out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
*val = in_8(BSP_pci[n].pci_config_data + (offset&3));
return PCIBIOS_SUCCESSFUL;
}
@@ -129,8 +129,8 @@ unsigned char func, unsigned char offset, uint16_t *val)
printk("addr %x, data %x, pack %x \n", config_addr,
config_data,pciConfigPack(bus,dev,func,offset));
#endif
out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
*val = in_le16(BSP_pci[n].pci_config_data + (offset&2));
out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
*val = in_le16((volatile unsigned short *) (BSP_pci[n].pci_config_data + (offset&2)));
return PCIBIOS_SUCCESSFUL;
}
@@ -147,8 +147,8 @@ unsigned char func, unsigned char offset, uint32_t *val)
*val = 0xffffffff;
if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
*val = in_le32(BSP_pci[n].pci_config_data);
out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
*val = in_le32((volatile unsigned int *)BSP_pci[n].pci_config_data);
return PCIBIOS_SUCCESSFUL;
}
@@ -163,8 +163,8 @@ static int indirect_pci_write_config_byte(unsigned char bus, unsigned char dev,u
if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
out_8(BSP_pci[n].pci_config_data + (offset&3), val);
out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
out_8((volatile unsigned char *) (BSP_pci[n].pci_config_data + (offset&3)), val);
return PCIBIOS_SUCCESSFUL;
}
@@ -179,8 +179,8 @@ static int indirect_pci_write_config_word(unsigned char bus, unsigned char dev,u
if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
out_le16(BSP_pci[n].pci_config_data + (offset&3), val);
out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
out_le16((volatile unsigned short *)(BSP_pci[n].pci_config_data + (offset&3)), val);
return PCIBIOS_SUCCESSFUL;
}
@@ -195,8 +195,8 @@ static int indirect_pci_write_config_dword(unsigned char bus,unsigned char dev,u
if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
out_le32(BSP_pci[n].pci_config_data, val);
out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
out_le32((volatile unsigned int *)BSP_pci[n].pci_config_data, val);
return PCIBIOS_SUCCESSFUL;
}

2
c/src/lib/libbsp/powerpc/mvme5500/pci/pcifinddevice.c
View File

@@ -35,7 +35,7 @@ int BSP_pciFindDevicePrint(unsigned short vendorid, unsigned short deviceid,
int pci_find_device( unsigned short vendorid, unsigned short deviceid,
int instance, int *pbus, int *pdev, int *pfun )
{
unsigned int d;
uint32_t d;
unsigned short s;
unsigned char bus,dev,fun,hd;

48
c/src/lib/libbsp/powerpc/mvme5500/start/start.S
View File

@@ -4,20 +4,27 @@
* Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
*
* S. Kate Feng <feng1@bnl.gov>, April 2004
* Mapped the 2nd 256MB of RAM to support the MVME5500 boards.
* Mapped the 2nd 256MB of RAM to support the MVME5500/MVME6100 boards
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rtems.com/license/LICENSE.
*
<<<<<<< start.S
* $Id$
=======
* $Id$
>>>>>>> 1.25
*
*/
#include <rtems/asm.h>
#include <rtems/score/cpu.h>
#include <rtems/powerpc/powerpc.h>
#include <libcpu/io.h>
#include <libcpu/bat.h>
#include <bspopts.h>
#define SYNC \
sync; \
@@ -33,7 +40,6 @@
li r10,0x63 ; \
sc
.text
.globl __rtems_entry_point
.type __rtems_entry_point,@function
@@ -62,6 +68,21 @@ __rtems_entry_point:
mr r29,r5
mr r28,r6
mr r27,r7
#ifdef __ALTIVEC__
/* enable altivec; gcc may use it! */
mfmsr r0
oris r0, r0, (1<<(31-16-6))
mtmsr r0
/*
* set vscr and vrsave to known values
*/
li r0, 0
mtvrsave r0
vxor 0,0,0
mtvscr 0
#endif
/*
* Make sure we have nothing in BATS and TLB
*/
@@ -72,7 +93,8 @@ __rtems_entry_point:
* of RAM to KERNELBASE.
*/
lis r11,KERNELBASE@h
ori r11,r11,0x1ffe /* set up BAT0 registers for 604+ */
/* set up BAT registers for 604 */
ori r11,r11,0x1ffe
li r8,2 /* R/W access */
isync
mtspr DBAT0L,r8 /* N.B. 6xx (not 601) have valid */
@@ -81,8 +103,8 @@ __rtems_entry_point:
mtspr IBAT0U,r11
isync
/*
* Use the 2nd pair of BAT registers to map the 2nd 256MB
* of RAM to 0x10000000. <SKF>
* <skf> Use the 2nd pair of BAT registers to map the 2nd 256MB
* of RAM to 0x10000000.
*/
lis r11,MEM256MB@h
ori r11,r11,0x1ffe /* set up BAT1 registers for 604+ */
@@ -106,7 +128,7 @@ __rtems_entry_point:
enter_C_code:
bl MMUon
bl __eabi /* setup EABI and SYSV environment */
bl __eabi /* setup EABI and SYSV environment */
bl zero_bss
/*
* restore prep boot params
@@ -121,10 +143,17 @@ enter_C_code:
* stack = &__rtems_end + 4096
*/
addis r9,r0, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@ha
addi r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l
mr r1, r9
addi r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l
/*
* We are know in a environment that is totally independent from bootloader setup.
* align initial stack
* (we hope that the bootloader stack was 16-byte aligned
* or we haven't used altivec yet...)
*/
li r0, (CPU_STACK_ALIGNMENT-1)
andc r1, r9, r0
/*
* We are now in a environment that is totally independent from
* bootloader setup.
*/
/* pass result of 'save_boot_params' to 'boot_card' in R3 */
bl boot_card
@@ -161,7 +190,6 @@ MMUoff:
.globl _return_to_ppcbug
.type _return_to_ppcbug,@function
_return_to_ppcbug:
mflr r30
bl MMUoff

28
c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c
View File

@@ -56,8 +56,6 @@
#include <rtems/score/wkspace.h>
extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
extern void _return_to_ppcbug(void);
@@ -70,13 +68,8 @@ extern void BSP_vme_config(void);
extern unsigned char ReadConfVPD_buff(int offset);
extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
uint32_t bsp_clicks_per_usec;
SPR_RW(SPRG1)
typedef struct CmdLineRec_ {
unsigned long size;
char buf[0];
@@ -133,25 +126,6 @@ void _BSP_Fatal_error(unsigned int v)
__asm__ __volatile ("sc");
}
void zero_bss(void)
{
memset(
__SBSS_START__,
0,
((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)
);
memset(
__SBSS2_START__,
0,
((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)
);
memset(
__bss_start,
0,
((unsigned) __rtems_end) - ((unsigned)__bss_start)
);
}
/* NOTE: we cannot simply malloc the commandline string;
* save_boot_params() is called during a very early stage when
* libc/malloc etc. are not yet initialized!
@@ -293,6 +267,7 @@ void bsp_start( void )
printk("-----------------------------------------\n");
BSP_mem_size = probeMemoryEnd();
/* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
* of System Status register
*/
@@ -302,7 +277,6 @@ void bsp_start( void )
/* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
BSP_time_base_divisor = 4000;
/* Maybe not setup yet becuase of the warning message */
/* Allocate and set up the page table mappings
* This is only available on >604 CPUs.

28
c/src/lib/libbsp/powerpc/mvme5500/vme/VMEConfig.h
View File

@@ -1,6 +1,21 @@
#ifndef RTEMS_BSP_VME_CONFIG_H
#define RTEMS_BSP_VME_CONFIG_H
/* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04 */
/* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04
*
* May 2011 : Use the VME shared IRQ handlers.
*
* It seems that the implementation of VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND
* is not fully developed. The UNIV_REGOFF_VCSR_BS is defined for VME64
* specification, which does not apply to a VME32 crate. In order to avoid
* spurious VME interrupts, a better and more universal solution is
* to flush the vmeUniverse FIFO by reading a register back within the
* users' Interrupt Service Routine (ISR) before returning.
*
* Some devices might require the ISR to issue an interrupt status READ
* after its IRQ is cleared, but before its corresponding interrupt
* is enabled again.
*
*/
/* BSP specific address space configuration parameters */
/*
@@ -11,6 +26,10 @@
* layout:
*/
#define _VME_A32_WIN0_ON_PCI 0x90000000
/* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate
* CSR for space.
*/
#define _VME_CSR_ON_PCI 0x9e000000
#define _VME_A24_ON_PCI 0x9f000000
#define _VME_A16_ON_PCI 0x9fff0000
@@ -30,7 +49,12 @@
#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err) \
do { \
err = vmeUniverseInstallIrqMgr(0,64+12,1,64+13); \
err = vmeUniverseInstallIrqMgrAlt(VMEUNIVERSE_IRQ_MGR_FLAG_SHARED,\
0, BSP_GPP_VME_VLINT0, \
1, BSP_GPP_VME_VLINT1, \
2, BSP_GPP_VME_VLINT2, \
3, BSP_GPP_VME_VLINT3, \
-1 /* terminate list */); \
} while (0)
#endif