Files
rt-thread/libcpu
kenneth.liu 2be83d5cad libcpu: riscv: fixed ARCH_RISCV_VECTOR issue
description: Using the vector instruction set to trigger
an illegal instruction exception when ARCH_SISCV_VECTOR=y.

analysis: When initializing the thread stack,
the rt_cw_stack_init function did not enable VS for SSTATUS.

Solution: When ARCH_SISCV_VECTOR=y,
increment the initial value of sstatus by 0x600(SSTATUS_VS).

Signed-off-by: Liu Gui <kenneth.liu@sophgo.com>
2025-02-22 14:17:54 -05:00
..
2025-01-08 17:54:46 -05:00