mirror of
https://github.com/RT-Thread/rt-thread.git
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*** EFM32 branch ***
1. Add ENC28J60 Ethernet controller driver 2. Add lwIP support (Please read "Readme.txt") 3. Add simple Http server demo application 4. Modify USART device write function to avoid sleep in ISR 5. Fix a bug in USART driver when using compiler optimization 6. Modify to make use the start-up code in libraries 7. Change the default build option for squeezing the executable file size 8. Modify source code alignment git-svn-id: https://rt-thread.googlecode.com/svn/trunk@1622 bbd45198-f89e-11dd-88c7-29a3b14d5316
This commit is contained in:
onelife.real
@@ -1,24 +1,24 @@
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/******************************************************************//**
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/***************************************************************************//**
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* @file start_gcc.S
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* @brief Context switch functions
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* COPYRIGHT (C) 2011, RT-Thread Development Team
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* @author onelife
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* @version 0.4 beta
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**********************************************************************
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*******************************************************************************
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* @section License
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* The license and distribution terms for this file may be found in the file LICENSE in this
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* distribution or at http://www.rt-thread.org/license/LICENSE
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**********************************************************************
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* The license and distribution terms for this file may be found in the file
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* LICENSE in this distribution or at http://www.rt-thread.org/license/LICENSE
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*******************************************************************************
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* @section Change Logs
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* Date Author Notes
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* 2010-12-21 onelife Initial creation for EFM32
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*********************************************************************/
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* 2010-12-21 onelife Initial creation for EFM32
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* 2011-07-06 onelife Modify to make use the start code in libraries
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******************************************************************************/
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/******************************************************************//**
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/***************************************************************************//**
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* @addtogroup cortex-m3
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* @{
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*********************************************************************/
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*******************************************************************************/
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.syntax unified
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.cpu cortex-m3
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.fpu softvfp
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@@ -36,93 +36,20 @@ defined in linker script */
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/* end address for the .bss section. defined in linker script */
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.word _ebss
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/******************************************************************************
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*
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* The minimal vector table for a Cortex M3. Note that the proper constructs
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* must be placed on this to ensure that it ends up at physical address
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* 0x0000.0000.
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*
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******************************************************************************/
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.section .isr_vector, "a", %progbits
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.global g_pfnVectors
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.type g_pfnVectors, %object
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g_pfnVectors:
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.word Initial_spTop
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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.word BusFault_Handler
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.word UsageFault_Handler
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.word 0
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.word 0
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.word 0
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.word 0
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.word SVC_Handler
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.word DebugMon_Handler
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.word 0
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.word PendSV_Handler
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.word SysTick_Handler
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/* External Interrupts */
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.word DMA_IRQHandler /* 0: DMA Interrupt (efm32_dma.c) */
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.word GPIO_EVEN_IRQHandler /* 1: GPIO_EVEN Interrupt */
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.word TIMER0_IRQHandler /* 2: TIMER0 Interrupt */
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.word USART0_RX_IRQHandler /* 3: USART0_RX Interrupt */
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.word USART0_TX_IRQHandler /* 4: USART0_TX Interrupt */
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.word ACMP0_IRQHandler /* 5: ACMP0 Interrupt */
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.word ADC0_IRQHandler /* 6: ADC0 Interrupt */
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.word DAC0_IRQHandler /* 7: DAC0 Interrupt */
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.word I2C0_IRQHandler /* 8: I2C0 Interrupt */
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.word GPIO_ODD_IRQHandler /* 9: GPIO_ODD Interrupt */
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.word TIMER1_IRQHandler /* 10: TIMER1 Interrupt */
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.word TIMER2_IRQHandler /* 11: TIMER2 Interrupt */
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.word USART1_RX_IRQHandler /* 12: USART1_RX Interrupt */
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.word USART1_TX_IRQHandler /* 13: USART1_TX Interrupt */
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.word USART2_RX_IRQHandler /* 14: USART2_RX Interrupt */
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.word USART2_TX_IRQHandler /* 15: USART2_TX Interrupt */
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.word UART0_RX_IRQHandler /* 16: UART0_RX Interrupt */
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.word UART0_TX_IRQHandler /* 17: UART0_TX Interrupt */
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.word LEUART0_IRQHandler /* 18: LEUART0 Interrupt */
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.word LEUART1_IRQHandler /* 19: LEUART1 Interrupt */
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.word LETIMER0_IRQHandler /* 20: LETIMER0 Interrupt */
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.word PCNT0_IRQHandler /* 21: PCNT0 Interrupt */
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.word PCNT1_IRQHandler /* 22: PCNT1 Interrupt */
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.word PCNT2_IRQHandler /* 23: PCNT2 Interrupt */
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.word RTC_IRQHandler /* 24: RTC Interrupt */
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.word CMU_IRQHandler /* 25: CMU Interrupt */
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.word VCMP_IRQHandler /* 26: VCMP Interrupt */
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.word LCD_IRQHandler /* 27: LCD Interrupt */
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.word MSC_IRQHandler /* 28: MSC Interrupt */
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.word AES_IRQHandler /* 29: AES Interrupt */
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.size g_pfnVectors, .-g_pfnVectors
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/**
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* @brief Top of stack pointer
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*/
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.section .bss.init
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.equ Stack_Size, 0x00000200
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.space Stack_Size
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Initial_spTop:
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/**
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/***************************************************************************//**
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* @brief This is the code that gets called when the processor first
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* starts execution following a reset event. Only the absolutely
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* necessary set is performed, after which the application
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* supplied main() routine is called.
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* @param None
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* @retval None
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*/
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* @retval None
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*******************************************************************************/
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.thumb
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.thumb_func
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.section .text.Reset_Handler, "ax", %progbits
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.weak Reset_Handler
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.global Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* restore original stack pointer */
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ldr r0, =Initial_spTop
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msr msp, r0
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.section .cs3.init,"ax", %progbits
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.globl _start
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.type _start, %function
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_start:
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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b LoopCopyDataInit
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@@ -154,141 +81,8 @@ LoopFillZerobss:
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/* Call the application's entry point.*/
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bl main
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bx lr
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.size Reset_Handler, .-Reset_Handler
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.size _start, .-_start
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/**
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* @brief This is the code that gets called when the processor receives an
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* unexpected interrupt. This simply enters an infinite loop, preserving
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* the system state for examination by a debugger.
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*
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* @param None
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* @retval None
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*/
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.thumb
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.thumb_func
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.section .text.Default_Handler, "ax", %progbits
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.global Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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Infinite_Loop:
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b Infinite_Loop
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.size Default_Handler, .-Default_Handler
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*
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*******************************************************************************/
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.weak NMI_Handler
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.thumb_set NMI_Handler, Default_Handler
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.weak MemManage_Handler
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.thumb_set MemManage_Handler, Default_Handler
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.weak BusFault_Handler
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.thumb_set BusFault_Handler, Default_Handler
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.weak UsageFault_Handler
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.thumb_set UsageFault_Handler, Default_Handler
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.weak SVC_Handler
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.thumb_set SVC_Handler, Default_Handler
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.weak DebugMon_Handler
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.thumb_set DebugMon_Handler ,Default_Handler
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.weak DMA_IRQHandler
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.thumb_set DMA_IRQHandler, Default_Handler
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.weak GPIO_EVEN_IRQHandler
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.thumb_set GPIO_EVEN_IRQHandler, Default_Handler
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.weak TIMER0_IRQHandler
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.thumb_set TIMER0_IRQHandler, Default_Handler
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.weak USART0_RX_IRQHandler
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.thumb_set USART0_RX_IRQHandler, Default_Handler
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.weak USART0_TX_IRQHandler
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.thumb_set USART0_TX_IRQHandler, Default_Handler
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.weak ACMP0_IRQHandler
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.thumb_set ACMP0_IRQHandler, Default_Handler
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.weak ADC0_IRQHandler
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.thumb_set ADC0_IRQHandler, Default_Handler
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.weak DAC0_IRQHandler
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.thumb_set DAC0_IRQHandler, Default_Handler
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.weak I2C0_IRQHandler
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.thumb_set I2C0_IRQHandler, Default_Handler
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.weak GPIO_ODD_IRQHandler
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.thumb_set GPIO_ODD_IRQHandler, Default_Handler
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.weak TIMER1_IRQHandler
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.thumb_set TIMER1_IRQHandler, Default_Handler
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.weak TIMER2_IRQHandler
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.thumb_set TIMER2_IRQHandler, Default_Handler
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.weak USART1_RX_IRQHandler
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.thumb_set USART1_RX_IRQHandler, Default_Handler
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.weak USART1_TX_IRQHandler
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.thumb_set USART1_TX_IRQHandler, Default_Handler
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.weak USART2_RX_IRQHandler
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.thumb_set USART2_RX_IRQHandler, Default_Handler
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.weak USART2_TX_IRQHandler
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.thumb_set USART2_TX_IRQHandler, Default_Handler
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.weak UART0_RX_IRQHandler
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.thumb_set UART0_RX_IRQHandler, Default_Handler
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.weak UART0_TX_IRQHandler
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.thumb_set UART0_TX_IRQHandler, Default_Handler
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.weak LEUART0_IRQHandler
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.thumb_set LEUART0_IRQHandler, Default_Handler
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.weak LEUART1_IRQHandler
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.thumb_set LEUART1_IRQHandler, Default_Handler
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.weak LETIMER0_IRQHandler
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.thumb_set LETIMER0_IRQHandler, Default_Handler
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.weak PCNT0_IRQHandler
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.thumb_set PCNT0_IRQHandler, Default_Handler
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.weak PCNT1_IRQHandler
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.thumb_set PCNT1_IRQHandler, Default_Handler
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.weak PCNT2_IRQHandler
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.thumb_set PCNT2_IRQHandler, Default_Handler
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.weak RTC_IRQHandler
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.thumb_set RTC_IRQHandler, Default_Handler
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.weak CMU_IRQHandler
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.thumb_set CMU_IRQHandler, Default_Handler
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.weak VCMP_IRQHandler
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.thumb_set VCMP_IRQHandler, Default_Handler
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.weak LCD_IRQHandler
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.thumb_set LCD_IRQHandler, Default_Handler
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.weak MSC_IRQHandler
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.thumb_set MSC_IRQHandler, Default_Handler
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.weak AES_IRQHandler
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.thumb_set AES_IRQHandler, Default_Handler
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/******************************************************************//**
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/***************************************************************************//**
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* @}
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*********************************************************************/
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*******************************************************************************/
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