From cea7670e7f19ee2fdf6b3fd3273024e38d97c062 Mon Sep 17 00:00:00 2001 From: Z8MAN8 <1468559561@qq.com> Date: Fri, 23 Aug 2024 22:23:42 +0800 Subject: [PATCH] bsp: cvitek: fix cvitek uart driver can not repeat configure After first called from uart open, the dw8250_uart_configure API cannot be called again. Otherwise, this will mess up the device, and uart will not act properly to interrupt again. Analysis: Configure uart device will close recive interrupte, causing uart device to malfunction. Solution: After configure uart device, enable the device's recive interrupte. Signed-off-by: Shicheng Chu <1468559561@qq.com> Reviewed-by: Chen Wang --- bsp/cvitek/drivers/drv_uart.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/bsp/cvitek/drivers/drv_uart.c b/bsp/cvitek/drivers/drv_uart.c index d540117b3f..fb896b1635 100644 --- a/bsp/cvitek/drivers/drv_uart.c +++ b/bsp/cvitek/drivers/drv_uart.c @@ -115,6 +115,7 @@ static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct se rt_base_t base; struct hw_uart_device *uart; int clock_divisor; + int last_ier_state; RT_ASSERT(serial != RT_NULL); uart = (struct hw_uart_device *)serial->parent.user_data; @@ -122,6 +123,7 @@ static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct se while (!(dw8250_read32(base, UART_LSR) & UART_LSR_TEMT)); + last_ier_state = dw8250_read32(base, UART_IER); dw8250_write32(base, UART_IER, 0); dw8250_write32(base, UART_MCR, UART_MCRVAL); dw8250_write32(base, UART_FCR, UART_FCR_DEFVAL); @@ -132,6 +134,8 @@ static rt_err_t dw8250_uart_configure(struct rt_serial_device *serial, struct se clock_divisor = DIV_ROUND_CLOSEST(UART_INPUT_CLK, 16 * serial->config.baud_rate); dw8250_uart_setbrg(base, clock_divisor); + dw8250_write32(base, UART_IER, last_ier_state); + return RT_EOK; }