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add k210 SMP support

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This commit is contained in:
shaojinchun
2018-12-28 09:06:32 +08:00
parent 214652fd7e
commit 86c76b0e8a
10 changed files with 489 additions and 81 deletions
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100
libcpu/risc-v/common/context_gcc.S
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@@ -6,10 +6,16 @@
* Change Logs:
* Date Author Notes
* 2018/10/28 Bernard The unify RISC-V porting implementation
* 2018/12/27 Jesven Add SMP support
*/
#include "cpuport.h"
#ifdef RT_USING_SMP
#define rt_hw_interrupt_disable rt_hw_local_irq_disable
#define rt_hw_interrupt_enable rt_hw_local_irq_enable
#endif
/*
* rt_base_t rt_hw_interrupt_disable(void);
*/
@@ -27,13 +33,23 @@ rt_hw_interrupt_enable:
ret
/*
* void rt_hw_context_switch_to(rt_ubase_t to)
* #ifdef RT_USING_SMP
* void rt_hw_context_switch_to(rt_ubase_t to, stuct rt_thread *to_thread);
* #else
* void rt_hw_context_switch_to(rt_ubase_t to);
* #endif
* a0 --> to
* a1 --> to_thread
*/
.globl rt_hw_context_switch_to
rt_hw_context_switch_to:
LOAD sp, (a0)
#ifdef RT_USING_SMP
mv a0, a1
jal rt_cpus_lock_status_restore
#endif
/* load epc from stack */
LOAD a0, 0 * REGBYTES(sp)
csrw mepc, a0
@@ -74,9 +90,15 @@ rt_hw_context_switch_to:
mret
/*
* void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to)
* #ifdef RT_USING_SMP
* void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread);
* #else
* void rt_hw_context_switch(rt_ubase_t from, rt_ubase_t to);
* #endif
*
* a0 --> from
* a1 --> to
* a2 --> to_thread
*/
.globl rt_hw_context_switch
rt_hw_context_switch:
@@ -136,6 +158,11 @@ save_mpie:
*/
LOAD sp, (a1)
#ifdef RT_USING_SMP
mv a0, a2
jal rt_cpus_lock_status_restore
#endif /*RT_USING_SMP*/
/* resw ra to mepc */
LOAD a1, 0 * REGBYTES(sp)
csrw mepc, a1
@@ -178,3 +205,72 @@ save_mpie:
addi sp, sp, 32 * REGBYTES
mret
#ifdef RT_USING_SMP
/*
* void rt_hw_context_switch_interrupt(void *context, rt_ubase_t from, rt_ubase_t to, struct rt_thread *to_thread);
*
* a0 --> context
* a1 --> from
* a2 --> to
* a3 --> to_thread
*/
.globl rt_hw_context_switch_interrupt
rt_hw_context_switch_interrupt:
STORE a0, 0(a1)
csrr a1, mepc
STORE a1, 0 * REGBYTES(a0)
csrr a1, mstatus
STORE a1, 2 * REGBYTES(a0)
LOAD sp, 0(a2)
move a0, a3
call rt_cpus_lock_status_restore
/* resw ra to mepc */
LOAD a1, 0 * REGBYTES(sp)
csrw mepc, a1
LOAD x1, 1 * REGBYTES(sp)
/* force to machin mode(MPP=11) */
li a1, 0x00001800;
csrs mstatus, a1
LOAD a1, 2 * REGBYTES(sp)
csrs mstatus, a1
LOAD x4, 4 * REGBYTES(sp)
LOAD x5, 5 * REGBYTES(sp)
LOAD x6, 6 * REGBYTES(sp)
LOAD x7, 7 * REGBYTES(sp)
LOAD x8, 8 * REGBYTES(sp)
LOAD x9, 9 * REGBYTES(sp)
LOAD x10, 10 * REGBYTES(sp)
LOAD x11, 11 * REGBYTES(sp)
LOAD x12, 12 * REGBYTES(sp)
LOAD x13, 13 * REGBYTES(sp)
LOAD x14, 14 * REGBYTES(sp)
LOAD x15, 15 * REGBYTES(sp)
LOAD x16, 16 * REGBYTES(sp)
LOAD x17, 17 * REGBYTES(sp)
LOAD x18, 18 * REGBYTES(sp)
LOAD x19, 19 * REGBYTES(sp)
LOAD x20, 20 * REGBYTES(sp)
LOAD x21, 21 * REGBYTES(sp)
LOAD x22, 22 * REGBYTES(sp)
LOAD x23, 23 * REGBYTES(sp)
LOAD x24, 24 * REGBYTES(sp)
LOAD x25, 25 * REGBYTES(sp)
LOAD x26, 26 * REGBYTES(sp)
LOAD x27, 27 * REGBYTES(sp)
LOAD x28, 28 * REGBYTES(sp)
LOAD x29, 29 * REGBYTES(sp)
LOAD x30, 30 * REGBYTES(sp)
LOAD x31, 31 * REGBYTES(sp)
addi sp, sp, 32 * REGBYTES
mret
#endif