mirror of
https://github.com/RT-Thread/rt-thread.git
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add raspi4 32bit mode bsp
This commit is contained in:
152
bsp/raspberry-pi/raspi4-32/driver/drv_uart.c
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152
bsp/raspberry-pi/raspi4-32/driver/drv_uart.c
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/*
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* Copyright (c) 2006-2020, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-04-16 bigmagic first version
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*/
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#include <rthw.h>
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "board.h"
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#include "drv_uart.h"
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#include "drv_gpio.h"
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struct hw_uart_device
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{
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rt_ubase_t hw_base;
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rt_uint32_t irqno;
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};
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static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct hw_uart_device *uart;
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uint32_t bauddiv = (UART_REFERENCE_CLOCK / cfg->baud_rate)* 1000 / 16;
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uint32_t ibrd = bauddiv / 1000;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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if(uart->hw_base == PL011_BASE)
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{
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uint32_t gpfsel = 0;
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gpfsel &= ~((uint32_t)(0x07 << (4 * 3)));
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gpfsel |= (uint32_t)(ALT0 << (4 * 3));
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GPIO_REG_GPFSEL1(GPIO_BASE) = gpfsel;
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gpfsel &= ~((uint32_t)(0x07 << (5 * 3)));
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gpfsel |= (uint32_t)(ALT0 << (5 * 3));
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GPIO_REG_GPFSEL1(GPIO_BASE) = gpfsel;
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PL011_REG_CR(uart->hw_base) = 0;/*Clear UART setting*/
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PL011_REG_LCRH(uart->hw_base) = 0;/*disable FIFO*/
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PL011_REG_IBRD(uart->hw_base) = ibrd;
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PL011_REG_FBRD(uart->hw_base) = (((bauddiv - ibrd * 1000) * 64 + 500) / 1000);
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PL011_REG_LCRH(uart->hw_base) = PL011_LCRH_WLEN_8;/*FIFO*/
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PL011_REG_CR(uart->hw_base) = PL011_CR_UARTEN | PL011_CR_TXE | PL011_CR_RXE;/*art enable, TX/RX enable*/
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}
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return RT_EOK;
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}
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static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable rx irq */
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PL011_REG_IMSC(uart->hw_base) &= ~((uint32_t)PL011_IMSC_RXIM);
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rt_hw_interrupt_mask(uart->irqno);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable rx irq */
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PL011_REG_IMSC(uart->hw_base) |= PL011_IMSC_RXIM;
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rt_hw_interrupt_umask(uart->irqno);
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break;
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}
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return RT_EOK;
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}
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static int uart_putc(struct rt_serial_device *serial, char c)
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{
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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while ((PL011_REG_FR(uart->hw_base) & PL011_FR_TXFF));
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PL011_REG_DR(uart->hw_base) = (uint8_t)c;
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return 1;
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}
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static int uart_getc(struct rt_serial_device *serial)
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{
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int ch = -1;
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struct hw_uart_device *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct hw_uart_device *)serial->parent.user_data;
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if((PL011_REG_FR(uart->hw_base) & PL011_FR_RXFE) == 0)
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{
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ch = PL011_REG_DR(uart->hw_base) & 0xff;
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}
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return ch;
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}
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static const struct rt_uart_ops _uart_ops =
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{
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uart_configure,
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uart_control,
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uart_putc,
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uart_getc,
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};
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static void rt_hw_uart_isr(int irqno, void *param)
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{
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struct rt_serial_device *serial = (struct rt_serial_device*)param;
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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PL011_REG_ICR(UART0_BASE) = PL011_INTERRUPT_RECEIVE;
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}
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/* UART device driver structure */
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static struct hw_uart_device _uart0_device =
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{
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PL011_BASE,
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IRQ_PL011,
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};
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static struct rt_serial_device _serial0;
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int rt_hw_uart_init(void)
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{
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struct hw_uart_device *uart;
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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uart = &_uart0_device;
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_serial0.ops = &_uart_ops;
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_serial0.config = config;
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/* register UART1 device */
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rt_hw_serial_register(&_serial0, "uart",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart);
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rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial0, "uart");
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return 0;
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}
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