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https://github.com/plctlab/riscv-operating-system-mooc.git
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a94fb0cd58
Following the standard RISC-V calling convention, make sure the stack pointer sp is always 16-byte aligned. Fixed an issue, make sure the sp of task point to the bottom of the stack, while originally we waste one byte (forgive my stupid ~~~). Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
53 lines
881 B
C
53 lines
881 B
C
#include "os.h"
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/* defined in entry.S */
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extern void switch_to(struct context *next);
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#define STACK_SIZE 1024
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/*
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* In the standard RISC-V calling convention, the stack pointer sp
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* is always 16-byte aligned.
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*/
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uint8_t __attribute__((aligned(16))) task_stack[STACK_SIZE];
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struct context ctx_task;
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static void w_mscratch(reg_t x)
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{
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asm volatile("csrw mscratch, %0" : : "r" (x));
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}
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void user_task0(void);
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void sched_init()
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{
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w_mscratch(0);
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ctx_task.sp = (reg_t) &task_stack[STACK_SIZE];
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ctx_task.ra = (reg_t) user_task0;
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}
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void schedule()
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{
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struct context *next = &ctx_task;
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switch_to(next);
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}
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/*
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* a very rough implementaion, just to consume the cpu
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*/
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void task_delay(volatile int count)
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{
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count *= 50000;
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while (count--);
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}
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void user_task0(void)
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{
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uart_puts("Task 0: Created!\n");
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while (1) {
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uart_puts("Task 0: Running...\n");
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task_delay(1000);
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}
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}
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