mirror of
https://github.com/plctlab/riscv-operating-system-mooc.git
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100cc9f1d9
- updated openday report - fixed I41BDM - I3ZLLK, code part & errata part fixing - fixed I3XWKC, ppt & errata part - fixed I418VG
43 lines
1004 B
ArmAsm
43 lines
1004 B
ArmAsm
#include "platform.h"
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# size of each hart's stack is 1024 bytes
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.equ STACK_SIZE, 1024
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.global _start
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.text
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_start:
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# park harts with id != 0
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csrr t0, mhartid # read current hart id
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mv tp, t0 # keep CPU's hartid in its tp for later usage.
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bnez t0, park # if we're not on the hart 0
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# we park the hart
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# Set all bytes in the BSS section to zero.
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la a0, _bss_start
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la a1, _bss_end
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bgeu a0, a1, 2f
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1:
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sw zero, (a0)
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addi a0, a0, 4
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bltu a0, a1, 1b
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2:
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# Setup stacks, the stack grows from bottom to top, so we put the
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# stack pointer to the very end of the stack range.
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slli t0, t0, 10 # shift left the hart id by 1024
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la sp, stacks + STACK_SIZE # set the initial stack pointer
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# to the end of the first stack space
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add sp, sp, t0 # move the current hart stack pointer
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# to its place in the stack space
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j start_kernel # hart 0 jump to c
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park:
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wfi
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j park
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stacks:
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.skip STACK_SIZE * MAXNUM_CPU # allocate space for all the harts stacks
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.end # End of file
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