Imagelibrary/riscv-operating-system-mooc
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7 Commits

Author SHA1 Message Date
Wang Chen
fd1d098906 Encapsulate some types related to cpu word length. 
The purpose is to facilitate porting to RV64.

Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
 2024-03-27 14:30:53 +08:00
Hunter
2474692c8b Fix uses of .align 
The GNU assembler responds to .align in a platform-dependent way. For a
use of '.align x', gas will align to 'x' bytes for some platforms,
but '2^x' bytes for other platforms including RISC-V. We are currently
reserving too much space with .align, so correct them by switching to
the more predictable .balign directive.

Signed-off-by: Hunter <>
 2023-12-19 07:51:43 +08:00
Wang Chen
6d2c046c67 don't save/retore gp&tp 
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
Co-authored-by: LiuJiLan <ldc31415926@126.com>
 2023-06-17 16:14:18 +08:00
Wang Chen
f77939f1e8 improved code comments about restore/save context of task 
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
 2023-02-12 13:23:20 +08:00
Wang Chen
744226d09e improved comments 
Signed-off-by: ablechen <17895010372@163.com>
Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>
 2022-11-23 10:06:37 +08:00
Wang Chen
09ea96ffed fixed issues I42AUE & I42BLV 2021-08-01 16:05:35 +08:00
Wang Chen
ad15280f3a initial versioin 2021-04-01 20:02:31 +08:00