7 Commits

Author	SHA1	Message	Date
Wang Chen	a2617cffa6	create common.mk for os projects ... Makefiles of rvos projects contains too many duplicated contents. Cleanup and move it into a new common.mk file for os only, this will not touch asm samples. Finally the common..mk which was used for both asm & os is removed. Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>	2024-03-26 09:01:03 +08:00
Chen Wang	27723d09ed	Compatible support for new gcc ... With gcc version >= 11.1.0, to support new ISA spec changes, which moved some instructions from the I extension to the Zicsr and Zifencei extensions, we have to explicitly specify Zicsr and Zifencei via -march. But it is not required for old gcc versions. To cope with both cases, we use rv32g instead of rv32ima. "g" = "imafd". RVOS doesn't use "f" & "d", and we also don't want "c". We use "g" to just to make life easy, otherwise we may have to intriduce some mechanism to judge and differ the version of gcc used. Also updated some comments to move to rv32g and don't involve words such as "rv32ima". Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>	2023-12-19 08:26:42 +08:00
Wang Chen	ae10d3e698	fixed some minor issues. ... - https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I4QLTP - https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I4PJTQ - https://gitee.com/unicornx/riscv-operating-system-mooc/issues/I49VW5 Signed-off-by: Wang Chen <wangchen20@iscas.ac.cn>	2022-01-27 11:06:44 +08:00
Wang Chen	d9f5e22e99	fixed issues I47WMN, I477IX,I441IC	2021-09-06 10:30:57 +08:00
Wang Chen	a9a5c2fdb3	updated before 3rd class	2021-04-15 14:47:40 +08:00
Wang Chen	5dbe7364e2	updatad before second class	2021-04-08 15:32:45 +08:00
Wang Chen	ad15280f3a	initial versioin	2021-04-01 20:02:31 +08:00