Imagelibrary/riscv-operating-system-mooc
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This commitment contains following changes:

Browse Source 
- updated openday report
- fixed I41BDM
- I3ZLLK, code part & errata part fixing
- fixed I3XWKC, ppt & errata part
- fixed I418VG
This commit is contained in:
Wang Chen
2021-07-22 17:09:14 +08:00
parent 07d7c9bfe6
commit 100cc9f1d9
23 changed files with 114 additions and 108 deletions
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10
code/os/06-interrupts/platform.h
View File

@@ -5,7 +5,7 @@
* QEMU RISC-V Virt machine with 16550a UART and VirtIO MMIO
*/
/*
/*
* maximum number of CPUs
* see https://github.com/qemu/qemu/blob/master/include/hw/riscv/virt.h
* #define VIRT_CPUS_MAX 8
@@ -14,7 +14,7 @@
/*
* MemoryMap
* see https://github.com/qemu/qemu/blob/master/hw/riscv/virt.c, virt_memmap[]
* see https://github.com/qemu/qemu/blob/master/hw/riscv/virt.c, virt_memmap[]
* 0x00001000 -- boot ROM, provided by qemu
* 0x02000000 -- CLINT
* 0x0C000000 -- PLIC
@@ -26,7 +26,7 @@
/* This machine puts UART registers here in physical memory. */
#define UART0 0x10000000L
/*
/*
* UART0 interrupt source
* see https://github.com/qemu/qemu/blob/master/include/hw/riscv/virt.h
* enum {
@@ -36,7 +36,7 @@
*/
#define UART0_IRQ 10
/*
/*
* This machine puts platform-level interrupt controller (PLIC) here.
* Here only list PLIC registers in Machine mode.
* see https://github.com/qemu/qemu/blob/master/include/hw/riscv/virt.h
@@ -54,7 +54,7 @@
*/
#define PLIC_BASE 0x0c000000L
#define PLIC_PRIORITY(id) (PLIC_BASE + (id) * 4)
#define PLIC_PENDING(id) (PLIC_BASE + 0x1000 + ((id) / 32))
#define PLIC_PENDING(id) (PLIC_BASE + 0x1000 + ((id) / 32) * 4)
#define PLIC_MENABLE(hart) (PLIC_BASE + 0x2000 + (hart) * 0x80)
#define PLIC_MTHRESHOLD(hart) (PLIC_BASE + 0x200000 + (hart) * 0x1000)
#define PLIC_MCLAIM(hart) (PLIC_BASE + 0x200004 + (hart) * 0x1000)

6
code/os/06-interrupts/start.S
View File

@@ -1,7 +1,7 @@
#include "platform.h"
# size of each hart's stack is 1024 bytes
.equ STACK_SIZE, MAXNUM_CPU * 1024
.equ STACK_SIZE, 1024
.global _start
@@ -26,7 +26,7 @@ _start:
# stack pointer to the very end of the stack range.
slli t0, t0, 10 # shift left the hart id by 1024
la sp, stacks + STACK_SIZE # set the initial stack pointer
# to the end of the stack space
# to the end of the first stack space
add sp, sp, t0 # move the current hart stack pointer
# to its place in the stack space
@@ -37,6 +37,6 @@ park:
j park
stacks:
.skip STACK_SIZE # allocate space for all the harts stacks
.skip STACK_SIZE * MAXNUM_CPU # allocate space for all the harts stacks
.end # End of file