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53 lines
1.3 KiB
ArmAsm
53 lines
1.3 KiB
ArmAsm
# This Code derived from xv6-riscv (64bit)
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# -- https://github.com/mit-pdos/xv6-riscv/blob/riscv/kernel/swtch.S
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# ============ MACRO ==================
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.macro ctx_save base
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sw ra, 0(\base)
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sw sp, 4(\base)
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sw s0, 8(\base)
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sw s1, 12(\base)
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sw s2, 16(\base)
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sw s3, 20(\base)
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sw s4, 24(\base)
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sw s5, 28(\base)
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sw s6, 32(\base)
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sw s7, 36(\base)
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sw s8, 40(\base)
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sw s9, 44(\base)
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sw s10, 48(\base)
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sw s11, 52(\base)
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.endm
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.macro ctx_load base
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lw ra, 0(\base)
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lw sp, 4(\base)
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lw s0, 8(\base)
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lw s1, 12(\base)
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lw s2, 16(\base)
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lw s3, 20(\base)
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lw s4, 24(\base)
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lw s5, 28(\base)
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lw s6, 32(\base)
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lw s7, 36(\base)
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lw s8, 40(\base)
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lw s9, 44(\base)
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lw s10, 48(\base)
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lw s11, 52(\base)
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.endm
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# ============ Macro END ==================
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# Context switch
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#
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# void sys_switch(struct context *old, struct context *new);
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#
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# Save current registers in old. Load from new.
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.globl sys_switch
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.align 4
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sys_switch:
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ctx_save a0 # a0 => struct context *old
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ctx_load a1 # a1 => struct context *new
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ret # pc=ra; swtch to new task (new->ra)
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