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a2e3cce344
Convert solib_ops into an abstract base class (with abstract methods,
some of them with default implementations) and convert all the existing
solib_ops instances to solib_ops derived classes / implementations.
Prior to this patch, solib_ops is a structure holding function pointers,
of which there are only a handful of global instances (in the
`solib-*.c` files). When passing an `solib_ops *` around, it's a
pointer to one of these instances. After this patch, there are no more
global solib_ops instances. Instances are created as needed and stored
in struct program_space. These instances could eventually be made to
contain the program space-specific data, which is currently kept in
per-program space registries (I have some pending patches for that).
Prior to this patch, `gdbarch_so_ops` is a gdbarch method that returns a
pointer to the appropriate solib_ops implementation for the gdbarch.
This is replaced with the `gdbarch_make_solib_ops` method, which returns
a new instance of the appropriate solib_ops implementation for this
gdbarch. This requires introducing some factory functions for the
various solib_ops implementation, to be used as `gdbarch_make_solib_ops`
callbacks. For instance:
solib_ops_up
make_linux_ilp32_svr4_solib_ops ()
{
return std::make_unique<linux_ilp32_svr4_solib_ops> ();
}
The previous code is full of cases of tdep files copying some base
solib_ops implementation, and overriding one or more function pointer
(see ppc_linux_init_abi, for instance). I tried to convert all of this
is a class hierarchy. I like that it's now possible to get a good
static view of all the existing solib_ops variants. The hierarchy looks
like this:
solib_ops
├── aix_solib_ops
├── darwin_solib_ops
├── dsbt_solib_ops
├── frv_solib_ops
├── rocm_solib_ops
├── svr4_solib_ops
│ ├── ilp32_svr4_solib_ops
│ ├── lp64_svr4_solib_ops
│ ├── linux_ilp32_svr4_solib_ops
│ │ ├── mips_linux_ilp32_svr4_solib_ops
│ │ └── ppc_linux_ilp32_svr4_solib_ops
│ ├── linux_lp64_svr4_solib_ops
│ │ └── mips_linux_lp64_svr4_solib_ops
│ ├── mips_nbsd_ilp32_svr4_solib_ops
│ ├── mips_nbsd_lp64_svr4_solib_ops
│ ├── mips_fbsd_ilp32_svr4_solib_ops
│ └── mips_fbsd_lp64_svr4_solib_ops
└── target_solib_ops
└── windows_solib_ops
The solib-svr4 code has per-arch specialization to provide a
link_map_offsets, containing the offsets of the interesting fields in
`struct link_map` on that particular architecture. Prior to this patch,
arches would set a callback returning the appropriate link_map_offsets
by calling `set_solib_svr4_fetch_link_map_offsets`, which also happened
to set the gdbarch's so_ops to `&svr_so_ops`. I converted this to an
abstract virtual method of `struct svr4_solib_ops`, meaning that all
classes deriving from svr4_solib_ops must provide a method returning the
appropriate link_map_offsets for the architecture. I renamed
`set_solib_svr4_fetch_link_map_offsets` to `set_solib_svr4_ops`. This
function is still necessary because it also calls
set_gdbarch_iterate_over_objfiles_in_search_order, but if it was not for
that, we could get rid of it.
There is an instance of CRTP in mips-linux-tdep.c, because both
mips_linux_ilp32_svr4_solib_ops and mips_linux_lp64_svr4_solib_ops need
to derive from different SVR4 base classes (linux_ilp32_svr4_solib_ops
and linux_lp64_svr4_solib_ops), but they both want to override the
in_dynsym_resolve_code method with the same implementation.
The solib_ops::supports_namespaces method is new: the support for
namespaces was previously predicated by the presence or absence of a
find_solib_ns method. It now needs to be explicit.
There is a new progspace::release_solib_ops method, which is only needed
for rocm_solib_ops. For the moment, rocm_solib_ops replaces and wraps
the existing svr4_solib_ops instance, in order to combine the results of
the two. The plan is to have a subsequent patch to allow program spaces to have
multiple solib_ops, removing the need for release_solib_ops.
Speaking of rocm_solib_ops: it previously overrode only a few methods by
copying svr4_solib_ops and overwriting some function pointers. Now, it
needs to implement all the methods that svr4_solib_ops implements, in
order to forward the call. Otherwise, the default solib_ops method
would be called, hiding the svr4_solib_ops implementation. Again, this
can be removed once we have support for multiple solib_ops in a
program_space.
There is also a small change in how rocm_solib_ops is activated. Prior
to this patch, it's done at the end of rocm_update_solib_list. Since it
overrides the function pointer in the static svr4_solib_ops, and then
overwrites the host gdbarch, so_ops field, it's something that happens
only once. After the patch though, we need to set rocm_solib_ops in all
the program spaces that appear. We do this in
rocm_solib_target_inferior_created and in the new
rocm_solib_target_inferior_execd. After this, I will explore doing a
change where rocm_solib_ops is only set when we detect the ROCm runtime
is loaded.
Change-Id: I5896b5bcbf8bdb024d67980380feba1ffefaa4c9
Approved-By: Pedro Alves <pedro@palves.net>
415 lines
12 KiB
C
415 lines
12 KiB
C
/* Target-dependent code for NetBSD/mips.
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Copyright (C) 2002-2025 Free Software Foundation, Inc.
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Contributed by Wasabi Systems, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "extract-store-integer.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "regset.h"
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#include "target.h"
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#include "value.h"
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#include "osabi.h"
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#include "netbsd-tdep.h"
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#include "mips-netbsd-tdep.h"
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#include "mips-tdep.h"
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#include "solib-svr4.h"
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/* Shorthand for some register numbers used below. */
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#define MIPS_PC_REGNUM MIPS_EMBED_PC_REGNUM
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#define MIPS_FP0_REGNUM MIPS_EMBED_FP0_REGNUM
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#define MIPS_FSR_REGNUM MIPS_EMBED_FP0_REGNUM + 32
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/* Core file support. */
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/* Number of registers in `struct reg' from <machine/reg.h>. */
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#define MIPSNBSD_NUM_GREGS 38
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/* Number of registers in `struct fpreg' from <machine/reg.h>. */
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#define MIPSNBSD_NUM_FPREGS 33
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/* Supply register REGNUM from the buffer specified by FPREGS and LEN
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in the floating-point register set REGSET to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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static void
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mipsnbsd_supply_fpregset (const struct regset *regset,
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struct regcache *regcache,
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int regnum, const void *fpregs, size_t len)
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{
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size_t regsize = mips_isa_regsize (regcache->arch ());
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const char *regs = (const char *) fpregs;
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int i;
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gdb_assert (len >= MIPSNBSD_NUM_FPREGS * regsize);
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for (i = MIPS_FP0_REGNUM; i <= MIPS_FSR_REGNUM; i++)
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{
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if (regnum == i || regnum == -1)
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regcache->raw_supply (i, regs + (i - MIPS_FP0_REGNUM) * regsize);
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}
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}
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/* Supply register REGNUM from the buffer specified by GREGS and LEN
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in the general-purpose register set REGSET to register cache
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REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
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static void
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mipsnbsd_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *gregs, size_t len)
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{
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size_t regsize = mips_isa_regsize (regcache->arch ());
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const char *regs = (const char *) gregs;
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int i;
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gdb_assert (len >= MIPSNBSD_NUM_GREGS * regsize);
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for (i = 0; i <= MIPS_PC_REGNUM; i++)
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{
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if (regnum == i || regnum == -1)
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regcache->raw_supply (i, regs + i * regsize);
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}
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if (len >= (MIPSNBSD_NUM_GREGS + MIPSNBSD_NUM_FPREGS) * regsize)
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{
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regs += MIPSNBSD_NUM_GREGS * regsize;
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len -= MIPSNBSD_NUM_GREGS * regsize;
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mipsnbsd_supply_fpregset (regset, regcache, regnum, regs, len);
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}
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}
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/* NetBSD/mips register sets. */
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static const struct regset mipsnbsd_gregset =
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{
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NULL,
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mipsnbsd_supply_gregset,
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NULL,
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REGSET_VARIABLE_SIZE
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};
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static const struct regset mipsnbsd_fpregset =
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{
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NULL,
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mipsnbsd_supply_fpregset
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};
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/* Iterate over core file register note sections. */
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static void
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mipsnbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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size_t regsize = mips_isa_regsize (gdbarch);
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cb (".reg", MIPSNBSD_NUM_GREGS * regsize, MIPSNBSD_NUM_GREGS * regsize,
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&mipsnbsd_gregset, NULL, cb_data);
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cb (".reg2", MIPSNBSD_NUM_FPREGS * regsize, MIPSNBSD_NUM_FPREGS * regsize,
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&mipsnbsd_fpregset, NULL, cb_data);
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}
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/* Conveniently, GDB uses the same register numbering as the
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ptrace register structure used by NetBSD/mips. */
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void
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mipsnbsd_supply_reg (struct regcache *regcache, const char *regs, int regno)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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int i;
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for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
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{
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if (regno == i || regno == -1)
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{
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if (gdbarch_cannot_fetch_register (gdbarch, i))
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regcache->raw_supply (i, NULL);
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else
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regcache->raw_supply
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(i, regs + (i * mips_isa_regsize (gdbarch)));
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}
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}
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}
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void
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mipsnbsd_fill_reg (const struct regcache *regcache, char *regs, int regno)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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int i;
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for (i = 0; i <= gdbarch_pc_regnum (gdbarch); i++)
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if ((regno == i || regno == -1)
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&& ! gdbarch_cannot_store_register (gdbarch, i))
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regcache->raw_collect (i, regs + (i * mips_isa_regsize (gdbarch)));
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}
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void
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mipsnbsd_supply_fpreg (struct regcache *regcache,
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const char *fpregs, int regno)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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int i;
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for (i = gdbarch_fp0_regnum (gdbarch);
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i <= mips_regnum (gdbarch)->fp_implementation_revision;
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i++)
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{
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if (regno == i || regno == -1)
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{
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if (gdbarch_cannot_fetch_register (gdbarch, i))
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regcache->raw_supply (i, NULL);
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else
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regcache->raw_supply (i,
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fpregs
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+ ((i - gdbarch_fp0_regnum (gdbarch))
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* mips_isa_regsize (gdbarch)));
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}
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}
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}
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void
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mipsnbsd_fill_fpreg (const struct regcache *regcache, char *fpregs, int regno)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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int i;
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for (i = gdbarch_fp0_regnum (gdbarch);
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i <= mips_regnum (gdbarch)->fp_control_status;
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i++)
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if ((regno == i || regno == -1)
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&& ! gdbarch_cannot_store_register (gdbarch, i))
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regcache->raw_collect
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(i, (fpregs + ((i - gdbarch_fp0_regnum (gdbarch))
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* mips_isa_regsize (gdbarch))));
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}
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#if 0
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/* Under NetBSD/mips, signal handler invocations can be identified by the
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designated code sequence that is used to return from a signal handler.
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In particular, the return address of a signal handler points to the
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following code sequence:
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addu a0, sp, 16
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li v0, 295 # __sigreturn14
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syscall
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Each instruction has a unique encoding, so we simply attempt to match
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the instruction the PC is pointing to with any of the above instructions.
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If there is a hit, we know the offset to the start of the designated
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sequence and can then check whether we really are executing in the
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signal trampoline. If not, -1 is returned, otherwise the offset from the
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start of the return sequence is returned. */
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#define RETCODE_NWORDS 3
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#define RETCODE_SIZE (RETCODE_NWORDS * 4)
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static const unsigned char sigtramp_retcode_mipsel[RETCODE_SIZE] =
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{
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0x10, 0x00, 0xa4, 0x27, /* addu a0, sp, 16 */
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0x27, 0x01, 0x02, 0x24, /* li v0, 295 */
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0x0c, 0x00, 0x00, 0x00, /* syscall */
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};
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static const unsigned char sigtramp_retcode_mipseb[RETCODE_SIZE] =
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{
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0x27, 0xa4, 0x00, 0x10, /* addu a0, sp, 16 */
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0x24, 0x02, 0x01, 0x27, /* li v0, 295 */
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0x00, 0x00, 0x00, 0x0c, /* syscall */
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};
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#endif
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/* Figure out where the longjmp will land. We expect that we have
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just entered longjmp and haven't yet setup the stack frame, so the
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args are still in the argument regs. MIPS_A0_REGNUM points at the
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jmp_buf structure from which we extract the PC that we will land
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at. The PC is copied into *pc. This routine returns true on
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success. */
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#define NBSD_MIPS_JB_PC (2 * 4)
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#define NBSD_MIPS_JB_ELEMENT_SIZE(gdbarch) mips_isa_regsize (gdbarch)
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#define NBSD_MIPS_JB_OFFSET(gdbarch) (NBSD_MIPS_JB_PC * \
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NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch))
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static int
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mipsnbsd_get_longjmp_target (const frame_info_ptr &frame, CORE_ADDR *pc)
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{
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struct gdbarch *gdbarch = get_frame_arch (frame);
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enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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CORE_ADDR jb_addr;
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gdb_byte *buf;
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buf = (gdb_byte *) alloca (NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch));
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jb_addr = get_frame_register_unsigned (frame, MIPS_A0_REGNUM);
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if (target_read_memory (jb_addr + NBSD_MIPS_JB_OFFSET (gdbarch), buf,
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NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch)))
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return 0;
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*pc = extract_unsigned_integer (buf, NBSD_MIPS_JB_ELEMENT_SIZE (gdbarch),
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byte_order);
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return 1;
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}
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static int
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mipsnbsd_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
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{
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return (regno == MIPS_ZERO_REGNUM
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|| regno == mips_regnum (gdbarch)->fp_implementation_revision);
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}
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static int
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mipsnbsd_cannot_store_register (struct gdbarch *gdbarch, int regno)
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{
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return (regno == MIPS_ZERO_REGNUM
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|| regno == mips_regnum (gdbarch)->fp_implementation_revision);
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}
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/* solib_ops for ILP32 NetBSD/MIPS systems. */
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struct mips_nbsd_ilp32_svr4_solib_ops : public svr4_solib_ops
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{
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/* NetBSD/MIPS uses a slightly different `struct link_map' than the
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other NetBSD platforms. */
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link_map_offsets *fetch_link_map_offsets () const override;
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};
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/* Return a new solib_ops for ILP32 NetBSD/MIPS systems. */
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static solib_ops_up
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make_mips_nbsd_ilp32_svr4_solib_ops ()
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{
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return std::make_unique<mips_nbsd_ilp32_svr4_solib_ops> ();
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}
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/* See mips_nbsd_ilp32_svr4_solib_ops. */
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link_map_offsets *
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mips_nbsd_ilp32_svr4_solib_ops::fetch_link_map_offsets () const
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{
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static struct link_map_offsets lmo;
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static struct link_map_offsets *lmp = NULL;
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if (lmp == NULL)
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{
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lmp = &lmo;
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lmo.r_version_offset = 0;
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lmo.r_version_size = 4;
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lmo.r_map_offset = 4;
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lmo.r_brk_offset = 8;
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lmo.r_ldsomap_offset = -1;
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lmo.r_next_offset = -1;
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/* Everything we need is in the first 24 bytes. */
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lmo.link_map_size = 24;
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lmo.l_addr_offset = 4;
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lmo.l_name_offset = 8;
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lmo.l_ld_offset = 12;
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lmo.l_next_offset = 16;
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lmo.l_prev_offset = 20;
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}
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return lmp;
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}
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/* solib_ops for LP64 NetBSD/MIPS systems. */
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struct mips_nbsd_lp64_svr4_solib_ops : public svr4_solib_ops
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{
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/* NetBSD/MIPS uses a slightly different `struct link_map' than the
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other NetBSD platforms. */
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link_map_offsets *fetch_link_map_offsets () const override;
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};
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/* Return a new solib_ops for LP64 NetBSD/MIPS systems. */
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static solib_ops_up
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make_mips_nbsd_lp64_svr4_solib_ops ()
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{
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return std::make_unique<mips_nbsd_lp64_svr4_solib_ops> ();
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}
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/* See mips_nbsd_lp64_svr4_solib_ops. */
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link_map_offsets *
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mips_nbsd_lp64_svr4_solib_ops::fetch_link_map_offsets () const
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{
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static struct link_map_offsets lmo;
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static struct link_map_offsets *lmp = NULL;
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if (lmp == NULL)
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{
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lmp = &lmo;
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lmo.r_version_offset = 0;
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lmo.r_version_size = 4;
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lmo.r_map_offset = 8;
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lmo.r_brk_offset = 16;
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lmo.r_ldsomap_offset = -1;
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lmo.r_next_offset = -1;
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/* Everything we need is in the first 40 bytes. */
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lmo.link_map_size = 48;
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lmo.l_addr_offset = 0;
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lmo.l_name_offset = 16;
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lmo.l_ld_offset = 24;
|
||
lmo.l_next_offset = 32;
|
||
lmo.l_prev_offset = 40;
|
||
}
|
||
|
||
return lmp;
|
||
}
|
||
|
||
|
||
static void
|
||
mipsnbsd_init_abi (struct gdbarch_info info,
|
||
struct gdbarch *gdbarch)
|
||
{
|
||
nbsd_init_abi (info, gdbarch);
|
||
|
||
set_gdbarch_iterate_over_regset_sections
|
||
(gdbarch, mipsnbsd_iterate_over_regset_sections);
|
||
|
||
set_gdbarch_get_longjmp_target (gdbarch, mipsnbsd_get_longjmp_target);
|
||
|
||
set_gdbarch_cannot_fetch_register (gdbarch, mipsnbsd_cannot_fetch_register);
|
||
set_gdbarch_cannot_store_register (gdbarch, mipsnbsd_cannot_store_register);
|
||
|
||
set_gdbarch_software_single_step (gdbarch, mips_software_single_step);
|
||
|
||
/* NetBSD/mips has SVR4-style shared libraries. */
|
||
set_solib_svr4_ops (gdbarch, (gdbarch_ptr_bit (gdbarch) == 32
|
||
? make_mips_nbsd_ilp32_svr4_solib_ops
|
||
: make_mips_nbsd_lp64_svr4_solib_ops));
|
||
}
|
||
|
||
INIT_GDB_FILE (mipsnbsd_tdep)
|
||
{
|
||
gdbarch_register_osabi (bfd_arch_mips, 0, GDB_OSABI_NETBSD,
|
||
mipsnbsd_init_abi);
|
||
}
|