Files
binutils-gdb/sim/erc32/float.c
Tom de Vries d2d240ff89 [sim] Run spellcheck.sh in sim (part 1)
Run gdb/contrib/spellcheck.sh on directory sim.

Fix auto-corrected typos:
...
accessable -> accessible
accidently -> accidentally
accomodate -> accommodate
adress -> address
afair -> affair
agains -> against
agressively -> aggressively
annuled -> annulled
arbitary -> arbitrary
arround -> around
auxillary -> auxiliary
availablity -> availability
clasic -> classic
comming -> coming
controled -> controlled
controling -> controlling
destory -> destroy
existance -> existence
explictly -> explicitly
faciliate -> facilitate
fouth -> fourth
fullfilled -> fulfilled
guarentee -> guarantee
hinderance -> hindrance
independant -> independent
inital -> initial
loosing -> losing
occurance -> occurrence
occured -> occurred
occuring -> occurring
omited -> omitted
oportunity -> opportunity
parallely -> parallelly
permissable -> permissible
postive -> positive
powerfull -> powerful
preceed -> precede
preceeding -> preceding
preceeds -> precedes
primative -> primitive
probaly -> probably
programable -> programmable
propogate -> propagate
propper -> proper
recieve -> receive
reconized -> recognized
refered -> referred
refering -> referring
relevent -> relevant
responisble -> responsible
retreive -> retrieve
safty -> safety
specifiying -> specifying
spontanous -> spontaneous
sqaure -> square
successfull -> successful
supress -> suppress
sytem -> system
thru -> through
transfered -> transferred
trigered -> triggered
unfortunatly -> unfortunately
upto -> up to
usefull -> useful
wierd -> weird
writen -> written
doesnt -> doesn't
isnt -> isn't
...

Manually undid the "andd -> and" transformation in sim/testsuite/cr16/andd.cgs
and sim/cr16/simops.c.

Tested by rebuilding on x86_64-linux.

Approved-By: Tom Tromey <tom@tromey.com>
2024-11-23 13:07:38 +01:00

86 lines
2.2 KiB
C

/* This file is part of SIS (SPARC instruction simulator)
Copyright (C) 1995-2024 Free Software Foundation, Inc.
Contributed by Jiri Gaisler, European Space Agency
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* This file implements the interface between the host and the simulated
FPU. IEEE trap handling is done as follows:
1. In the host, all IEEE traps are masked
2. After each simulated FPU instruction, check if any exception
occurred by reading the exception bits from the host FPU status
register (get_accex()).
3. Propagate any exceptions to the simulated FSR.
4. Clear host exception bits.
*/
/* This must come before any other includes. */
#include "defs.h"
#include "sis.h"
#include <fenv.h>
/* This routine should return the accrued exceptions */
int
get_accex(void)
{
int fexc, accx;
fexc = fetestexcept (FE_ALL_EXCEPT);
accx = 0;
if (fexc & FE_INEXACT)
accx |= 1;
if (fexc & FE_DIVBYZERO)
accx |= 2;
if (fexc & FE_UNDERFLOW)
accx |= 4;
if (fexc & FE_OVERFLOW)
accx |= 8;
if (fexc & FE_INVALID)
accx |= 0x10;
return accx;
}
/* How to clear the accrued exceptions */
void
clear_accex(void)
{
feclearexcept (FE_ALL_EXCEPT);
}
/* How to map SPARC FSR onto the host */
void
set_fsr(uint32_t fsr)
{
int fround;
fsr >>= 30;
switch (fsr) {
case 0:
fround = FE_TONEAREST;
break;
case 1:
fround = FE_TOWARDZERO;
break;
case 2:
fround = FE_UPWARD;
break;
case 3:
fround = FE_DOWNWARD;
break;
}
fesetround (fround);
}