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2011a547790488fb3a8c8e8e33044b61c702339a
binutils-gdb/sim/mips
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Mike Frysinger 2011a54779 sim: mips: match target on cpu settings 
We don't need to enforce larger target settings when the only thing
the sim should care about is the CPU target.  So reduce most of the
target matches to only check the CPU.
2022-12-21 22:27:12 -05:00
..
acinclude-top.m4
sim: mips: move fpu bitsize defines to top-level configure
2022-12-21 22:27:12 -05:00
aclocal.m4
sim: mips: move fpu bitsize defines to top-level configure
2022-12-21 22:27:12 -05:00
ChangeLog-2021
…
configure
sim: mips: match target on cpu settings
2022-12-21 22:27:12 -05:00
configure.ac
sim: mips: match target on cpu settings
2022-12-21 22:27:12 -05:00
cp1.c
sim: mips: Add simulator support for mips32r6/mips64r6
2022-02-04 19:37:26 -05:00
cp1.h
sim: mips: Add simulator support for mips32r6/mips64r6
2022-02-04 19:37:26 -05:00
dsp2.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
dsp.c
Automatic Copyright Year update after running gdb/copyright.py
2022-01-01 19:13:23 +04:00
dsp.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
dv-tx3904cpu.c
sim: mips: clean up bad style/whitespace
2022-01-01 13:26:34 -05:00
dv-tx3904irc.c
sim: mips: clean up bad style/whitespace
2022-01-01 13:26:34 -05:00
dv-tx3904sio.c
sim: mips: clean up bad style/whitespace
2022-01-01 13:26:34 -05:00
dv-tx3904tmr.c
sim: mips: clean up bad style/whitespace
2022-01-01 13:26:34 -05:00
interp.c
sim: mips: invert sim_cpu storage
2022-12-21 00:00:01 -05:00
local.mk
sim: build: hoist lists of hw devices up
2022-12-21 22:21:25 -05:00
m16.dc
…
m16.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
m16e.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
m16run.c
sim: mips: clean up bad style/whitespace
2022-01-01 13:26:34 -05:00
Makefile.in
sim: mips: move fpu bitsize defines to top-level configure
2022-12-21 22:27:12 -05:00
mdmx.c
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
mdmx.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
micromips16.dc
…
micromips.dc
…
micromips.igen
sim: mips: Add simulator support for mips32r6/mips64r6
2022-02-04 19:37:26 -05:00
micromipsdsp.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
micromipsrun.c
Automatic Copyright Year update after running gdb/copyright.py
2022-01-01 19:13:23 +04:00
mips3d.igen
sim: mips: clean up bad style/whitespace
2022-01-01 13:26:34 -05:00
mips3264r2.igen
sim: mips: Add simulator support for mips32r6/mips64r6
2022-02-04 19:37:26 -05:00
mips3264r6.igen
sim: mips: Add simulator support for mips32r6/mips64r6
2022-02-04 19:37:26 -05:00
mips.dc
…
mips.igen
sim: mips: call Unpredictable instead of setting bogus values [PR sim/29276]
2022-11-08 14:55:50 +07:00
sb1.igen
sim: mips: clean up bad style/whitespace
2022-01-01 13:26:34 -05:00
sim-main.c
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
sim-main.h
sim: mips: always resolve active bfd mach dynamically
2022-12-21 22:27:11 -05:00
smartmips.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
tx.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00
vr.igen
sim: mips: migrate to standard uintXX_t types
2022-01-06 01:17:38 -05:00