Files
binutils-gdb/gdb/arch/aarch64.c
Thiago Jung Bauermann 6e4a39ac3c GDB, gdbserver: aarch64-linux: Initial Guarded Control Stack support
Add the org.gnu.gdb.aarch64.gcs feature with the GCSPR register, and the
org.gnu.gdb.aarch64.gcs.linux feature with "registers" to represent the
Linux kernel ptrace and prctl knobs that enable and lock specific GCS
functionality.

This code supports GCS only in Linux userspace applications, so the
GCSPR that is exposed is the one at EL0.

Also, support for calling inferior functions is enabled by adding an
implementation for the shadow_stack_push gdbarch method.

Testcases gdb.arch/aarch64-gcs.exp and gdb.arch/aarch64-gcs-core.exp are
included to cover the added functionality.

The change in the core_find procedure allows aarch64-gcs-core.exp to
recover the output from the crashed program.  It's needed because the
test program in this testcase prints to stdout the value of the GCSPR
right before crashing, and the testcase needs it to check whether GDB
got it right.
2025-06-18 00:21:21 -03:00

109 lines
3.1 KiB
C

/* Copyright (C) 2017-2025 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "aarch64.h"
#include <stdlib.h>
#include "../features/aarch64-core.c"
#include "../features/aarch64-fpu.c"
#include "../features/aarch64-sve.c"
#include "../features/aarch64-pauth.c"
#include "../features/aarch64-mte.c"
#include "../features/aarch64-sme.c"
#include "../features/aarch64-sme2.c"
#include "../features/aarch64-tls.c"
#include "../features/aarch64-gcs.c"
#include "../features/aarch64-gcs-linux.c"
/* See arch/aarch64.h. */
target_desc *
aarch64_create_target_description (const aarch64_features &features)
{
target_desc_up tdesc = allocate_target_description ();
#ifndef IN_PROCESS_AGENT
set_tdesc_architecture (tdesc.get (), "aarch64");
#endif
long regnum = 0;
regnum = create_feature_aarch64_core (tdesc.get (), regnum);
if (features.vq == 0)
regnum = create_feature_aarch64_fpu (tdesc.get (), regnum);
else
regnum = create_feature_aarch64_sve (tdesc.get (), regnum, features.vq);
if (features.pauth)
regnum = create_feature_aarch64_pauth (tdesc.get (), regnum);
/* Memory tagging extension registers. */
if (features.mte)
regnum = create_feature_aarch64_mte (tdesc.get (), regnum);
/* TLS registers. */
if (features.tls > 0)
regnum = create_feature_aarch64_tls (tdesc.get (), regnum, features.tls);
if (features.svq)
regnum = create_feature_aarch64_sme (tdesc.get (), regnum,
sve_vl_from_vq (features.svq));
if (features.sme2)
regnum = create_feature_aarch64_sme2 (tdesc.get (), regnum);
if (features.gcs)
regnum = create_feature_aarch64_gcs (tdesc.get (), regnum);
if (features.gcs_linux)
regnum = create_feature_aarch64_gcs_linux (tdesc.get (), regnum);
return tdesc.release ();
}
/* See arch/aarch64.h. */
CORE_ADDR
aarch64_remove_top_bits (CORE_ADDR pointer, CORE_ADDR mask)
{
/* The VA range select bit is 55. This bit tells us if we have a
kernel-space address or a user-space address. */
bool kernel_address = (pointer & VA_RANGE_SELECT_BIT_MASK) != 0;
/* Remove the top non-address bits. */
pointer &= ~mask;
/* Sign-extend if we have a kernel-space address. */
if (kernel_address)
pointer |= mask;
return pointer;
}
/* See arch/aarch64.h. */
CORE_ADDR
aarch64_mask_from_pac_registers (const CORE_ADDR cmask, const CORE_ADDR dmask)
{
/* If the masks differ, default to using the one with the most coverage. */
if (dmask != cmask)
return dmask > cmask ? dmask : cmask;
return cmask;
}