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avr, kvx, metag, mn10300, nds32, v850, visium, and wasm32 targets defined HANDLE_ALIGN without defining MAX_MEM_FOR_RS_ALIGN_CODE. This can result in a rather large chunk of memory being allocated. Fix that by a combination of changing the default allocation to one byte and/or defining a target MAX_MEM_FOR_RS_ALIGN_CODE. arm wanted to write out the entire set of nops, and limited allowed code alignment to 64 bytes to prevent large memory allocations. Fix that by making use of the fact that rs_align_code frags repeat fr_var bytes at fr_literal + fr_fix to fill out the required area. Fix metag, nds32 and kvx too, which it seems copied either arm or x86 in similarly not making use of repeating patterns. It's worth mentioning that my tidy to kvx changed the order of nop bundles, placing a short bundle first rather than last. epiphany was totally broken in that uninitialised data was written out for any alignment requiring more than three bytes of fill. ppc created a new frag to handle a branch over a large number of nops. This saves 4 bytes per rs_align_code frag, and most times the branch isn't used so it is generally a win for memory usage, but I figured the extra code complexity wasn't worth it. So that code of mine goes. visium copied the same scheme, so that goes too. This leaves x86 as the only target making large allocations for alignment frags. * frags.c (MAX_MEM_FOR_RS_ALIGN_CODE): Default to 1. * config/tc-aarch64.c (aarch64_handle_align): Remove always true condition. * config/tc-aarch64.h (MAX_MEM_FOR_RS_ALIGN_CODE): Move to be adjacent to HANDLE_ALIGN define. * config/tc-arm.c (arm_handle_align): Allow alignment of more than MAX_MEM_FOR_RS_ALIGN_CODE bytes. Just write one repeat of nop pattern to frag. (arm_frag_align_code): Delete function. * config/tc-arm.h (MAX_MEM_ALIGNMENT_BYTES): Don't define. (MAX_MEM_FOR_RS_ALIGN_CODE): Set to 7. (md_do_align): Don't define. (arm_frag_align_code): Don't declare. * config/tc-epiphany.c (epiphany_handle_align): Correct frag so that nop_pattern repeats rather than random data. * config/tc-epiphany.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. * config/tc-kvx.c (kvx_make_nops): Merge into.. (kvx_handle_align): ..here. Put short nop bundle first, followed by repeated full nop bundle. * config/tc-kvx.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. * config/tc-m32c.h (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): Don't define. * config/tc-metag.c (metag_handle_align): Just write one repeat of nop pattern to frag. * config/tc-metag.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. * config/tc-nds32.c (nds32_handle_align): Just write one repeat of nop pattern to frag. * config/tc-nds32.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. * config/tc-ppc.c (ppc_handle_align): Don't make a new frag for branch. * config/tc-ppc.h (MAX_MEM_FOR_RS_ALIGN_CODE): Increase to 8. * config/tc-visium.c (visium_handle_align): Don't make a new frag for branch. * config/tc-visium.h (MAX_MEM_FOR_RS_ALIGN_CODE): Define. * config/tc-wasm32.h (HANDLE_ALIGN): Don't define. * testsuite/gas/epiphany/nop.d, * testsuite/gas/epiphany/nop.s: New test. * testsuite/gas/epiphany/allinsn.exp: Run it. * testsuite/gas/kvx/nop-align.d: Adjust.
82 lines
2.9 KiB
C
82 lines
2.9 KiB
C
/* tc-m32c.h -- Header file for tc-m32c.c.
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Copyright (C) 2004-2025 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#define TC_M32C
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#define LISTING_HEADER "M16C/M32C GAS "
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/* The target BFD architecture. */
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#define TARGET_ARCH bfd_arch_m32c
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#define TARGET_FORMAT "elf32-m32c"
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#define TARGET_BYTES_BIG_ENDIAN 0
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#define md_start_line_hook m32c_start_line_hook
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extern void m32c_start_line_hook (void);
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/* Permit temporary numeric labels. */
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#define LOCAL_LABELS_FB 1
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#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */
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/* We don't need to handle .word strangely. */
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#define WORKING_DOT_WORD
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#define md_apply_fix m32c_apply_fix
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extern void m32c_apply_fix (struct fix *, valueT *, segT);
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#define tc_fix_adjustable(fixP) m32c_fix_adjustable (fixP)
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extern bool m32c_fix_adjustable (struct fix *);
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/* When relaxing, we need to emit various relocs we otherwise wouldn't. */
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#define TC_FORCE_RELOCATION(fix) m32c_force_relocation (fix)
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extern int m32c_force_relocation (struct fix *);
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#define TC_CONS_FIX_NEW(FRAG, WHERE, NBYTES, EXP, RELOC) \
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m32c_cons_fix_new (FRAG, WHERE, NBYTES, EXP, RELOC)
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extern void m32c_cons_fix_new (fragS *, int, int, expressionS *,
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bfd_reloc_code_real_type);
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extern const struct relax_type md_relax_table[];
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#define TC_GENERIC_RELAX_TABLE md_relax_table
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extern void m32c_prepare_relax_scan (fragS *, offsetT *, relax_substateT);
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#define md_prepare_relax_scan(FRAGP, ADDR, AIM, STATE, TYPE) \
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m32c_prepare_relax_scan(FRAGP, &AIM, STATE)
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/* Values passed to md_apply_fix don't include the symbol value. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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/* Call md_pcrel_from_section(), not md_pcrel_from(). */
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#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section (FIXP, SEC)
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/* We need a special version of the TC_START_LABEL macro so that we
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allow the :Z, :S, :Q and :G suffixes to be
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parsed as such. We need to be able to change the contents of the
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var storing what was at the NUL delimiter. */
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#define TC_START_LABEL(STR, NUL_CHAR, NEXT_CHAR) \
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(NEXT_CHAR == ':' && !m32c_is_colon_insn (STR, &NUL_CHAR))
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extern int m32c_is_colon_insn (char *, char *);
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#define H_TICK_HEX 1
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#define NOP_OPCODE (bfd_get_mach (stdoutput) == bfd_mach_m32c ? 0xde : 0x04)
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