2015-09-22 Andrew Pinski <apinski@cavium.com>

* elfxx-aarch64.c (_bfd_aarch64_elf_grok_prstatus):
	Add ILP32 sized prstatus.
	(_bfd_aarch64_elf_grok_psinfo): Likewise.

bfd/ChangeLog

@@ -1,3 +1,17 @@
+2015-09-22  Andrew Pinski  <apinski@cavium.com>
+
+	* elfxx-aarch64.c (_bfd_aarch64_elf_grok_prstatus):
+	Add ILP32 sized prstatus.
+	(_bfd_aarch64_elf_grok_psinfo): Likewise.
+
+2015-09-07  Andrew Pinski  <apinski@cavium.com>
+
+	* cpu-aarch64.c (compatible):
+	Don't reject different mach or ILP32 here.
+	* elfnn-aarch64.c (elfNN_aarch64_merge_private_bfd_data):
+	Add an error message on why endianess is rejected.
+	Reject different ILP32/LP64 settings.
+
 2015-09-03  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* elf64-x86-64.c (elf_x86_64_convert_mov_to_lea): Remove

bfd/cpu-aarch64.c

@@ -34,31 +34,9 @@ compatible (const bfd_arch_info_type * a, const bfd_arch_info_type * b)
   if (a->arch != b->arch)
     return NULL;
 
-  /* If a & b are for the same machine then all is well.  */
+  /* Machine compatibility is checked in
-  if (a->mach == b->mach)
+     elfNN_aarch64_merge_private_bfd_data.  */
-    return a;
+  return a;
-
-  /* Don't allow mixing ilp32 with lp64.  */
-  if ((a->mach & bfd_mach_aarch64_ilp32) != (b->mach & bfd_mach_aarch64_ilp32))
-    return NULL;
-
-  /* Otherwise if either a or b is the 'default' machine
-     then it can be polymorphed into the other.  */
-  if (a->the_default)
-    return b;
-
-  if (b->the_default)
-    return a;
-
-  /* So far all newer cores are
-     supersets of previous cores.  */
-  if (a->mach < b->mach)
-    return b;
-  else if (a->mach > b->mach)
-    return a;
-
-  /* Never reached!  */
-  return NULL;
 }
 
 static struct

bfd/elfnn-aarch64.c

@@ -6141,11 +6141,26 @@ elfNN_aarch64_merge_private_bfd_data (bfd *ibfd, bfd *obfd)
 
   /* Check if we have the same endianess.  */
   if (!_bfd_generic_verify_endian_match (ibfd, obfd))
-    return FALSE;
+    {
+      (*_bfd_error_handler)
+	(_("%B: endianness incompatible with that of the selected emulation"),
+	 ibfd);
+      return FALSE;
+    }
 
   if (!is_aarch64_elf (ibfd) || !is_aarch64_elf (obfd))
     return TRUE;
 
+  /* Don't allow mixing ilp32 with lp64.  */
+  if ((bfd_get_arch_info (ibfd)->mach & bfd_mach_aarch64_ilp32)
+      != (bfd_get_arch_info (obfd)->mach & bfd_mach_aarch64_ilp32))
+    {
+      (*_bfd_error_handler)
+	(_("%B: ABI is incompatible with that of the selected emulation: \"%s\" != \"%s\""),
+	 ibfd, bfd_get_target (ibfd), bfd_get_target (obfd));
+      return FALSE;
+    }
+
   /* The input BFD must have had its flags initialised.  */
   /* The following seems bogus to me -- The flags are initialized in
      the assembler but I don't think an elf_flags_init field is

bfd/elfxx-aarch64.c

@@ -556,6 +556,22 @@ _bfd_aarch64_elf_grok_prstatus (bfd *abfd, Elf_Internal_Note *note)
 	size = 272;
 
 	break;
+
+      case 352:		/* sizeof(struct elf_prstatus) on Linux/arm64_ilp32.  */
+	/* pr_cursig */
+	elf_tdata (abfd)->core->signal
+	  = bfd_get_16 (abfd, note->descdata + 12);
+
+	/* pr_pid */
+	elf_tdata (abfd)->core->lwpid
+	  = bfd_get_32 (abfd, note->descdata + 32);
+
+	/* pr_reg */
+	offset = 72;
+	size = 272;
+
+	break;
+
     }
 
   /* Make a ".reg/999" section.  */
@@ -577,6 +593,15 @@ _bfd_aarch64_elf_grok_psinfo (bfd *abfd, Elf_Internal_Note *note)
 	= _bfd_elfcore_strndup (abfd, note->descdata + 40, 16);
       elf_tdata (abfd)->core->command
 	= _bfd_elfcore_strndup (abfd, note->descdata + 56, 80);
+      break;
+
+    case 124:        /* This is sizeof(struct elf_prpsinfo) on Linux/aarch64_ilp32.  */
+      elf_tdata (abfd)->core->pid = bfd_get_32 (abfd, note->descdata + 12);
+      elf_tdata (abfd)->core->program
+	= _bfd_elfcore_strndup (abfd, note->descdata + 28, 16);
+      elf_tdata (abfd)->core->command
+	= _bfd_elfcore_strndup (abfd, note->descdata + 44, 80);
+      break;
     }
 
   /* Note that for some reason, a spurious space is tacked
@@ -598,6 +623,7 @@ char *
 _bfd_aarch64_elf_write_core_note (bfd *abfd, char *buf, int *bufsiz, int note_type,
 				  ...)
 {
+  /* TODO ILP32 support. */
   switch (note_type)
     {
     default:

gdb/ChangeLog

@@ -1,3 +1,12 @@
+2015-09-07  Andrew Pinski  <apinski@cavium.com>
+
+	* aarch64-tdep.h (gdbarch_tdep): Add ilp32 field.
+	* aarch64-tdep.c (aarch64_gdbarch_init): Setup ILP32 support.
+	Make sure the gdbarches have compatible ilp32 flags.
+	Set long and ptr sizes correctly for ilp32. 
+	* aarch64-linux-tdep.c (aarch64_linux_init_abi):
+	Add support for ILP32.
+
 2015-09-04  Andrew Burgess  <andrew.burgess@embecosm.com>
 
 	* tui/tui-data.c (win_with_focus): Remove cast of NULL pointer.

gdb/aarch64-linux-tdep.c

@@ -952,8 +952,12 @@ aarch64_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 
   linux_init_abi (info, gdbarch);
 
-  set_solib_svr4_fetch_link_map_offsets (gdbarch,
+  if (tdep->ilp32)
-					 svr4_lp64_fetch_link_map_offsets);
+    set_solib_svr4_fetch_link_map_offsets (gdbarch,
+					   svr4_ilp32_fetch_link_map_offsets);
+  else
+    set_solib_svr4_fetch_link_map_offsets (gdbarch,
+					   svr4_lp64_fetch_link_map_offsets);
 
   /* Enable TLS support.  */
   set_gdbarch_fetch_tls_load_module_address (gdbarch,

gdb/aarch64-tdep.c

@@ -2705,6 +2705,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   const struct tdesc_feature *feature;
   int num_regs = 0;
   int num_pseudo_regs = 0;
+  char ilp32 = FALSE;
 
   /* Ensure we always have a target descriptor.  */
   if (!tdesc_has_registers (tdesc))
@@ -2754,6 +2755,11 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
       return NULL;
     }
 
+  if (info.abfd
+      && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour
+      && elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS32)
+    ilp32 = TRUE;
+
   /* AArch64 code is always little-endian.  */
   info.byte_order_for_code = BFD_ENDIAN_LITTLE;
 
@@ -2762,6 +2768,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
        best_arch != NULL;
        best_arch = gdbarch_list_lookup_by_info (best_arch->next, &info))
     {
+      /* ILP32 and LP64 are incompatible. */
+      if (gdbarch_tdep (arches->gdbarch)->ilp32 != ilp32)
+	continue;
       /* Found a match.  */
       break;
     }
@@ -2780,6 +2789,7 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   tdep->lowest_pc = 0x20;
   tdep->jb_pc = -1;		/* Longjump support not enabled by default.  */
   tdep->jb_elt_size = 8;
+  tdep->ilp32 = ilp32;
 
   set_gdbarch_push_dummy_call (gdbarch, aarch64_push_dummy_call);
   set_gdbarch_frame_align (gdbarch, aarch64_frame_align);
@@ -2819,9 +2829,9 @@ aarch64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
   set_gdbarch_float_bit (gdbarch, 32);
   set_gdbarch_double_bit (gdbarch, 64);
   set_gdbarch_long_double_bit (gdbarch, 128);
-  set_gdbarch_long_bit (gdbarch, 64);
+  set_gdbarch_long_bit (gdbarch, ilp32 ? 32 : 64);
   set_gdbarch_long_long_bit (gdbarch, 64);
-  set_gdbarch_ptr_bit (gdbarch, 64);
+  set_gdbarch_ptr_bit (gdbarch, ilp32 ? 32 : 64);
   set_gdbarch_char_signed (gdbarch, 0);
   set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
   set_gdbarch_double_format (gdbarch, floatformats_ieee_double);

gdb/aarch64-tdep.h

@@ -91,6 +91,10 @@ struct gdbarch_tdep
 
   /* syscall record.  */
   int (*aarch64_syscall_record) (struct regcache *regcache, unsigned long svc_number);
+
+  /* If this is ILP32 or LP64.  */
+  char ilp32;
+
 };
 
 extern struct target_desc *tdesc_aarch64;

gdb/testsuite/ChangeLog

@@ -1,3 +1,8 @@
+2015-09-19  Andrew Pinski  <apinski@cavium.com>
+
+	* gdb.arch/aarch64-atomic-inst.c: Use unsigned long long
+	instead of unsigned long to fix for ILP32.
+
 2015-09-03  Pierre-Marie de Rodat  <derodat@adacore.com>
 
 	* gdb.ada/funcall_char.exp: New testcase.

gdb/testsuite/gdb.arch/aarch64-atomic-inst.c

@@ -17,8 +17,8 @@
 
 int main(void)
 {
-  unsigned long tmp, cond;
+  unsigned long long tmp, cond;
-  unsigned long dword = 0;
+  unsigned long long dword = 0;
 
   /* Test that we can step over ldxr/stxr. This sequence should step from
      ldxr to the following __asm __volatile.  */