libopcodes/mips: add support for disassembler styling

This commit adds disassembler styling support for MIPS.  After this
commit objdump and GDB will style disassembler output.

This is a pretty straight forward change, we switch to use the
disassemble_info::fprintf_styled_func callback, and pass an
appropriate style through as needed.  No additional tricks were
needed (compared to say i386, or ARM).

Tested by running all of the objdump commands used by the gas
testsuite and manually inspecting the styled output, everything looks
reasonable, though I'm not a MIPS expert, so it is possible that I've
missed some corner cases.  Worst case though is that something will be
styled incorrectly, the actual content should be unchanged.

All the gas, ld, and binutils tests still pass for me.

binutils/testsuite/binutils-all/mips/mips-ase-1.d

@@ -22,7 +22,7 @@ FLAGS 1: .*
 FLAGS 2: .*
 
 Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 7aa2080b 	0x7aa2080b
+[0-9a-f]+ <[^>]*> 7aa2080b 	.word	0x7aa2080b
 [0-9a-f]+ <[^>]*> 46c520c0 	add\.ps	\$f3,\$f4,\$f5
 [0-9a-f]+ <[^>]*> 46c83998 	addr\.ps	\$f6,\$f7,\$f8
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips-xpa-virt-1.d

@@ -8,6 +8,6 @@
 Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 40020800 	mfc0	v0,c0_random
 [0-9a-f]+ <[^>]*> 40420800 	cfc0	v0,\$1
-[0-9a-f]+ <[^>]*> 40620800 	0x40620800
+[0-9a-f]+ <[^>]*> 40620800 	.word	0x40620800
-[0-9a-f]+ <[^>]*> 40620c00 	0x40620c00
+[0-9a-f]+ <[^>]*> 40620c00 	.word	0x40620c00
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips-xpa-virt-2.d

@@ -8,6 +8,6 @@
 Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 40020800 	mfc0	v0,c0_random
 [0-9a-f]+ <[^>]*> 40420800 	mfhc0	v0,c0_random
-[0-9a-f]+ <[^>]*> 40620800 	0x40620800
+[0-9a-f]+ <[^>]*> 40620800 	.word	0x40620800
-[0-9a-f]+ <[^>]*> 40620c00 	0x40620c00
+[0-9a-f]+ <[^>]*> 40620c00 	.word	0x40620c00
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips-xpa-virt-3.d

@@ -9,5 +9,5 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 40020800 	mfc0	v0,c0_random
 [0-9a-f]+ <[^>]*> 40420800 	cfc0	v0,\$1
 [0-9a-f]+ <[^>]*> 40620800 	mfgc0	v0,c0_random
-[0-9a-f]+ <[^>]*> 40620c00 	0x40620c00
+[0-9a-f]+ <[^>]*> 40620c00 	.word	0x40620c00
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips1-branch-alias.d

@@ -12,6 +12,6 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 04100000 	bltzal	zero,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 10200000 	beqz	at,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 14200000 	bnez	at,[0-9a-f]+ <[^>]*>
-[0-9a-f]+ <[^>]*> 50200000 	0x50200000
+[0-9a-f]+ <[^>]*> 50200000 	.word	0x50200000
-[0-9a-f]+ <[^>]*> 54200000 	0x54200000
+[0-9a-f]+ <[^>]*> 54200000 	.word	0x54200000
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips1-branch-noalias.d

@@ -12,6 +12,6 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 04100000 	bltzal	zero,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 10200000 	beq	at,zero,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 14200000 	bne	at,zero,[0-9a-f]+ <[^>]*>
-[0-9a-f]+ <[^>]*> 50200000 	0x50200000
+[0-9a-f]+ <[^>]*> 50200000 	.word	0x50200000
-[0-9a-f]+ <[^>]*> 54200000 	0x54200000
+[0-9a-f]+ <[^>]*> 54200000 	.word	0x54200000
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips16-extend-noinsn.d

@@ -17,22 +17,22 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 1c00 0000 	jalx	00000000 <foo>
 [0-9a-f]+ <[^>]*> 6500      	nop
 [0-9a-f]+ <[^>]*> f123      	extend	0x123
-[0-9a-f]+ <[^>]*> 6621      	0x6621
+[0-9a-f]+ <[^>]*> 6621      	.short	0x6621
 [0-9a-f]+ <[^>]*> f456      	extend	0x456
-[0-9a-f]+ <[^>]*> e935      	0xe935
+[0-9a-f]+ <[^>]*> e935      	.short	0xe935
 [0-9a-f]+ <[^>]*> f765      	extend	0x765
-[0-9a-f]+ <[^>]*> ea60      	0xea60
+[0-9a-f]+ <[^>]*> ea60      	.short	0xea60
 [0-9a-f]+ <[^>]*> f432      	extend	0x432
-[0-9a-f]+ <[^>]*> ece0      	0xece0
+[0-9a-f]+ <[^>]*> ece0      	.short	0xece0
 [0-9a-f]+ <[^>]*> f5aa      	extend	0x5aa
-[0-9a-f]+ <[^>]*> e971      	0xe971
+[0-9a-f]+ <[^>]*> e971      	.short	0xe971
 [0-9a-f]+ <[^>]*> f655      	extend	0x655
-[0-9a-f]+ <[^>]*> ebf1      	0xebf1
+[0-9a-f]+ <[^>]*> ebf1      	.short	0xebf1
-[0-9a-f]+ <[^>]*> 6621      	0x6621
+[0-9a-f]+ <[^>]*> 6621      	.short	0x6621
-[0-9a-f]+ <[^>]*> e935      	0xe935
+[0-9a-f]+ <[^>]*> e935      	.short	0xe935
-[0-9a-f]+ <[^>]*> ea60      	0xea60
+[0-9a-f]+ <[^>]*> ea60      	.short	0xea60
-[0-9a-f]+ <[^>]*> ece0      	0xece0
+[0-9a-f]+ <[^>]*> ece0      	.short	0xece0
-[0-9a-f]+ <[^>]*> e971      	0xe971
+[0-9a-f]+ <[^>]*> e971      	.short	0xe971
-[0-9a-f]+ <[^>]*> ebf1      	0xebf1
+[0-9a-f]+ <[^>]*> ebf1      	.short	0xebf1
 [0-9a-f]+ <[^>]*> 6500      	nop
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips16-pcrel.d

@@ -108,21 +108,21 @@ Disassembly of section \.text:
 00005020 <[^>]*> fcbf      	ld	a1,00005110 <foo5\+0x110>
 	\.\.\.
 00006000 <[^>]*> 6500      	nop
-00006002 <[^>]*> e860      	0xe860
+00006002 <[^>]*> e860      	.short	0xe860
 00006004 <[^>]*> 0aff      	la	v0,00006400 <foo6\+0x400>
 00006006 <[^>]*> 6500      	nop
 00006008 <[^>]*> 6500      	nop
-0000600a <[^>]*> e860      	0xe860
+0000600a <[^>]*> e860      	.short	0xe860
 0000600c <[^>]*> b3ff      	lw	v1,00006408 <foo6\+0x408>
 0000600e <[^>]*> 6500      	nop
 00006010 <[^>]*> 6500      	nop
-00006012 <[^>]*> e860      	0xe860
+00006012 <[^>]*> e860      	.short	0xe860
 00006014 <[^>]*> fe9f      	dla	a0,00006090 <foo6\+0x90>
 00006016 <[^>]*> 6500      	nop
 00006018 <[^>]*> 6500      	nop
 0000601a <[^>]*> 6500      	nop
 0000601c <[^>]*> 6500      	nop
-0000601e <[^>]*> e860      	0xe860
+0000601e <[^>]*> e860      	.short	0xe860
 00006020 <[^>]*> fcbf      	ld	a1,00006118 <foo6\+0x118>
 	\.\.\.
 00007000 <[^>]*> 6500      	nop
@@ -180,20 +180,20 @@ Disassembly of section \.text:
 00009020 <[^>]*> fcbf      	ld	a1,00009118 <foo9\+0x118>
 	\.\.\.
 0000a000 <[^>]*> 6500      	nop
-0000a002 <[^>]*> e960      	0xe960
+0000a002 <[^>]*> e960      	.short	0xe960
 0000a004 <[^>]*> 0aff      	la	v0,0000a400 <fooa\+0x400>
 0000a006 <[^>]*> 6500      	nop
 0000a008 <[^>]*> 6500      	nop
-0000a00a <[^>]*> e960      	0xe960
+0000a00a <[^>]*> e960      	.short	0xe960
 0000a00c <[^>]*> b3ff      	lw	v1,0000a408 <fooa\+0x408>
 0000a00e <[^>]*> 6500      	nop
 0000a010 <[^>]*> 6500      	nop
-0000a012 <[^>]*> e960      	0xe960
+0000a012 <[^>]*> e960      	.short	0xe960
 0000a014 <[^>]*> fe9f      	dla	a0,0000a090 <fooa\+0x90>
 0000a016 <[^>]*> 6500      	nop
 0000a018 <[^>]*> 6500      	nop
 0000a01a <[^>]*> 6500      	nop
 0000a01c <[^>]*> 6500      	nop
-0000a01e <[^>]*> e960      	0xe960
+0000a01e <[^>]*> e960      	.short	0xe960
 0000a020 <[^>]*> fcbf      	ld	a1,0000a118 <fooa\+0x118>
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips32r6-branch-alias.d

@@ -12,6 +12,6 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 04100000 	nal
 [0-9a-f]+ <[^>]*> 10200000 	beqz	at,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 14200000 	bnez	at,[0-9a-f]+ <[^>]*>
-[0-9a-f]+ <[^>]*> 50200000 	0x50200000
+[0-9a-f]+ <[^>]*> 50200000 	.word	0x50200000
-[0-9a-f]+ <[^>]*> 54200000 	0x54200000
+[0-9a-f]+ <[^>]*> 54200000 	.word	0x54200000
 	\.\.\.

binutils/testsuite/binutils-all/mips/mips32r6-branch-noalias.d

@@ -12,6 +12,6 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 04100000 	nal
 [0-9a-f]+ <[^>]*> 10200000 	beq	at,zero,[0-9a-f]+ <[^>]*>
 [0-9a-f]+ <[^>]*> 14200000 	bne	at,zero,[0-9a-f]+ <[^>]*>
-[0-9a-f]+ <[^>]*> 50200000 	0x50200000
+[0-9a-f]+ <[^>]*> 50200000 	.word	0x50200000
-[0-9a-f]+ <[^>]*> 54200000 	0x54200000
+[0-9a-f]+ <[^>]*> 54200000 	.word	0x54200000
 	\.\.\.

gas/testsuite/gas/mips/interaptiv-mr2@mcu.d

@@ -9,102 +9,102 @@ Disassembly of section \.text:
 
 [0-9a-f]+ <foo>:
 [ 0-9a-f]+:	42000038 	c0	0x38
-[ 0-9a-f]+:	04070000 	0x4070000
+[ 0-9a-f]+:	04070000 	.word	0x4070000
-[ 0-9a-f]+:	04070000 	0x4070000
+[ 0-9a-f]+:	04070000 	.word	0x4070000
-[ 0-9a-f]+:	04070000 	0x4070000
+[ 0-9a-f]+:	04070000 	.word	0x4070000
-[ 0-9a-f]+:	04071000 	0x4071000
+[ 0-9a-f]+:	04071000 	.word	0x4071000
-[ 0-9a-f]+:	04072000 	0x4072000
+[ 0-9a-f]+:	04072000 	.word	0x4072000
-[ 0-9a-f]+:	04073000 	0x4073000
+[ 0-9a-f]+:	04073000 	.word	0x4073000
-[ 0-9a-f]+:	04074000 	0x4074000
+[ 0-9a-f]+:	04074000 	.word	0x4074000
-[ 0-9a-f]+:	04075000 	0x4075000
+[ 0-9a-f]+:	04075000 	.word	0x4075000
-[ 0-9a-f]+:	04076000 	0x4076000
+[ 0-9a-f]+:	04076000 	.word	0x4076000
-[ 0-9a-f]+:	04077000 	0x4077000
+[ 0-9a-f]+:	04077000 	.word	0x4077000
-[ 0-9a-f]+:	04477000 	0x4477000
+[ 0-9a-f]+:	04477000 	.word	0x4477000
-[ 0-9a-f]+:	07e77000 	0x7e77000
+[ 0-9a-f]+:	07e77000 	.word	0x7e77000
-[ 0-9a-f]+:	07e777ff 	0x7e777ff
+[ 0-9a-f]+:	07e777ff 	.word	0x7e777ff
-[ 0-9a-f]+:	07e77800 	0x7e77800
+[ 0-9a-f]+:	07e77800 	.word	0x7e77800
 [ 0-9a-f]+:	27e10800 	addiu	at,ra,2048
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	27e1f7ff 	addiu	at,ra,-2049
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	27e17fff 	addiu	at,ra,32767
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	27e18000 	addiu	at,ra,-32768
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	3c010001 	lui	at,0x1
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	04277fff 	0x4277fff
+[ 0-9a-f]+:	04277fff 	.word	0x4277fff
 [ 0-9a-f]+:	3c010001 	lui	at,0x1
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	3c01ffff 	lui	at,0xffff
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	24818000 	addiu	at,a0,-32768
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	3c01ffff 	lui	at,0xffff
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	04277001 	0x4277001
+[ 0-9a-f]+:	04277001 	.word	0x4277001
 [ 0-9a-f]+:	24818001 	addiu	at,a0,-32767
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
 [ 0-9a-f]+:	3c01f000 	lui	at,0xf000
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	04277000 	0x4277000
+[ 0-9a-f]+:	04277000 	.word	0x4277000
-[ 0-9a-f]+:	04877fff 	0x4877fff
+[ 0-9a-f]+:	04877fff 	.word	0x4877fff
 [ 0-9a-f]+:	3c011234 	lui	at,0x1234
 [ 0-9a-f]+:	34215000 	ori	at,at,0x5000
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	04277678 	0x4277678
+[ 0-9a-f]+:	04277678 	.word	0x4277678
 [ 0-9a-f]+:	24610000 	addiu	at,v1,0
 [ 	]*[0-9a-f]+: R_MIPS_LO16	foo
-[ 0-9a-f]+:	04271000 	0x4271000
+[ 0-9a-f]+:	04271000 	.word	0x4271000
 [ 0-9a-f]+:	24610000 	addiu	at,v1,0
 [ 	]*[0-9a-f]+: R_MIPS_LO16	foo
-[ 0-9a-f]+:	04279000 	0x4279000
+[ 0-9a-f]+:	04279000 	.word	0x4279000
-[ 0-9a-f]+:	04078000 	0x4078000
+[ 0-9a-f]+:	04078000 	.word	0x4078000
-[ 0-9a-f]+:	04078000 	0x4078000
+[ 0-9a-f]+:	04078000 	.word	0x4078000
-[ 0-9a-f]+:	04078000 	0x4078000
+[ 0-9a-f]+:	04078000 	.word	0x4078000
-[ 0-9a-f]+:	04079000 	0x4079000
+[ 0-9a-f]+:	04079000 	.word	0x4079000
-[ 0-9a-f]+:	0407a000 	0x407a000
+[ 0-9a-f]+:	0407a000 	.word	0x407a000
-[ 0-9a-f]+:	0407b000 	0x407b000
+[ 0-9a-f]+:	0407b000 	.word	0x407b000
-[ 0-9a-f]+:	0407c000 	0x407c000
+[ 0-9a-f]+:	0407c000 	.word	0x407c000
-[ 0-9a-f]+:	0407d000 	0x407d000
+[ 0-9a-f]+:	0407d000 	.word	0x407d000
-[ 0-9a-f]+:	0407e000 	0x407e000
+[ 0-9a-f]+:	0407e000 	.word	0x407e000
-[ 0-9a-f]+:	0407f000 	0x407f000
+[ 0-9a-f]+:	0407f000 	.word	0x407f000
-[ 0-9a-f]+:	0447f000 	0x447f000
+[ 0-9a-f]+:	0447f000 	.word	0x447f000
-[ 0-9a-f]+:	07e7f000 	0x7e7f000
+[ 0-9a-f]+:	07e7f000 	.word	0x7e7f000
-[ 0-9a-f]+:	07e7f7ff 	0x7e7f7ff
+[ 0-9a-f]+:	07e7f7ff 	.word	0x7e7f7ff
-[ 0-9a-f]+:	07e7f800 	0x7e7f800
+[ 0-9a-f]+:	07e7f800 	.word	0x7e7f800
 [ 0-9a-f]+:	27e10800 	addiu	at,ra,2048
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	27e1f7ff 	addiu	at,ra,-2049
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	27e17fff 	addiu	at,ra,32767
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	27e18000 	addiu	at,ra,-32768
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	3c010001 	lui	at,0x1
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	0427ffff 	0x427ffff
+[ 0-9a-f]+:	0427ffff 	.word	0x427ffff
 [ 0-9a-f]+:	3c010001 	lui	at,0x1
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	3c01ffff 	lui	at,0xffff
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	24818000 	addiu	at,a0,-32768
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	3c01ffff 	lui	at,0xffff
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	0427f001 	0x427f001
+[ 0-9a-f]+:	0427f001 	.word	0x427f001
 [ 0-9a-f]+:	24818001 	addiu	at,a0,-32767
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
 [ 0-9a-f]+:	3c01f000 	lui	at,0xf000
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	0427f000 	0x427f000
+[ 0-9a-f]+:	0427f000 	.word	0x427f000
-[ 0-9a-f]+:	0487ffff 	0x487ffff
+[ 0-9a-f]+:	0487ffff 	.word	0x487ffff
 [ 0-9a-f]+:	3c011234 	lui	at,0x1234
 [ 0-9a-f]+:	34215000 	ori	at,at,0x5000
 [ 0-9a-f]+:	00240821 	addu	at,at,a0
-[ 0-9a-f]+:	0427f678 	0x427f678
+[ 0-9a-f]+:	0427f678 	.word	0x427f678
 	\.\.\.

gas/testsuite/gas/mips/mips16-32@mips16-asmacro.d

@@ -6,15 +6,15 @@
 
 Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> e000      	0xe000
+[0-9a-f]+ <[^>]*> e000      	.short	0xe000
 [0-9a-f]+ <[^>]*> f0a4      	extend	0xa4
 [0-9a-f]+ <[^>]*> e341      	addu	s0,v1,v0
 [0-9a-f]+ <[^>]*> f0e0      	extend	0xe0
 [0-9a-f]+ <[^>]*> e71f      	subu	a3,s0
 [0-9a-f]+ <[^>]*> f501      	extend	0x501
-[0-9a-f]+ <[^>]*> e264      	0xe264
+[0-9a-f]+ <[^>]*> e264      	.short	0xe264
 [0-9a-f]+ <[^>]*> f71f      	extend	0x71f
-[0-9a-f]+ <[^>]*> e0e0      	0xe0e0
+[0-9a-f]+ <[^>]*> e0e0      	.short	0xe0e0
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
 [0-9a-f]+ <[^>]*> e7ff      	subu	a3,a3
 	\.\.\.

gas/testsuite/gas/mips/mips16-32@mips16-sub.d

@@ -7,158 +7,158 @@
 
 Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 00000000 	nop
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 3b41      	0x3b41
+[0-9a-f]+ <[^>]*> 3b41      	.short	0x3b41
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 3b42      	0x3b42
+[0-9a-f]+ <[^>]*> 3b42      	.short	0x3b42
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 3b43      	0x3b43
+[0-9a-f]+ <[^>]*> 3b43      	.short	0x3b43
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 3b44      	0x3b44
+[0-9a-f]+ <[^>]*> 3b44      	.short	0x3b44
-[0-9a-f]+ <[^>]*> 3b41      	0x3b41
+[0-9a-f]+ <[^>]*> 3b41      	.short	0x3b41
-[0-9a-f]+ <[^>]*> 3b42      	0x3b42
+[0-9a-f]+ <[^>]*> 3b42      	.short	0x3b42
-[0-9a-f]+ <[^>]*> 3b44      	0x3b44
+[0-9a-f]+ <[^>]*> 3b44      	.short	0x3b44
-[0-9a-f]+ <[^>]*> 3b48      	0x3b48
+[0-9a-f]+ <[^>]*> 3b48      	.short	0x3b48
-[0-9a-f]+ <[^>]*> 3b50      	0x3b50
+[0-9a-f]+ <[^>]*> 3b50      	.short	0x3b50
 [0-9a-f]+ <[^>]*> f100      	extend	0x100
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f200      	extend	0x200
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f400      	extend	0x400
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f001      	extend	0x1
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 3b5f      	0x3b5f
+[0-9a-f]+ <[^>]*> 3b5f      	.short	0x3b5f
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 3b5e      	0x3b5e
+[0-9a-f]+ <[^>]*> 3b5e      	.short	0x3b5e
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 3b5d      	0x3b5d
+[0-9a-f]+ <[^>]*> 3b5d      	.short	0x3b5d
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 3b5c      	0x3b5c
+[0-9a-f]+ <[^>]*> 3b5c      	.short	0x3b5c
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 3b58      	0x3b58
+[0-9a-f]+ <[^>]*> 3b58      	.short	0x3b58
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 3b50      	0x3b50
+[0-9a-f]+ <[^>]*> 3b50      	.short	0x3b50
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f7df      	extend	0x7df
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f71f      	extend	0x71f
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f61f      	extend	0x61f
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f41f      	extend	0x41f
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f01f      	extend	0x1f
-[0-9a-f]+ <[^>]*> 3b40      	0x3b40
+[0-9a-f]+ <[^>]*> 3b40      	.short	0x3b40
 [0-9a-f]+ <[^>]*> f7bf      	extend	0x7bf
-[0-9a-f]+ <[^>]*> fc40      	0xfc40
+[0-9a-f]+ <[^>]*> fc40      	.short	0xfc40
 [0-9a-f]+ <[^>]*> f6a0      	extend	0x6a0
-[0-9a-f]+ <[^>]*> fc54      	0xfc54
+[0-9a-f]+ <[^>]*> fc54      	.short	0xfc54
 [0-9a-f]+ <[^>]*> f001      	extend	0x1
-[0-9a-f]+ <[^>]*> fc40      	0xfc40
+[0-9a-f]+ <[^>]*> fc40      	.short	0xfc40
 [0-9a-f]+ <[^>]*> f0c1      	extend	0xc1
-[0-9a-f]+ <[^>]*> fc40      	0xfc40
+[0-9a-f]+ <[^>]*> fc40      	.short	0xfc40
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f841      	0xf841
+[0-9a-f]+ <[^>]*> f841      	.short	0xf841
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f842      	0xf842
+[0-9a-f]+ <[^>]*> f842      	.short	0xf842
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f843      	0xf843
+[0-9a-f]+ <[^>]*> f843      	.short	0xf843
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f844      	0xf844
+[0-9a-f]+ <[^>]*> f844      	.short	0xf844
-[0-9a-f]+ <[^>]*> f841      	0xf841
+[0-9a-f]+ <[^>]*> f841      	.short	0xf841
-[0-9a-f]+ <[^>]*> f842      	0xf842
+[0-9a-f]+ <[^>]*> f842      	.short	0xf842
-[0-9a-f]+ <[^>]*> f844      	0xf844
+[0-9a-f]+ <[^>]*> f844      	.short	0xf844
-[0-9a-f]+ <[^>]*> f848      	0xf848
+[0-9a-f]+ <[^>]*> f848      	.short	0xf848
-[0-9a-f]+ <[^>]*> f850      	0xf850
+[0-9a-f]+ <[^>]*> f850      	.short	0xf850
 [0-9a-f]+ <[^>]*> f100      	extend	0x100
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f200      	extend	0x200
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f400      	extend	0x400
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f001      	extend	0x1
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f85f      	0xf85f
+[0-9a-f]+ <[^>]*> f85f      	.short	0xf85f
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f85e      	0xf85e
+[0-9a-f]+ <[^>]*> f85e      	.short	0xf85e
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f85d      	0xf85d
+[0-9a-f]+ <[^>]*> f85d      	.short	0xf85d
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f85c      	0xf85c
+[0-9a-f]+ <[^>]*> f85c      	.short	0xf85c
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f858      	0xf858
+[0-9a-f]+ <[^>]*> f858      	.short	0xf858
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f850      	0xf850
+[0-9a-f]+ <[^>]*> f850      	.short	0xf850
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f7df      	extend	0x7df
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f71f      	extend	0x71f
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f61f      	extend	0x61f
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f41f      	extend	0x41f
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
 [0-9a-f]+ <[^>]*> f01f      	extend	0x1f
-[0-9a-f]+ <[^>]*> f840      	0xf840
+[0-9a-f]+ <[^>]*> f840      	.short	0xf840
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> bb41      	0xbb41
+[0-9a-f]+ <[^>]*> bb41      	.short	0xbb41
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> bb42      	0xbb42
+[0-9a-f]+ <[^>]*> bb42      	.short	0xbb42
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> bb43      	0xbb43
+[0-9a-f]+ <[^>]*> bb43      	.short	0xbb43
-[0-9a-f]+ <[^>]*> bb41      	0xbb41
+[0-9a-f]+ <[^>]*> bb41      	.short	0xbb41
-[0-9a-f]+ <[^>]*> bb42      	0xbb42
+[0-9a-f]+ <[^>]*> bb42      	.short	0xbb42
-[0-9a-f]+ <[^>]*> bb44      	0xbb44
+[0-9a-f]+ <[^>]*> bb44      	.short	0xbb44
-[0-9a-f]+ <[^>]*> bb48      	0xbb48
+[0-9a-f]+ <[^>]*> bb48      	.short	0xbb48
-[0-9a-f]+ <[^>]*> bb50      	0xbb50
+[0-9a-f]+ <[^>]*> bb50      	.short	0xbb50
 [0-9a-f]+ <[^>]*> f080      	extend	0x80
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f100      	extend	0x100
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f200      	extend	0x200
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f400      	extend	0x400
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f001      	extend	0x1
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> bb5f      	0xbb5f
+[0-9a-f]+ <[^>]*> bb5f      	.short	0xbb5f
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> bb5e      	0xbb5e
+[0-9a-f]+ <[^>]*> bb5e      	.short	0xbb5e
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> bb5d      	0xbb5d
+[0-9a-f]+ <[^>]*> bb5d      	.short	0xbb5d
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> bb5c      	0xbb5c
+[0-9a-f]+ <[^>]*> bb5c      	.short	0xbb5c
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> bb58      	0xbb58
+[0-9a-f]+ <[^>]*> bb58      	.short	0xbb58
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> bb50      	0xbb50
+[0-9a-f]+ <[^>]*> bb50      	.short	0xbb50
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f7df      	extend	0x7df
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f71f      	extend	0x71f
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f61f      	extend	0x61f
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f41f      	extend	0x41f
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> f01f      	extend	0x1f
-[0-9a-f]+ <[^>]*> bb40      	0xbb40
+[0-9a-f]+ <[^>]*> bb40      	.short	0xbb40
 [0-9a-f]+ <[^>]*> 9b40      	lw	v0,0\(v1\)
 [0-9a-f]+ <[^>]*> f000 9b41 	lw	v0,1\(v1\)
 [0-9a-f]+ <[^>]*> f000 9b42 	lw	v0,2\(v1\)
@@ -325,147 +325,147 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f61f a340 	lbu	v0,-512\(v1\)
 [0-9a-f]+ <[^>]*> f41f a340 	lbu	v0,-1024\(v1\)
 [0-9a-f]+ <[^>]*> f01f a340 	lbu	v0,-2048\(v1\)
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 7b41      	0x7b41
+[0-9a-f]+ <[^>]*> 7b41      	.short	0x7b41
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 7b42      	0x7b42
+[0-9a-f]+ <[^>]*> 7b42      	.short	0x7b42
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 7b43      	0x7b43
+[0-9a-f]+ <[^>]*> 7b43      	.short	0x7b43
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 7b44      	0x7b44
+[0-9a-f]+ <[^>]*> 7b44      	.short	0x7b44
-[0-9a-f]+ <[^>]*> 7b41      	0x7b41
+[0-9a-f]+ <[^>]*> 7b41      	.short	0x7b41
-[0-9a-f]+ <[^>]*> 7b42      	0x7b42
+[0-9a-f]+ <[^>]*> 7b42      	.short	0x7b42
-[0-9a-f]+ <[^>]*> 7b44      	0x7b44
+[0-9a-f]+ <[^>]*> 7b44      	.short	0x7b44
-[0-9a-f]+ <[^>]*> 7b48      	0x7b48
+[0-9a-f]+ <[^>]*> 7b48      	.short	0x7b48
-[0-9a-f]+ <[^>]*> 7b50      	0x7b50
+[0-9a-f]+ <[^>]*> 7b50      	.short	0x7b50
 [0-9a-f]+ <[^>]*> f100      	extend	0x100
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f200      	extend	0x200
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f400      	extend	0x400
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f001      	extend	0x1
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 7b5f      	0x7b5f
+[0-9a-f]+ <[^>]*> 7b5f      	.short	0x7b5f
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 7b5e      	0x7b5e
+[0-9a-f]+ <[^>]*> 7b5e      	.short	0x7b5e
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 7b5d      	0x7b5d
+[0-9a-f]+ <[^>]*> 7b5d      	.short	0x7b5d
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 7b5c      	0x7b5c
+[0-9a-f]+ <[^>]*> 7b5c      	.short	0x7b5c
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 7b58      	0x7b58
+[0-9a-f]+ <[^>]*> 7b58      	.short	0x7b58
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 7b50      	0x7b50
+[0-9a-f]+ <[^>]*> 7b50      	.short	0x7b50
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f7df      	extend	0x7df
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f71f      	extend	0x71f
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f61f      	extend	0x61f
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f41f      	extend	0x41f
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
 [0-9a-f]+ <[^>]*> f01f      	extend	0x1f
-[0-9a-f]+ <[^>]*> 7b40      	0x7b40
+[0-9a-f]+ <[^>]*> 7b40      	.short	0x7b40
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f941      	0xf941
+[0-9a-f]+ <[^>]*> f941      	.short	0xf941
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f942      	0xf942
+[0-9a-f]+ <[^>]*> f942      	.short	0xf942
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f943      	0xf943
+[0-9a-f]+ <[^>]*> f943      	.short	0xf943
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> f944      	0xf944
+[0-9a-f]+ <[^>]*> f944      	.short	0xf944
-[0-9a-f]+ <[^>]*> f941      	0xf941
+[0-9a-f]+ <[^>]*> f941      	.short	0xf941
-[0-9a-f]+ <[^>]*> f942      	0xf942
+[0-9a-f]+ <[^>]*> f942      	.short	0xf942
-[0-9a-f]+ <[^>]*> f944      	0xf944
+[0-9a-f]+ <[^>]*> f944      	.short	0xf944
-[0-9a-f]+ <[^>]*> f948      	0xf948
+[0-9a-f]+ <[^>]*> f948      	.short	0xf948
-[0-9a-f]+ <[^>]*> f950      	0xf950
+[0-9a-f]+ <[^>]*> f950      	.short	0xf950
 [0-9a-f]+ <[^>]*> f100      	extend	0x100
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f200      	extend	0x200
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f400      	extend	0x400
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f001      	extend	0x1
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f95f      	0xf95f
+[0-9a-f]+ <[^>]*> f95f      	.short	0xf95f
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f95e      	0xf95e
+[0-9a-f]+ <[^>]*> f95e      	.short	0xf95e
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f95d      	0xf95d
+[0-9a-f]+ <[^>]*> f95d      	.short	0xf95d
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f95c      	0xf95c
+[0-9a-f]+ <[^>]*> f95c      	.short	0xf95c
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f958      	0xf958
+[0-9a-f]+ <[^>]*> f958      	.short	0xf958
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f950      	0xf950
+[0-9a-f]+ <[^>]*> f950      	.short	0xf950
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f7df      	extend	0x7df
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f71f      	extend	0x71f
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f61f      	extend	0x61f
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f41f      	extend	0x41f
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
 [0-9a-f]+ <[^>]*> f01f      	extend	0x1f
-[0-9a-f]+ <[^>]*> f940      	0xf940
+[0-9a-f]+ <[^>]*> f940      	.short	0xf940
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> fa01      	0xfa01
+[0-9a-f]+ <[^>]*> fa01      	.short	0xfa01
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> fa02      	0xfa02
+[0-9a-f]+ <[^>]*> fa02      	.short	0xfa02
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> fa03      	0xfa03
+[0-9a-f]+ <[^>]*> fa03      	.short	0xfa03
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> fa04      	0xfa04
+[0-9a-f]+ <[^>]*> fa04      	.short	0xfa04
-[0-9a-f]+ <[^>]*> fa01      	0xfa01
+[0-9a-f]+ <[^>]*> fa01      	.short	0xfa01
-[0-9a-f]+ <[^>]*> fa02      	0xfa02
+[0-9a-f]+ <[^>]*> fa02      	.short	0xfa02
-[0-9a-f]+ <[^>]*> fa04      	0xfa04
+[0-9a-f]+ <[^>]*> fa04      	.short	0xfa04
-[0-9a-f]+ <[^>]*> fa08      	0xfa08
+[0-9a-f]+ <[^>]*> fa08      	.short	0xfa08
-[0-9a-f]+ <[^>]*> fa10      	0xfa10
+[0-9a-f]+ <[^>]*> fa10      	.short	0xfa10
-[0-9a-f]+ <[^>]*> fa20      	0xfa20
+[0-9a-f]+ <[^>]*> fa20      	.short	0xfa20
-[0-9a-f]+ <[^>]*> fa40      	0xfa40
+[0-9a-f]+ <[^>]*> fa40      	.short	0xfa40
-[0-9a-f]+ <[^>]*> fa80      	0xfa80
+[0-9a-f]+ <[^>]*> fa80      	.short	0xfa80
 [0-9a-f]+ <[^>]*> f001      	extend	0x1
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fa1f      	0xfa1f
+[0-9a-f]+ <[^>]*> fa1f      	.short	0xfa1f
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fa1e      	0xfa1e
+[0-9a-f]+ <[^>]*> fa1e      	.short	0xfa1e
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fa1d      	0xfa1d
+[0-9a-f]+ <[^>]*> fa1d      	.short	0xfa1d
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fa1c      	0xfa1c
+[0-9a-f]+ <[^>]*> fa1c      	.short	0xfa1c
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fa18      	0xfa18
+[0-9a-f]+ <[^>]*> fa18      	.short	0xfa18
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fa10      	0xfa10
+[0-9a-f]+ <[^>]*> fa10      	.short	0xfa10
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f7df      	extend	0x7df
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f71f      	extend	0x71f
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f61f      	extend	0x61f
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f41f      	extend	0x41f
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> f01f      	extend	0x1f
-[0-9a-f]+ <[^>]*> fa00      	0xfa00
+[0-9a-f]+ <[^>]*> fa00      	.short	0xfa00
 [0-9a-f]+ <[^>]*> db40      	sw	v0,0\(v1\)
 [0-9a-f]+ <[^>]*> f000 db41 	sw	v0,1\(v1\)
 [0-9a-f]+ <[^>]*> f000 db42 	sw	v0,2\(v1\)
@@ -606,52 +606,52 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f100 6a00 	li	v0,256
 [0-9a-f]+ <[^>]*> 675e      	move	v0,s8
 [0-9a-f]+ <[^>]*> 6592      	move	s4,v0
-[0-9a-f]+ <[^>]*> 4350      	0x4350
+[0-9a-f]+ <[^>]*> 4350      	.short	0x4350
-[0-9a-f]+ <[^>]*> 4351      	0x4351
+[0-9a-f]+ <[^>]*> 4351      	.short	0x4351
-[0-9a-f]+ <[^>]*> 435f      	0x435f
+[0-9a-f]+ <[^>]*> 435f      	.short	0x435f
 [0-9a-f]+ <[^>]*> f010      	extend	0x10
-[0-9a-f]+ <[^>]*> 4350      	0x4350
+[0-9a-f]+ <[^>]*> 4350      	.short	0x4350
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> 4350      	0x4350
+[0-9a-f]+ <[^>]*> 4350      	.short	0x4350
-[0-9a-f]+ <[^>]*> e388      	0xe388
+[0-9a-f]+ <[^>]*> e388      	.short	0xe388
-[0-9a-f]+ <[^>]*> fd40      	0xfd40
+[0-9a-f]+ <[^>]*> fd40      	.short	0xfd40
-[0-9a-f]+ <[^>]*> fd41      	0xfd41
+[0-9a-f]+ <[^>]*> fd41      	.short	0xfd41
-[0-9a-f]+ <[^>]*> fd5f      	0xfd5f
+[0-9a-f]+ <[^>]*> fd5f      	.short	0xfd5f
 [0-9a-f]+ <[^>]*> f020      	extend	0x20
-[0-9a-f]+ <[^>]*> fd40      	0xfd40
+[0-9a-f]+ <[^>]*> fd40      	.short	0xfd40
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fd40      	0xfd40
+[0-9a-f]+ <[^>]*> fd40      	.short	0xfd40
 [0-9a-f]+ <[^>]*> f080      	extend	0x80
-[0-9a-f]+ <[^>]*> fd40      	0xfd40
+[0-9a-f]+ <[^>]*> fd40      	.short	0xfd40
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> fd40      	0xfd40
+[0-9a-f]+ <[^>]*> fd40      	.short	0xfd40
 [0-9a-f]+ <[^>]*> f17f      	extend	0x17f
-[0-9a-f]+ <[^>]*> fe48      	0xfe48
+[0-9a-f]+ <[^>]*> fe48      	.short	0xfe48
 [0-9a-f]+ <[^>]*> f080      	extend	0x80
-[0-9a-f]+ <[^>]*> fe40      	0xfe40
+[0-9a-f]+ <[^>]*> fe40      	.short	0xfe40
 [0-9a-f]+ <[^>]*> f1c0      	extend	0x1c0
-[0-9a-f]+ <[^>]*> fe48      	0xfe48
+[0-9a-f]+ <[^>]*> fe48      	.short	0xfe48
 [0-9a-f]+ <[^>]*> f280      	extend	0x280
-[0-9a-f]+ <[^>]*> fe4c      	0xfe4c
+[0-9a-f]+ <[^>]*> fe4c      	.short	0xfe4c
-[0-9a-f]+ <[^>]*> fb00      	0xfb00
+[0-9a-f]+ <[^>]*> fb00      	.short	0xfb00
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> fb01      	0xfb01
+[0-9a-f]+ <[^>]*> fb01      	.short	0xfb01
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> fb1f      	0xfb1f
+[0-9a-f]+ <[^>]*> fb1f      	.short	0xfb1f
-[0-9a-f]+ <[^>]*> fb20      	0xfb20
+[0-9a-f]+ <[^>]*> fb20      	.short	0xfb20
-[0-9a-f]+ <[^>]*> fbe0      	0xfbe0
+[0-9a-f]+ <[^>]*> fbe0      	.short	0xfbe0
-[0-9a-f]+ <[^>]*> ff40      	0xff40
+[0-9a-f]+ <[^>]*> ff40      	.short	0xff40
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> ff41      	0xff41
+[0-9a-f]+ <[^>]*> ff41      	.short	0xff41
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> ff5f      	0xff5f
+[0-9a-f]+ <[^>]*> ff5f      	.short	0xff5f
-[0-9a-f]+ <[^>]*> ff48      	0xff48
+[0-9a-f]+ <[^>]*> ff48      	.short	0xff48
 [0-9a-f]+ <[^>]*> f7ff      	extend	0x7ff
-[0-9a-f]+ <[^>]*> ff40      	0xff40
+[0-9a-f]+ <[^>]*> ff40      	.short	0xff40
 [0-9a-f]+ <[^>]*> f080      	extend	0x80
-[0-9a-f]+ <[^>]*> ff40      	0xff40
+[0-9a-f]+ <[^>]*> ff40      	.short	0xff40
 [0-9a-f]+ <[^>]*> f79f      	extend	0x79f
-[0-9a-f]+ <[^>]*> ff40      	0xff40
+[0-9a-f]+ <[^>]*> ff40      	.short	0xff40
 [0-9a-f]+ <[^>]*> 4340      	addiu	v0,v1,0
 [0-9a-f]+ <[^>]*> 4341      	addiu	v0,v1,1
 [0-9a-f]+ <[^>]*> 434f      	addiu	v0,v1,-1
@@ -682,7 +682,7 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 0220      	addiu	v0,sp,128
 [0-9a-f]+ <[^>]*> f79f 0200 	addiu	v0,sp,-128
 [0-9a-f]+ <[^>]*> 00000000 	nop
-[0-9a-f]+ <[^>]*> e38a      	0xe38a
+[0-9a-f]+ <[^>]*> e38a      	.short	0xe38a
 [0-9a-f]+ <[^>]*> e38b      	subu	v0,v1,a0
 [0-9a-f]+ <[^>]*> ea6b      	neg	v0,v1
 [0-9a-f]+ <[^>]*> ea6c      	and	v0,v1
@@ -707,32 +707,32 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f100 7200 	cmpi	v0,256
 [0-9a-f]+ <[^>]*> ea6a      	cmp	v0,v1
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> 3261      	0x3261
+[0-9a-f]+ <[^>]*> 3261      	.short	0x3261
-[0-9a-f]+ <[^>]*> 3265      	0x3265
+[0-9a-f]+ <[^>]*> 3265      	.short	0x3265
-[0-9a-f]+ <[^>]*> 3261      	0x3261
+[0-9a-f]+ <[^>]*> 3261      	.short	0x3261
 [0-9a-f]+ <[^>]*> f240      	extend	0x240
-[0-9a-f]+ <[^>]*> 3261      	0x3261
+[0-9a-f]+ <[^>]*> 3261      	.short	0x3261
 [0-9a-f]+ <[^>]*> f7e0      	extend	0x7e0
-[0-9a-f]+ <[^>]*> 3261      	0x3261
+[0-9a-f]+ <[^>]*> 3261      	.short	0x3261
-[0-9a-f]+ <[^>]*> eb54      	0xeb54
+[0-9a-f]+ <[^>]*> eb54      	.short	0xeb54
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> e848      	0xe848
+[0-9a-f]+ <[^>]*> e848      	.short	0xe848
-[0-9a-f]+ <[^>]*> e948      	0xe948
+[0-9a-f]+ <[^>]*> e948      	.short	0xe948
-[0-9a-f]+ <[^>]*> e848      	0xe848
+[0-9a-f]+ <[^>]*> e848      	.short	0xe848
 [0-9a-f]+ <[^>]*> f240      	extend	0x240
-[0-9a-f]+ <[^>]*> e848      	0xe848
+[0-9a-f]+ <[^>]*> e848      	.short	0xe848
 [0-9a-f]+ <[^>]*> f7e0      	extend	0x7e0
-[0-9a-f]+ <[^>]*> e848      	0xe848
+[0-9a-f]+ <[^>]*> e848      	.short	0xe848
-[0-9a-f]+ <[^>]*> eb56      	0xeb56
+[0-9a-f]+ <[^>]*> eb56      	.short	0xeb56
 [0-9a-f]+ <[^>]*> f000      	extend	0x0
-[0-9a-f]+ <[^>]*> e853      	0xe853
+[0-9a-f]+ <[^>]*> e853      	.short	0xe853
-[0-9a-f]+ <[^>]*> e953      	0xe953
+[0-9a-f]+ <[^>]*> e953      	.short	0xe953
-[0-9a-f]+ <[^>]*> e853      	0xe853
+[0-9a-f]+ <[^>]*> e853      	.short	0xe853
 [0-9a-f]+ <[^>]*> f240      	extend	0x240
-[0-9a-f]+ <[^>]*> e853      	0xe853
+[0-9a-f]+ <[^>]*> e853      	.short	0xe853
 [0-9a-f]+ <[^>]*> f7e0      	extend	0x7e0
-[0-9a-f]+ <[^>]*> e853      	0xe853
+[0-9a-f]+ <[^>]*> e853      	.short	0xe853
-[0-9a-f]+ <[^>]*> eb57      	0xeb57
+[0-9a-f]+ <[^>]*> eb57      	.short	0xeb57
 [0-9a-f]+ <[^>]*> ea12      	mflo	v0
 [0-9a-f]+ <[^>]*> eb10      	mfhi	v1
 [0-9a-f]+ <[^>]*> f000 3260 	sll	v0,v1,0
@@ -753,15 +753,15 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> f240 3263 	sra	v0,v1,9
 [0-9a-f]+ <[^>]*> f7c0 3263 	sra	v0,v1,31
 [0-9a-f]+ <[^>]*> eb47      	srav	v0,v1
-[0-9a-f]+ <[^>]*> ea7c      	0xea7c
+[0-9a-f]+ <[^>]*> ea7c      	.short	0xea7c
-[0-9a-f]+ <[^>]*> ea7d      	0xea7d
+[0-9a-f]+ <[^>]*> ea7d      	.short	0xea7d
-[0-9a-f]+ <[^>]*> ea7e      	0xea7e
+[0-9a-f]+ <[^>]*> ea7e      	.short	0xea7e
 [0-9a-f]+ <[^>]*> 2b01      	bnez	v1,000007d4 <insns2\+0xb4>
 [0-9a-f]+ <[^>]*> e8e5      	break	0x7
 [0-9a-f]+ <[^>]*> ea12      	mflo	v0
 [0-9a-f]+ <[^>]*> 6500      	nop
 [0-9a-f]+ <[^>]*> 6500      	nop
-[0-9a-f]+ <[^>]*> ea7f      	0xea7f
+[0-9a-f]+ <[^>]*> ea7f      	.short	0xea7f
 [0-9a-f]+ <[^>]*> 2b01      	bnez	v1,000007e0 <insns2\+0xc0>
 [0-9a-f]+ <[^>]*> e8e5      	break	0x7
 [0-9a-f]+ <[^>]*> ea12      	mflo	v0

gas/testsuite/gas/mips/mips16-32@mips16e-64-sub.d

@@ -6,8 +6,8 @@
 .*: +file format .*mips.*
 
 Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> ecd1      	0xecd1
+[0-9a-f]+ <[^>]*> ecd1      	.short	0xecd1
-[0-9a-f]+ <[^>]*> ec51      	0xec51
+[0-9a-f]+ <[^>]*> ec51      	.short	0xec51
 [0-9a-f]+ <[^>]*> 6500      	nop
 [0-9a-f]+ <[^>]*> 6500      	nop
 [0-9a-f]+ <[^>]*> 6500      	nop

gas/testsuite/gas/mips/mips16-32@mips16e-sub.d

@@ -6,51 +6,51 @@
 .*: +file format .*mips.*
 
 Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
-[0-9a-f]+ <[^>]*> e8a0      	0xe8a0
+[0-9a-f]+ <[^>]*> e8a0      	.short	0xe8a0
-[0-9a-f]+ <[^>]*> ea80      	0xea80
+[0-9a-f]+ <[^>]*> ea80      	.short	0xea80
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
-[0-9a-f]+ <[^>]*> e8a0      	0xe8a0
+[0-9a-f]+ <[^>]*> e8a0      	.short	0xe8a0
-[0-9a-f]+ <[^>]*> ea80      	0xea80
+[0-9a-f]+ <[^>]*> ea80      	.short	0xea80
-[0-9a-f]+ <[^>]*> e8a0      	0xe8a0
+[0-9a-f]+ <[^>]*> e8a0      	.short	0xe8a0
-[0-9a-f]+ <[^>]*> ea80      	0xea80
+[0-9a-f]+ <[^>]*> ea80      	.short	0xea80
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
 [0-9a-f]+ <[^>]*> 1800 0000 	jal	00000000 <stuff>
 [ 	]*[0-9a-f]+: R_MIPS16_26	foo
 [0-9a-f]+ <[^>]*> 4281      	addiu	a0,v0,1
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
 [0-9a-f]+ <[^>]*> 1800 0000 	jal	00000000 <stuff>
 [ 	]*[0-9a-f]+: R_MIPS16_26	foo
 [0-9a-f]+ <[^>]*> 6500      	nop
 [0-9a-f]+ <[^>]*> 6782      	move	a0,v0
-[0-9a-f]+ <[^>]*> eac0      	0xeac0
+[0-9a-f]+ <[^>]*> eac0      	.short	0xeac0
 [0-9a-f]+ <[^>]*> 6782      	move	a0,v0
-[0-9a-f]+ <[^>]*> ea80      	0xea80
+[0-9a-f]+ <[^>]*> ea80      	.short	0xea80
 [0-9a-f]+ <[^>]*> 6782      	move	a0,v0
-[0-9a-f]+ <[^>]*> e8a0      	0xe8a0
+[0-9a-f]+ <[^>]*> e8a0      	.short	0xe8a0
-[0-9a-f]+ <[^>]*> ec91      	0xec91
+[0-9a-f]+ <[^>]*> ec91      	.short	0xec91
-[0-9a-f]+ <[^>]*> ecb1      	0xecb1
+[0-9a-f]+ <[^>]*> ecb1      	.short	0xecb1
-[0-9a-f]+ <[^>]*> ec11      	0xec11
+[0-9a-f]+ <[^>]*> ec11      	.short	0xec11
-[0-9a-f]+ <[^>]*> ec31      	0xec31
+[0-9a-f]+ <[^>]*> ec31      	.short	0xec31
-[0-9a-f]+ <[^>]*> 64c1      	0x64c1
+[0-9a-f]+ <[^>]*> 64c1      	.short	0x64c1
-[0-9a-f]+ <[^>]*> 64c0      	0x64c0
+[0-9a-f]+ <[^>]*> 64c0      	.short	0x64c0
-[0-9a-f]+ <[^>]*> 64e2      	0x64e2
+[0-9a-f]+ <[^>]*> 64e2      	.short	0x64e2
-[0-9a-f]+ <[^>]*> 64f2      	0x64f2
+[0-9a-f]+ <[^>]*> 64f2      	.short	0x64f2
-[0-9a-f]+ <[^>]*> 64df      	0x64df
+[0-9a-f]+ <[^>]*> 64df      	.short	0x64df
 [0-9a-f]+ <[^>]*> f010      	extend	0x10
-[0-9a-f]+ <[^>]*> 64e1      	0x64e1
+[0-9a-f]+ <[^>]*> 64e1      	.short	0x64e1
 [0-9a-f]+ <[^>]*> f004      	extend	0x4
-[0-9a-f]+ <[^>]*> 64f2      	0x64f2
+[0-9a-f]+ <[^>]*> 64f2      	.short	0x64f2
 [0-9a-f]+ <[^>]*> f308      	extend	0x308
-[0-9a-f]+ <[^>]*> 64e2      	0x64e2
+[0-9a-f]+ <[^>]*> 64e2      	.short	0x64e2
 [0-9a-f]+ <[^>]*> f30c      	extend	0x30c
-[0-9a-f]+ <[^>]*> 64f2      	0x64f2
+[0-9a-f]+ <[^>]*> 64f2      	.short	0x64f2
 [0-9a-f]+ <[^>]*> f70e      	extend	0x70e
-[0-9a-f]+ <[^>]*> 64d2      	0x64d2
+[0-9a-f]+ <[^>]*> 64d2      	.short	0x64d2
 [0-9a-f]+ <[^>]*> f30a      	extend	0x30a
-[0-9a-f]+ <[^>]*> 64e2      	0x64e2
+[0-9a-f]+ <[^>]*> 64e2      	.short	0x64e2
-[0-9a-f]+ <[^>]*> 6441      	0x6441
+[0-9a-f]+ <[^>]*> 6441      	.short	0x6441

gas/testsuite/gas/mips/mips16@save-sub.d

@@ -7,59 +7,59 @@
 
 Disassembly of section .text:
 00000000 <func>:
-   0:[ 	]+6481[ 	]+0x6481
+   0:[ 	]+6481[ 	]+.short[ 	]0x6481
-   2:[ 	]+64c2[ 	]+0x64c2
+   2:[ 	]+64c2[ 	]+.short[ 	]0x64c2
-   4:[ 	]+64a3[ 	]+0x64a3
+   4:[ 	]+64a3[ 	]+.short[ 	]0x64a3
-   6:[ 	]+6494[ 	]+0x6494
+   6:[ 	]+6494[ 	]+.short[ 	]0x6494
-   8:[ 	]+64b5[ 	]+0x64b5
+   8:[ 	]+64b5[ 	]+.short[ 	]0x64b5
-   a:[ 	]+64e6[ 	]+0x64e6
+   a:[ 	]+64e6[ 	]+.short[ 	]0x64e6
-   c:[ 	]+64d7[ 	]+0x64d7
+   c:[ 	]+64d7[ 	]+.short[ 	]0x64d7
-   e:[ 	]+64f8[ 	]+0x64f8
+   e:[ 	]+64f8[ 	]+.short[ 	]0x64f8
-  10:[ 	]+64f9[ 	]+0x64f9
+  10:[ 	]+64f9[ 	]+.short[ 	]0x64f9
-  12:[ 	]+64fa[ 	]+0x64fa
+  12:[ 	]+64fa[ 	]+.short[ 	]0x64fa
-  14:[ 	]+64fb[ 	]+0x64fb
+  14:[ 	]+64fb[ 	]+.short[ 	]0x64fb
-  16:[ 	]+64f0[ 	]+0x64f0
+  16:[ 	]+64f0[ 	]+.short[ 	]0x64f0
   18:[ 	]+f010[ 	]+extend[ 	]0x10
-  1a:[ 	]+6481[ 	]+0x6481
+  1a:[ 	]+6481[ 	]+.short[ 	]0x6481
   1c:[ 	]+f010[ 	]+extend[ 	]0x10
-  1e:[ 	]+64c2[ 	]+0x64c2
+  1e:[ 	]+64c2[ 	]+.short[ 	]0x64c2
   20:[ 	]+f010[ 	]+extend[ 	]0x10
-  22:[ 	]+64b3[ 	]+0x64b3
+  22:[ 	]+64b3[ 	]+.short[ 	]0x64b3
   24:[ 	]+f100[ 	]+extend[ 	]0x100
-  26:[ 	]+6488[ 	]+0x6488
+  26:[ 	]+6488[ 	]+.short[ 	]0x6488
   28:[ 	]+f600[ 	]+extend[ 	]0x600
-  2a:[ 	]+6489[ 	]+0x6489
+  2a:[ 	]+6489[ 	]+.short[ 	]0x6489
   2c:[ 	]+f700[ 	]+extend[ 	]0x700
-  2e:[ 	]+648a[ 	]+0x648a
+  2e:[ 	]+648a[ 	]+.short[ 	]0x648a
   30:[ 	]+f700[ 	]+extend[ 	]0x700
-  32:[ 	]+64bb[ 	]+0x64bb
+  32:[ 	]+64bb[ 	]+.short[ 	]0x64bb
   34:[ 	]+f001[ 	]+extend[ 	]0x1
-  36:[ 	]+6488[ 	]+0x6488
+  36:[ 	]+6488[ 	]+.short[ 	]0x6488
   38:[ 	]+f012[ 	]+extend[ 	]0x12
-  3a:[ 	]+6480[ 	]+0x6480
+  3a:[ 	]+6480[ 	]+.short[ 	]0x6480
   3c:[ 	]+f02b[ 	]+extend[ 	]0x2b
-  3e:[ 	]+6480[ 	]+0x6480
+  3e:[ 	]+6480[ 	]+.short[ 	]0x6480
   40:[ 	]+f024[ 	]+extend[ 	]0x24
-  42:[ 	]+6480[ 	]+0x6480
+  42:[ 	]+6480[ 	]+.short[ 	]0x6480
   44:[ 	]+f018[ 	]+extend[ 	]0x18
-  46:[ 	]+6480[ 	]+0x6480
+  46:[ 	]+6480[ 	]+.short[ 	]0x6480
   48:[ 	]+f00e[ 	]+extend[ 	]0xe
-  4a:[ 	]+6488[ 	]+0x6488
+  4a:[ 	]+6488[ 	]+.short[ 	]0x6488
   4c:[ 	]+f015[ 	]+extend[ 	]0x15
-  4e:[ 	]+6480[ 	]+0x6480
+  4e:[ 	]+6480[ 	]+.short[ 	]0x6480
   50:[ 	]+f017[ 	]+extend[ 	]0x17
-  52:[ 	]+6480[ 	]+0x6480
+  52:[ 	]+6480[ 	]+.short[ 	]0x6480
   54:[ 	]+f01a[ 	]+extend[ 	]0x1a
-  56:[ 	]+6480[ 	]+0x6480
+  56:[ 	]+6480[ 	]+.short[ 	]0x6480
   58:[ 	]+f01d[ 	]+extend[ 	]0x1d
-  5a:[ 	]+6480[ 	]+0x6480
+  5a:[ 	]+6480[ 	]+.short[ 	]0x6480
   5c:[ 	]+f71a[ 	]+extend[ 	]0x71a
-  5e:[ 	]+64f0[ 	]+0x64f0
+  5e:[ 	]+64f0[ 	]+.short[ 	]0x64f0
-  60:[ 	]+6470[ 	]+0x6470
+  60:[ 	]+6470[ 	]+.short[ 	]0x6470
   62:[ 	]+f010[ 	]+extend[ 	]0x10
-  64:[ 	]+6441[ 	]+0x6441
+  64:[ 	]+6441[ 	]+.short[ 	]0x6441
   66:[ 	]+f100[ 	]+extend[ 	]0x100
-  68:[ 	]+6408[ 	]+0x6408
+  68:[ 	]+6408[ 	]+.short[ 	]0x6408
   6a:[ 	]+f71a[ 	]+extend[ 	]0x71a
-  6c:[ 	]+6470[ 	]+0x6470
+  6c:[ 	]+6470[ 	]+.short[ 	]0x6470
 	\.\.\.

gas/testsuite/gas/mips/mips1@isa-override-1.d

@@ -16,20 +16,20 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
 [0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
 [0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
-[0-9a-f]+ <[^>]*> dc820000 	0xdc820000
+[0-9a-f]+ <[^>]*> dc820000 	.word	0xdc820000
 [0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
 [0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
 [0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
-[0-9a-f]+ <[^>]*> d4820000 	0xd4820000
+[0-9a-f]+ <[^>]*> d4820000 	.word	0xd4820000
 [0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
-[0-9a-f]+ <[^>]*> 44a11000 	0x44a11000
+[0-9a-f]+ <[^>]*> 44a11000 	.word	0x44a11000
 [0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
 [0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
 [0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab

gas/testsuite/gas/mips/mips1@save-sub.d

@@ -7,38 +7,38 @@
 
 Disassembly of section .text:
 00000000 <func>:
-   0:[ 	]+7000205f[ 	]+0x7000205f
+   0:[ 	]+7000205f[ 	]+.word[ 	]0x7000205f
-   4:[ 	]+7000309f[ 	]+0x7000309f
+   4:[ 	]+7000309f[ 	]+.word[ 	]0x7000309f
-   8:[ 	]+700028df[ 	]+0x700028df
+   8:[ 	]+700028df[ 	]+.word[ 	]0x700028df
-   c:[ 	]+7000251f[ 	]+0x7000251f
+   c:[ 	]+7000251f[ 	]+.word[ 	]0x7000251f
-  10:[ 	]+70002d5f[ 	]+0x70002d5f
+  10:[ 	]+70002d5f[ 	]+.word[ 	]0x70002d5f
-  14:[ 	]+7000399f[ 	]+0x7000399f
+  14:[ 	]+7000399f[ 	]+.word[ 	]0x7000399f
-  18:[ 	]+700035df[ 	]+0x700035df
+  18:[ 	]+700035df[ 	]+.word[ 	]0x700035df
-  1c:[ 	]+70003e1f[ 	]+0x70003e1f
+  1c:[ 	]+70003e1f[ 	]+.word[ 	]0x70003e1f
-  20:[ 	]+70003e5f[ 	]+0x70003e5f
+  20:[ 	]+70003e5f[ 	]+.word[ 	]0x70003e5f
-  24:[ 	]+70003e9f[ 	]+0x70003e9f
+  24:[ 	]+70003e9f[ 	]+.word[ 	]0x70003e9f
-  28:[ 	]+70003edf[ 	]+0x70003edf
+  28:[ 	]+70003edf[ 	]+.word[ 	]0x70003edf
-  2c:[ 	]+70083c1f[ 	]+0x70083c1f
+  2c:[ 	]+70083c1f[ 	]+.word[ 	]0x70083c1f
-  30:[ 	]+7008205f[ 	]+0x7008205f
+  30:[ 	]+7008205f[ 	]+.word[ 	]0x7008205f
-  34:[ 	]+7008309f[ 	]+0x7008309f
+  34:[ 	]+7008309f[ 	]+.word[ 	]0x7008309f
-  38:[ 	]+70082cdf[ 	]+0x70082cdf
+  38:[ 	]+70082cdf[ 	]+.word[ 	]0x70082cdf
-  3c:[ 	]+7080221f[ 	]+0x7080221f
+  3c:[ 	]+7080221f[ 	]+.word[ 	]0x7080221f
-  40:[ 	]+7300225f[ 	]+0x7300225f
+  40:[ 	]+7300225f[ 	]+.word[ 	]0x7300225f
-  44:[ 	]+7380229f[ 	]+0x7380229f
+  44:[ 	]+7380229f[ 	]+.word[ 	]0x7380229f
-  48:[ 	]+73802edf[ 	]+0x73802edf
+  48:[ 	]+73802edf[ 	]+.word[ 	]0x73802edf
-  4c:[ 	]+7000a21f[ 	]+0x7000a21f
+  4c:[ 	]+7000a21f[ 	]+.word[ 	]0x7000a21f
-  50:[ 	]+7009201f[ 	]+0x7009201f
+  50:[ 	]+7009201f[ 	]+.word[ 	]0x7009201f
-  54:[ 	]+7015a01f[ 	]+0x7015a01f
+  54:[ 	]+7015a01f[ 	]+.word[ 	]0x7015a01f
-  58:[ 	]+7012201f[ 	]+0x7012201f
+  58:[ 	]+7012201f[ 	]+.word[ 	]0x7012201f
-  5c:[ 	]+700c201f[ 	]+0x700c201f
+  5c:[ 	]+700c201f[ 	]+.word[ 	]0x700c201f
-  60:[ 	]+7007221f[ 	]+0x7007221f
+  60:[ 	]+7007221f[ 	]+.word[ 	]0x7007221f
-  64:[ 	]+700aa01f[ 	]+0x700aa01f
+  64:[ 	]+700aa01f[ 	]+.word[ 	]0x700aa01f
-  68:[ 	]+700ba01f[ 	]+0x700ba01f
+  68:[ 	]+700ba01f[ 	]+.word[ 	]0x700ba01f
-  6c:[ 	]+700d201f[ 	]+0x700d201f
+  6c:[ 	]+700d201f[ 	]+.word[ 	]0x700d201f
-  70:[ 	]+700ea01f[ 	]+0x700ea01f
+  70:[ 	]+700ea01f[ 	]+.word[ 	]0x700ea01f
-  74:[ 	]+738d3c1f[ 	]+0x738d3c1f
+  74:[ 	]+738d3c1f[ 	]+.word[ 	]0x738d3c1f
-  78:[ 	]+70081c1f[ 	]+0x70081c1f
+  78:[ 	]+70081c1f[ 	]+.word[ 	]0x70081c1f
-  7c:[ 	]+7008105f[ 	]+0x7008105f
+  7c:[ 	]+7008105f[ 	]+.word[ 	]0x7008105f
-  80:[ 	]+7080021f[ 	]+0x7080021f
+  80:[ 	]+7080021f[ 	]+.word[ 	]0x7080021f
-  84:[ 	]+738d1c1f[ 	]+0x738d1c1f
+  84:[ 	]+738d1c1f[ 	]+.word[ 	]0x738d1c1f
 	\.\.\.

gas/testsuite/gas/mips/mips2@isa-override-1.d

@@ -17,18 +17,18 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
 [0-9a-f]+ <[^>]*> dc820000 	ldc3	\$2,0\(a0\)
 [0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
 [0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
 [0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
 [0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
 [0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
-[0-9a-f]+ <[^>]*> 44a11000 	0x44a11000
+[0-9a-f]+ <[^>]*> 44a11000 	.word	0x44a11000
 [0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
 [0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
 [0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab

gas/testsuite/gas/mips/mips32@isa-override-1.d

@@ -15,20 +15,20 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 44811800 	mtc1	at,\$f3
 [0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab
 [0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
-[0-9a-f]+ <[^>]*> dc820000 	0xdc820000
+[0-9a-f]+ <[^>]*> dc820000 	.word	0xdc820000
 [0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
 [0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
 [0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
 [0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
 [0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
-[0-9a-f]+ <[^>]*> 44a11000 	0x44a11000
+[0-9a-f]+ <[^>]*> 44a11000 	.word	0x44a11000
 [0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
 [0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
 [0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab

gas/testsuite/gas/mips/mips32r2@isa-override-1.d

@@ -15,20 +15,20 @@ Disassembly of section \.text:
 [0-9a-f]+ <[^>]*> 44811000 	mtc1	at,\$f2
 [0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
 [0-9a-f]+ <[^>]*> 44e11000 	mthc1	at,\$f2
-[0-9a-f]+ <[^>]*> dc820000 	0xdc820000
+[0-9a-f]+ <[^>]*> dc820000 	.word	0xdc820000
 [0-9a-f]+ <[^>]*> 340189ab 	li	at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 00411025 	or	v0,v0,at
 [0-9a-f]+ <[^>]*> 3c029000 	lui	v0,0x9000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
 [0-9a-f]+ <[^>]*> 34428000 	ori	v0,v0,0x8000
-[0-9a-f]+ <[^>]*> 00021438 	0x21438
+[0-9a-f]+ <[^>]*> 00021438 	.word	0x21438
 [0-9a-f]+ <[^>]*> d4820000 	ldc1	\$f2,0\(a0\)
 [0-9a-f]+ <[^>]*> 3c013ff0 	lui	at,0x3ff0
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
 [0-9a-f]+ <[^>]*> 342189ab 	ori	at,at,0x89ab
-[0-9a-f]+ <[^>]*> 00010c38 	0x10c38
+[0-9a-f]+ <[^>]*> 00010c38 	.word	0x10c38
-[0-9a-f]+ <[^>]*> 44a11000 	0x44a11000
+[0-9a-f]+ <[^>]*> 44a11000 	.word	0x44a11000
 [0-9a-f]+ <[^>]*> 8c820000 	lw	v0,0\(a0\)
 [0-9a-f]+ <[^>]*> 8c830004 	lw	v1,4\(a0\)
 [0-9a-f]+ <[^>]*> 3c0189ab 	lui	at,0x89ab

gas/testsuite/gas/mips/set-arch.d

@@ -14,11 +14,11 @@ Disassembly of section \.text:
 00000018 <[^>]*> 0100380a 	movz	a3,t0,zero
 0000001c <[^>]*> 0109001e 	ddiv	zero,t0,t1
 00000020 <[^>]*> 012a001f 	ddivu	zero,t1,t2
-00000024 <[^>]*> 016c5005 	0x16c5005
+00000024 <[^>]*> 016c5005 	.word	0x16c5005
 00000028 <[^>]*> 018d5801 	movt	t3,t4,\$fcc3
 0000002c <[^>]*> 42000020 	wait
 00000030 <[^>]*> bdc40010 	cache	0x4,16\(t6\)
-00000034 <[^>]*> 71ee0010 	0x71ee0010
+00000034 <[^>]*> 71ee0010 	.word	0x71ee0010
 00000038 <[^>]*> 42000023 	c0	0x23
 0000003c <[^>]*> 42000021 	c0	0x21
 00000040 <[^>]*> 42000022 	c0	0x22
@@ -166,42 +166,42 @@ Disassembly of section \.text:
 00000278 <[^>]*> 7000003f 	sdbbp
 0000027c <[^>]*> 7159e27f 	sdbbp	0x56789
 00000280 <[^>]*> 000000c0 	ehb
-00000284 <[^>]*> 7ca43980 	0x7ca43980
+00000284 <[^>]*> 7ca43980 	.word	0x7ca43980
-00000288 <[^>]*> 7ca46984 	0x7ca46984
+00000288 <[^>]*> 7ca46984 	.word	0x7ca46984
 0000028c <[^>]*> 0100fc09 	jalr.hb	t0
 00000290 <[^>]*> 0120a409 	jalr.hb	s4,t1
 00000294 <[^>]*> 01000408 	jr.hb	t0
-00000298 <[^>]*> 7c0a003b 	0x7c0a003b
+00000298 <[^>]*> 7c0a003b 	.word	0x7c0a003b
-0000029c <[^>]*> 7c0b083b 	0x7c0b083b
+0000029c <[^>]*> 7c0b083b 	.word	0x7c0b083b
-000002a0 <[^>]*> 7c0c103b 	0x7c0c103b
+000002a0 <[^>]*> 7c0c103b 	.word	0x7c0c103b
-000002a4 <[^>]*> 7c0d183b 	0x7c0d183b
+000002a4 <[^>]*> 7c0d183b 	.word	0x7c0d183b
-000002a8 <[^>]*> 7c0e203b 	0x7c0e203b
+000002a8 <[^>]*> 7c0e203b 	.word	0x7c0e203b
-000002ac <[^>]*> 7c0f283b 	0x7c0f283b
+000002ac <[^>]*> 7c0f283b 	.word	0x7c0f283b
-000002b0 <[^>]*> 002acf02 	0x2acf02
+000002b0 <[^>]*> 002acf02 	.word	0x2acf02
-000002b4 <[^>]*> 002ac902 	0x2ac902
+000002b4 <[^>]*> 002ac902 	.word	0x2ac902
 000002b8 <[^>]*> 0004c823 	negu	t9,a0
-000002bc <[^>]*> 032ac846 	0x32ac846
+000002bc <[^>]*> 032ac846 	.word	0x32ac846
-000002c0 <[^>]*> 008ac846 	0x8ac846
+000002c0 <[^>]*> 008ac846 	.word	0x8ac846
-000002c4 <[^>]*> 008ac846 	0x8ac846
+000002c4 <[^>]*> 008ac846 	.word	0x8ac846
-000002c8 <[^>]*> 7c073c20 	0x7c073c20
+000002c8 <[^>]*> 7c073c20 	.word	0x7c073c20
-000002cc <[^>]*> 7c0a4420 	0x7c0a4420
+000002cc <[^>]*> 7c0a4420 	.word	0x7c0a4420
-000002d0 <[^>]*> 7c073e20 	0x7c073e20
+000002d0 <[^>]*> 7c073e20 	.word	0x7c073e20
-000002d4 <[^>]*> 7c0a4620 	0x7c0a4620
+000002d4 <[^>]*> 7c0a4620 	.word	0x7c0a4620
-000002d8 <[^>]*> 055f5555 	0x55f5555
+000002d8 <[^>]*> 055f5555 	.word	0x55f5555
-000002dc <[^>]*> 7c0738a0 	0x7c0738a0
+000002dc <[^>]*> 7c0738a0 	.word	0x7c0738a0
-000002e0 <[^>]*> 7c0a40a0 	0x7c0a40a0
+000002e0 <[^>]*> 7c0a40a0 	.word	0x7c0a40a0
-000002e4 <[^>]*> 41606000 	0x41606000
+000002e4 <[^>]*> 41606000 	.word	0x41606000
-000002e8 <[^>]*> 41606000 	0x41606000
+000002e8 <[^>]*> 41606000 	.word	0x41606000
-000002ec <[^>]*> 416a6000 	0x416a6000
+000002ec <[^>]*> 416a6000 	.word	0x416a6000
-000002f0 <[^>]*> 41606020 	0x41606020
+000002f0 <[^>]*> 41606020 	.word	0x41606020
-000002f4 <[^>]*> 41606020 	0x41606020
+000002f4 <[^>]*> 41606020 	.word	0x41606020
-000002f8 <[^>]*> 416a6020 	0x416a6020
+000002f8 <[^>]*> 416a6020 	.word	0x416a6020
-000002fc <[^>]*> 41595000 	0x41595000
+000002fc <[^>]*> 41595000 	.word	0x41595000
-00000300 <[^>]*> 41d95000 	0x41d95000
+00000300 <[^>]*> 41d95000 	.word	0x41d95000
-00000304 <[^>]*> 44710000 	0x44710000
+00000304 <[^>]*> 44710000 	.word	0x44710000
-00000308 <[^>]*> 44f10000 	0x44f10000
+00000308 <[^>]*> 44f10000 	.word	0x44f10000
-0000030c <[^>]*> 48715555 	0x48715555
+0000030c <[^>]*> 48715555 	.word	0x48715555
-00000310 <[^>]*> 48f15555 	0x48f15555
+00000310 <[^>]*> 48f15555 	.word	0x48f15555
 00000314 <[^>]*> 70410825 	dclo	at,v0
 00000318 <[^>]*> 70831824 	dclz	v1,a0
 0000031c <[^>]*> 48232000 	dmfc2	v1,\$4
@@ -210,61 +210,61 @@ Disassembly of section \.text:
 00000328 <[^>]*> 48a63800 	dmtc2	a2,\$7
 0000032c <[^>]*> 48a74000 	dmtc2	a3,\$8
 00000330 <[^>]*> 48a84807 	dmtc2	t0,\$9,7
-00000334 <[^>]*> 00850029 	0x850029
+00000334 <[^>]*> 00850029 	.word	0x850029
-00000338 <[^>]*> 00a60028 	0xa60028
+00000338 <[^>]*> 00a60028 	.word	0xa60028
 0000033c <[^>]*> 00002012 	mflo	a0
-00000340 <[^>]*> 00a62029 	0xa62029
+00000340 <[^>]*> 00a62029 	.word	0xa62029
-00000344 <[^>]*> 00a62229 	0xa62229
+00000344 <[^>]*> 00a62229 	.word	0xa62229
-00000348 <[^>]*> 00a62629 	0xa62629
+00000348 <[^>]*> 00a62629 	.word	0xa62629
-0000034c <[^>]*> 00a62269 	0xa62269
+0000034c <[^>]*> 00a62269 	.word	0xa62269
-00000350 <[^>]*> 00a62669 	0xa62669
+00000350 <[^>]*> 00a62669 	.word	0xa62669
-00000354 <[^>]*> 00a62429 	0xa62429
+00000354 <[^>]*> 00a62429 	.word	0xa62429
-00000358 <[^>]*> 00a62069 	0xa62069
+00000358 <[^>]*> 00a62069 	.word	0xa62069
-0000035c <[^>]*> 00a62469 	0xa62469
+0000035c <[^>]*> 00a62469 	.word	0xa62469
 00000360 <[^>]*> 00002012 	mflo	a0
-00000364 <[^>]*> 00a62028 	0xa62028
+00000364 <[^>]*> 00a62028 	.word	0xa62028
-00000368 <[^>]*> 00a62228 	0xa62228
+00000368 <[^>]*> 00a62228 	.word	0xa62228
-0000036c <[^>]*> 00a62628 	0xa62628
+0000036c <[^>]*> 00a62628 	.word	0xa62628
-00000370 <[^>]*> 00a62268 	0xa62268
+00000370 <[^>]*> 00a62268 	.word	0xa62268
-00000374 <[^>]*> 00a62668 	0xa62668
+00000374 <[^>]*> 00a62668 	.word	0xa62668
-00000378 <[^>]*> 00a62428 	0xa62428
+00000378 <[^>]*> 00a62428 	.word	0xa62428
-0000037c <[^>]*> 00a62068 	0xa62068
+0000037c <[^>]*> 00a62068 	.word	0xa62068
-00000380 <[^>]*> 00a62468 	0xa62468
+00000380 <[^>]*> 00a62468 	.word	0xa62468
-00000384 <[^>]*> 00a62059 	0xa62059
+00000384 <[^>]*> 00a62059 	.word	0xa62059
-00000388 <[^>]*> 00a62258 	0xa62258
+00000388 <[^>]*> 00a62258 	.word	0xa62258
-0000038c <[^>]*> 00a62259 	0xa62259
+0000038c <[^>]*> 00a62259 	.word	0xa62259
-00000390 <[^>]*> 00a620d8 	0xa620d8
+00000390 <[^>]*> 00a620d8 	.word	0xa620d8
-00000394 <[^>]*> 00a620d9 	0xa620d9
+00000394 <[^>]*> 00a620d9 	.word	0xa620d9
-00000398 <[^>]*> 00a622d8 	0xa622d8
+00000398 <[^>]*> 00a622d8 	.word	0xa622d8
-0000039c <[^>]*> 00a622d9 	0xa622d9
+0000039c <[^>]*> 00a622d9 	.word	0xa622d9
-000003a0 <[^>]*> 00a62158 	0xa62158
+000003a0 <[^>]*> 00a62158 	.word	0xa62158
-000003a4 <[^>]*> 00a62159 	0xa62159
+000003a4 <[^>]*> 00a62159 	.word	0xa62159
-000003a8 <[^>]*> 00a62358 	0xa62358
+000003a8 <[^>]*> 00a62358 	.word	0xa62358
-000003ac <[^>]*> 00a62359 	0xa62359
+000003ac <[^>]*> 00a62359 	.word	0xa62359
-000003b0 <[^>]*> 00a621d8 	0xa621d8
+000003b0 <[^>]*> 00a621d8 	.word	0xa621d8
-000003b4 <[^>]*> 00a621d9 	0xa621d9
+000003b4 <[^>]*> 00a621d9 	.word	0xa621d9
-000003b8 <[^>]*> 00a623d8 	0xa623d8
+000003b8 <[^>]*> 00a623d8 	.word	0xa623d8
-000003bc <[^>]*> 00a623d9 	0xa623d9
+000003bc <[^>]*> 00a623d9 	.word	0xa623d9
-000003c0 <[^>]*> 00252642 	0x252642
+000003c0 <[^>]*> 00252642 	.word	0x252642
-000003c4 <[^>]*> 00c52046 	0xc52046
+000003c4 <[^>]*> 00c52046 	.word	0xc52046
-000003c8 <[^>]*> 0025267a 	0x25267a
+000003c8 <[^>]*> 0025267a 	.word	0x25267a
-000003cc <[^>]*> 0025267e 	0x25267e
+000003cc <[^>]*> 0025267e 	.word	0x25267e
-000003d0 <[^>]*> 0025267e 	0x25267e
+000003d0 <[^>]*> 0025267e 	.word	0x25267e
-000003d4 <[^>]*> 00c52056 	0xc52056
+000003d4 <[^>]*> 00c52056 	.word	0xc52056
 000003d8 <[^>]*> 7000003f 	sdbbp
-000003dc <[^>]*> 7000003e 	0x7000003e
+000003dc <[^>]*> 7000003e 	.word	0x7000003e
-000003e0 <[^>]*> 7003183d 	0x7003183d
+000003e0 <[^>]*> 7003183d 	.word	0x7003183d
-000003e4 <[^>]*> 7083183d 	0x7083183d
+000003e4 <[^>]*> 7083183d 	.word	0x7083183d
 000003e8 <[^>]*> 4004c803 	mfc0	a0,c0_perfcnt,3
 000003ec <[^>]*> 4004c802 	mfc0	a0,c0_perfcnt,2
 000003f0 <[^>]*> 4084c803 	mtc0	a0,c0_perfcnt,3
 000003f4 <[^>]*> 4084c802 	mtc0	a0,c0_perfcnt,2
 000003f8 <[^>]*> 4ac4100b 	c2	0xc4100b
-000003fc <[^>]*> 4886208b 	0x4886208b
+000003fc <[^>]*> 4886208b 	.word	0x4886208b
 00000400 <[^>]*> 4bcf218b 	c2	0x1cf218b
 00000404 <[^>]*> 4bdf310b 	c2	0x1df310b
 00000408 <[^>]*> 4ac4100c 	c2	0xc4100c
-0000040c <[^>]*> 4886208c 	0x4886208c
+0000040c <[^>]*> 4886208c 	.word	0x4886208c
 00000410 <[^>]*> 4bcf218c 	c2	0x1cf218c
 00000414 <[^>]*> 4bdf310c 	c2	0x1df310c
 00000418 <[^>]*> 4ac20001 	c2	0xc20001
@@ -280,77 +280,77 @@ Disassembly of section \.text:
 00000440 <[^>]*> 4bcf3004 	c2	0x1cf3004
 00000444 <[^>]*> 4bdf2004 	c2	0x1df2004
 00000448 <[^>]*> 4ac41007 	c2	0xc41007
-0000044c <[^>]*> 48862087 	0x48862087
+0000044c <[^>]*> 48862087 	.word	0x48862087
 00000450 <[^>]*> 4bcf2187 	c2	0x1cf2187
 00000454 <[^>]*> 4bdf3107 	c2	0x1df3107
 00000458 <[^>]*> 4ac41006 	c2	0xc41006
-0000045c <[^>]*> 48862086 	0x48862086
+0000045c <[^>]*> 48862086 	.word	0x48862086
 00000460 <[^>]*> 4bcf2186 	c2	0x1cf2186
 00000464 <[^>]*> 4bdf3106 	c2	0x1df3106
 00000468 <[^>]*> 4ac41030 	c2	0xc41030
-0000046c <[^>]*> 488620b0 	0x488620b0
+0000046c <[^>]*> 488620b0 	.word	0x488620b0
 00000470 <[^>]*> 4bcf21b0 	c2	0x1cf21b0
 00000474 <[^>]*> 4bdf3130 	c2	0x1df3130
 00000478 <[^>]*> 4ac20033 	c2	0xc20033
-0000047c <[^>]*> 48862033 	0x48862033
+0000047c <[^>]*> 48862033 	.word	0x48862033
 00000480 <[^>]*> 4bcf3033 	c2	0x1cf3033
 00000484 <[^>]*> 4bdf2033 	c2	0x1df2033
 00000488 <[^>]*> 4ac20433 	c2	0xc20433
-0000048c <[^>]*> 48862433 	0x48862433
+0000048c <[^>]*> 48862433 	.word	0x48862433
 00000490 <[^>]*> 4bcf3433 	c2	0x1cf3433
 00000494 <[^>]*> 4bdf2433 	c2	0x1df2433
 00000498 <[^>]*> 4ac20032 	c2	0xc20032
-0000049c <[^>]*> 48862032 	0x48862032
+0000049c <[^>]*> 48862032 	.word	0x48862032
 000004a0 <[^>]*> 4bcf3032 	c2	0x1cf3032
 000004a4 <[^>]*> 4bdf2032 	c2	0x1df2032
 000004a8 <[^>]*> 4ac20432 	c2	0xc20432
-000004ac <[^>]*> 48862432 	0x48862432
+000004ac <[^>]*> 48862432 	.word	0x48862432
 000004b0 <[^>]*> 4bcf3432 	c2	0x1cf3432
 000004b4 <[^>]*> 4bdf2432 	c2	0x1df2432
 000004b8 <[^>]*> 4ac4100f 	c2	0xc4100f
-000004bc <[^>]*> 4886208f 	0x4886208f
+000004bc <[^>]*> 4886208f 	.word	0x4886208f
 000004c0 <[^>]*> 4bcf218f 	c2	0x1cf218f
 000004c4 <[^>]*> 4bdf310f 	c2	0x1df310f
 000004c8 <[^>]*> 4ac4100e 	c2	0xc4100e
-000004cc <[^>]*> 4886208e 	0x4886208e
+000004cc <[^>]*> 4886208e 	.word	0x4886208e
 000004d0 <[^>]*> 4bcf218e 	c2	0x1cf218e
 000004d4 <[^>]*> 4bdf310e 	c2	0x1df310e
 000004d8 <[^>]*> 4ac41002 	c2	0xc41002
-000004dc <[^>]*> 48862082 	0x48862082
+000004dc <[^>]*> 48862082 	.word	0x48862082
 000004e0 <[^>]*> 4bcf2182 	c2	0x1cf2182
 000004e4 <[^>]*> 4bdf3102 	c2	0x1df3102
 000004e8 <[^>]*> 4ac41003 	c2	0xc41003
-000004ec <[^>]*> 48862083 	0x48862083
+000004ec <[^>]*> 48862083 	.word	0x48862083
 000004f0 <[^>]*> 4bcf2183 	c2	0x1cf2183
 000004f4 <[^>]*> 4bdf3103 	c2	0x1df3103
 000004f8 <[^>]*> 4ac4100a 	c2	0xc4100a
-000004fc <[^>]*> 4886208a 	0x4886208a
+000004fc <[^>]*> 4886208a 	.word	0x4886208a
 00000500 <[^>]*> 4bcf218a 	c2	0x1cf218a
 00000504 <[^>]*> 4bdf310a 	c2	0x1df310a
 00000508 <[^>]*> 4ac4100d 	c2	0xc4100d
-0000050c <[^>]*> 4886208d 	0x4886208d
+0000050c <[^>]*> 4886208d 	.word	0x4886208d
 00000510 <[^>]*> 4bcf218d 	c2	0x1cf218d
 00000514 <[^>]*> 4bdf310d 	c2	0x1df310d
-00000518 <[^>]*> 48a41018 	0x48a41018
+00000518 <[^>]*> 48a41018 	.word	0x48a41018
-0000051c <[^>]*> 4984101f 	0x4984101f
+0000051c <[^>]*> 4984101f 	.word	0x4984101f
-00000520 <[^>]*> 49c4101f 	0x49c4101f
+00000520 <[^>]*> 49c4101f 	.word	0x49c4101f
 00000524 <[^>]*> 4904101f 	bc2f	\$cc1,000045a4 <[^>]*>
-00000528 <[^>]*> 4944101f 	0x4944101f
+00000528 <[^>]*> 4944101f 	.word	0x4944101f
-0000052c <[^>]*> 48c62090 	0x48c62090
+0000052c <[^>]*> 48c62090 	.word	0x48c62090
 00000530 <[^>]*> 4bce3110 	c2	0x1ce3110
-00000534 <[^>]*> 48c62092 	0x48c62092
+00000534 <[^>]*> 48c62092 	.word	0x48c62092
 00000538 <[^>]*> 4bce3112 	c2	0x1ce3112
 0000053c <[^>]*> 4bcd00a0 	c2	0x1cd00a0
 00000540 <[^>]*> 4a0000bf 	c2	0xbf
-00000544 <[^>]*> 480000bf 	0x480000bf
+00000544 <[^>]*> 480000bf 	.word	0x480000bf
 00000548 <[^>]*> 490000bf 	bc2f	00000848 <[^>]*>
 0000054c <[^>]*> 4a00103e 	c2	0x103e
-00000550 <[^>]*> 4804103e 	0x4804103e
+00000550 <[^>]*> 4804103e 	.word	0x4804103e
-00000554 <[^>]*> 00c52046 	0xc52046
+00000554 <[^>]*> 00c52046 	.word	0xc52046
-00000558 <[^>]*> 00252442 	0x252442
+00000558 <[^>]*> 00252442 	.word	0x252442
-0000055c <[^>]*> 00c52056 	0xc52056
+0000055c <[^>]*> 00c52056 	.word	0xc52056
-00000560 <[^>]*> 0025207e 	0x25207e
+00000560 <[^>]*> 0025207e 	.word	0x25207e
-00000564 <[^>]*> 002520ba 	0x2520ba
+00000564 <[^>]*> 002520ba 	.word	0x2520ba
 00000568 <[^>]*> 4ca4200f 	prefx	0x4,a0\(a1\)
 0000056c <[^>]*> 42000020 	wait
 00000570 <[^>]*> 42000020 	wait

gas/testsuite/gas/mips/tls-o32.d

@@ -37,12 +37,12 @@ Disassembly of section .text:
   50:	24630000 	addiu	v1,v1,0
 			50: R_MIPS_TLS_DTPREL_LO16	tlsvar_ld
   54:	00621821 	addu	v1,v1,v0
-  58:	7c02283b 	0x7c02283b
+  58:	7c02283b 	.word	0x7c02283b
   5c:	8f830000 	lw	v1,0\(gp\)
 			5c: R_MIPS_TLS_GOTTPREL	tlsvar_ie
   60:	00000000 	nop
   64:	00621821 	addu	v1,v1,v0
-  68:	7c02283b 	0x7c02283b
+  68:	7c02283b 	.word	0x7c02283b
   6c:	3c030000 	lui	v1,0x0
 			6c: R_MIPS_TLS_TPREL_HI16	tlsvar_le
   70:	34630000 	ori	v1,v1,0x0

opcodes/disassemble.c

@@ -663,6 +663,11 @@ disassemble_init_for_target (struct disassemble_info * info)
       info->disassembler_needs_relocs = true;
       break;
 #endif
+#ifdef ARCH_mips
+    case bfd_arch_mips:
+      info->created_styled_output = true;
+      break;
+#endif
 #ifdef ARCH_m32c
     case bfd_arch_m32c:
       /* This processor in fact is little endian.  The value set here

opcodes/mips-dis.c

@@ -1173,82 +1173,87 @@ static void
 print_reg (struct disassemble_info *info, const struct mips_opcode *opcode,
 	   enum mips_reg_operand_type type, int regno)
 {
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
+
   switch (type)
     {
     case OP_REG_GP:
-      info->fprintf_func (info->stream, "%s", mips_gpr_names[regno]);
+      infprintf (info->stream, dis_style_register, "%s",
+		 mips_gpr_names[regno]);
       break;
 
     case OP_REG_FP:
-      info->fprintf_func (info->stream, "%s", mips_fpr_names[regno]);
+      infprintf (info->stream, dis_style_register, "%s",
+		 mips_fpr_names[regno]);
       break;
 
     case OP_REG_CCC:
       if (opcode->pinfo & (FP_D | FP_S))
-	info->fprintf_func (info->stream, "$fcc%d", regno);
+	infprintf (info->stream, dis_style_register, "$fcc%d", regno);
       else
-	info->fprintf_func (info->stream, "$cc%d", regno);
+	infprintf (info->stream, dis_style_register, "$cc%d", regno);
       break;
 
     case OP_REG_VEC:
       if (opcode->membership & INSN_5400)
-	info->fprintf_func (info->stream, "$f%d", regno);
+	infprintf (info->stream, dis_style_register, "$f%d", regno);
       else
-	info->fprintf_func (info->stream, "$v%d", regno);
+	infprintf (info->stream, dis_style_register, "$v%d", regno);
       break;
 
     case OP_REG_ACC:
-      info->fprintf_func (info->stream, "$ac%d", regno);
+      infprintf (info->stream, dis_style_register, "$ac%d", regno);
       break;
 
     case OP_REG_COPRO:
       if (opcode->name[strlen (opcode->name) - 1] == '0')
-	info->fprintf_func (info->stream, "%s", mips_cp0_names[regno]);
+	infprintf (info->stream, dis_style_register, "%s", mips_cp0_names[regno]);
       else
-	info->fprintf_func (info->stream, "$%d", regno);
+	infprintf (info->stream, dis_style_register, "$%d", regno);
       break;
 
     case OP_REG_CONTROL:
       if (opcode->name[strlen (opcode->name) - 1] == '1')
-	info->fprintf_func (info->stream, "%s", mips_cp1_names[regno]);
+	infprintf (info->stream, dis_style_register, "%s", mips_cp1_names[regno]);
       else
-	info->fprintf_func (info->stream, "$%d", regno);
+	infprintf (info->stream, dis_style_register, "$%d", regno);
       break;
 
     case OP_REG_HW:
-      info->fprintf_func (info->stream, "%s", mips_hwr_names[regno]);
+      infprintf (info->stream, dis_style_register, "%s", mips_hwr_names[regno]);
       break;
 
     case OP_REG_VF:
-      info->fprintf_func (info->stream, "$vf%d", regno);
+      infprintf (info->stream, dis_style_register, "$vf%d", regno);
       break;
 
     case OP_REG_VI:
-      info->fprintf_func (info->stream, "$vi%d", regno);
+      infprintf (info->stream, dis_style_register, "$vi%d", regno);
       break;
 
     case OP_REG_R5900_I:
-      info->fprintf_func (info->stream, "$I");
+      infprintf (info->stream, dis_style_register, "$I");
       break;
 
     case OP_REG_R5900_Q:
-      info->fprintf_func (info->stream, "$Q");
+      infprintf (info->stream, dis_style_register, "$Q");
       break;
 
     case OP_REG_R5900_R:
-      info->fprintf_func (info->stream, "$R");
+      infprintf (info->stream, dis_style_register, "$R");
       break;
 
     case OP_REG_R5900_ACC:
-      info->fprintf_func (info->stream, "$ACC");
+      infprintf (info->stream, dis_style_register, "$ACC");
       break;
 
     case OP_REG_MSA:
-      info->fprintf_func (info->stream, "$w%d", regno);
+      infprintf (info->stream, dis_style_register, "$w%d", regno);
       break;
 
     case OP_REG_MSA_CTRL:
-      info->fprintf_func (info->stream, "%s", msa_control_names[regno]);
+      infprintf (info->stream, dis_style_register, "%s",
+		 msa_control_names[regno]);
       break;
 
     }
@@ -1282,16 +1287,19 @@ init_print_arg_state (struct mips_print_arg_state *state)
 
 static void
 print_vu0_channel (struct disassemble_info *info,
-		   const struct mips_operand *operand, unsigned int uval)
+		   const struct mips_operand *operand, unsigned int uval,
+		   enum disassembler_style style)
 {
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
+
   if (operand->size == 4)
-    info->fprintf_func (info->stream, "%s%s%s%s",
+    infprintf (info->stream, style, "%s%s%s%s",
 			uval & 8 ? "x" : "",
 			uval & 4 ? "y" : "",
 			uval & 2 ? "z" : "",
 			uval & 1 ? "w" : "");
   else if (operand->size == 2)
-    info->fprintf_func (info->stream, "%c", "xyzw"[uval]);
+    infprintf (info->stream, style, "%c", "xyzw"[uval]);
   else
     abort ();
 }
@@ -1324,7 +1332,7 @@ mips_print_save_restore (struct disassemble_info *info, unsigned int amask,
 			 unsigned int s0, unsigned int s1,
 			 unsigned int frame_size)
 {
-  const fprintf_ftype infprintf = info->fprintf_func;
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
   unsigned int nargs, nstatics, smask, i, j;
   void *is = info->stream;
   const char *sep;
@@ -1348,16 +1356,20 @@ mips_print_save_restore (struct disassemble_info *info, unsigned int amask,
   sep = "";
   if (nargs > 0)
     {
-      infprintf (is, "%s", mips_gpr_names[4]);
+      infprintf (is, dis_style_register, "%s", mips_gpr_names[4]);
       if (nargs > 1)
-	infprintf (is, "-%s", mips_gpr_names[4 + nargs - 1]);
+	infprintf (is, dis_style_register, "-%s", mips_gpr_names[4 + nargs - 1]);
       sep = ",";
     }
 
-  infprintf (is, "%s%d", sep, frame_size);
+  infprintf (is, dis_style_text, "%s", sep);
+  infprintf (is, dis_style_immediate, "%d", frame_size);
 
   if (ra)			/* $ra */
-    infprintf (is, ",%s", mips_gpr_names[31]);
+    {
+      infprintf (is, dis_style_text, ",");
+      infprintf (is, dis_style_register, "%s", mips_gpr_names[31]);
+    }
 
   smask = 0;
   if (s0)			/* $s0 */
@@ -1370,21 +1382,34 @@ mips_print_save_restore (struct disassemble_info *info, unsigned int amask,
   for (i = 0; i < 9; i++)
     if (smask & (1 << i))
       {
-	infprintf (is, ",%s", mips_gpr_names[i == 8 ? 30 : (16 + i)]);
+	infprintf (is, dis_style_text, ",");
+	infprintf (is, dis_style_register, "%s",
+		   mips_gpr_names[i == 8 ? 30 : (16 + i)]);
 	/* Skip over string of set bits.  */
 	for (j = i; smask & (2 << j); j++)
 	  continue;
 	if (j > i)
-	  infprintf (is, "-%s", mips_gpr_names[j == 8 ? 30 : (16 + j)]);
+	  {
+	    infprintf (is, dis_style_text, "-");
+	    infprintf (is, dis_style_register, "%s",
+		       mips_gpr_names[j == 8 ? 30 : (16 + j)]);
+	  }
 	i = j + 1;
       }
   /* Statics $ax - $a3.  */
   if (nstatics == 1)
-    infprintf (is, ",%s", mips_gpr_names[7]);
+    {
+      infprintf (is, dis_style_text, ",");
+      infprintf (is, dis_style_register, "%s", mips_gpr_names[7]);
+    }
   else if (nstatics > 0)
-    infprintf (is, ",%s-%s",
+    {
-	       mips_gpr_names[7 - nstatics + 1],
+      infprintf (is, dis_style_text, ",");
-	       mips_gpr_names[7]);
+      infprintf (is, dis_style_register, "%s",
+		 mips_gpr_names[7 - nstatics + 1]);
+      infprintf (is, dis_style_text, "-");
+      infprintf (is, dis_style_register, "%s", mips_gpr_names[7]);
+    }
 }
 
 
@@ -1400,7 +1425,7 @@ print_insn_arg (struct disassemble_info *info,
 		bfd_vma base_pc,
 		unsigned int uval)
 {
-  const fprintf_ftype infprintf = info->fprintf_func;
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
   void *is = info->stream;
 
   switch (operand->type)
@@ -1413,9 +1438,9 @@ print_insn_arg (struct disassemble_info *info,
 	uval = mips_decode_int_operand (int_op, uval);
 	state->last_int = uval;
 	if (int_op->print_hex)
-	  infprintf (is, "0x%x", uval);
+	  infprintf (is, dis_style_immediate, "0x%x", uval);
 	else
-	  infprintf (is, "%d", uval);
+	  infprintf (is, dis_style_immediate, "%d", uval);
       }
       break;
 
@@ -1427,9 +1452,9 @@ print_insn_arg (struct disassemble_info *info,
 	uval = mint_op->int_map[uval];
 	state->last_int = uval;
 	if (mint_op->print_hex)
-	  infprintf (is, "0x%x", uval);
+	  infprintf (is, dis_style_immediate, "0x%x", uval);
 	else
-	  infprintf (is, "%d", uval);
+	  infprintf (is, dis_style_immediate, "%d", uval);
       }
       break;
 
@@ -1441,7 +1466,7 @@ print_insn_arg (struct disassemble_info *info,
 	uval += msb_op->bias;
 	if (msb_op->add_lsb)
 	  uval -= state->last_int;
-	infprintf (is, "0x%x", uval);
+	infprintf (is, dis_style_immediate, "0x%x", uval);
       }
       break;
 
@@ -1465,7 +1490,7 @@ print_insn_arg (struct disassemble_info *info,
 	pair_op = (const struct mips_reg_pair_operand *) operand;
 	print_reg (info, opcode, pair_op->reg_type,
 		   pair_op->reg1_map[uval]);
-	infprintf (is, ",");
+	infprintf (is, dis_style_text, ",");
 	print_reg (info, opcode, pair_op->reg_type,
 		   pair_op->reg2_map[uval]);
       }
@@ -1489,7 +1514,7 @@ print_insn_arg (struct disassemble_info *info,
       break;
 
     case OP_PERF_REG:
-      infprintf (is, "%d", uval);
+      infprintf (is, dis_style_register, "%d", uval);
       break;
 
     case OP_ADDIUSP_INT:
@@ -1499,7 +1524,7 @@ print_insn_arg (struct disassemble_info *info,
 	sval = mips_signed_operand (operand, uval) * 4;
 	if (sval >= -8 && sval < 8)
 	  sval ^= 0x400;
-	infprintf (is, "%d", sval);
+	infprintf (is, dis_style_immediate, "%d", sval);
 	break;
       }
 
@@ -1511,13 +1536,16 @@ print_insn_arg (struct disassemble_info *info,
 	reg2 = uval >> 5;
 	/* If one is zero use the other.  */
 	if (reg1 == reg2 || reg2 == 0)
-	  infprintf (is, "%s", mips_gpr_names[reg1]);
+	  infprintf (is, dis_style_register, "%s", mips_gpr_names[reg1]);
 	else if (reg1 == 0)
-	  infprintf (is, "%s", mips_gpr_names[reg2]);
+	  infprintf (is, dis_style_register, "%s", mips_gpr_names[reg2]);
 	else
-	  /* Bogus, result depends on processor.  */
+	  {
-	  infprintf (is, "%s or %s", mips_gpr_names[reg1],
+	    /* Bogus, result depends on processor.  */
-		     mips_gpr_names[reg2]);
+	    infprintf (is, dis_style_register, "%s", mips_gpr_names[reg1]);
+	    infprintf (is, dis_style_text, " or ");
+	    infprintf (is, dis_style_register, "%s", mips_gpr_names[reg2]);
+	  }
       }
       break;
 
@@ -1534,14 +1562,24 @@ print_insn_arg (struct disassemble_info *info,
       if (operand->size == 2)
 	{
 	  if (uval == 0)
-	    infprintf (is, "%s,%s",
+	    {
-		       mips_gpr_names[16],
+	      infprintf (is, dis_style_register, "%s",
-		       mips_gpr_names[31]);
+			 mips_gpr_names[16]);
+	      infprintf (is, dis_style_text, ",");
+	      infprintf (is, dis_style_register, "%s",
+			 mips_gpr_names[31]);
+	    }
 	  else
-	    infprintf (is, "%s-%s,%s",
+	    {
-		       mips_gpr_names[16],
+	      infprintf (is, dis_style_register, "%s",
-		       mips_gpr_names[16 + uval],
+			 mips_gpr_names[16]);
-		       mips_gpr_names[31]);
+	      infprintf (is, dis_style_text, "-");
+	      infprintf (is, dis_style_register, "%s",
+			 mips_gpr_names[16 + uval]);
+	      infprintf (is, dis_style_text, ",");
+	      infprintf (is, dis_style_register, "%s",
+			 mips_gpr_names[31]);
+	    }
 	}
       else
 	{
@@ -1551,26 +1589,40 @@ print_insn_arg (struct disassemble_info *info,
 	  if (s_reg_encode != 0)
 	    {
 	      if (s_reg_encode == 1)
-		infprintf (is, "%s", mips_gpr_names[16]);
+		infprintf (is, dis_style_register, "%s", mips_gpr_names[16]);
 	      else if (s_reg_encode < 9)
-		infprintf (is, "%s-%s",
+		{
-			   mips_gpr_names[16],
+		  infprintf (is, dis_style_register, "%s",
-			   mips_gpr_names[15 + s_reg_encode]);
+			     mips_gpr_names[16]);
+		  infprintf (is, dis_style_text, "-");
+		  infprintf (is, dis_style_register, "%s",
+			     mips_gpr_names[15 + s_reg_encode]);
+		}
 	      else if (s_reg_encode == 9)
-		infprintf (is, "%s-%s,%s",
+		{
-			   mips_gpr_names[16],
+		  infprintf (is, dis_style_register, "%s",
-			   mips_gpr_names[23],
+			     mips_gpr_names[16]);
-			   mips_gpr_names[30]);
+		  infprintf (is, dis_style_text, "-");
+		  infprintf (is, dis_style_register, "%s",
+			     mips_gpr_names[23]);
+		  infprintf (is, dis_style_text, ",");
+		  infprintf (is, dis_style_register, "%s",
+			     mips_gpr_names[30]);
+		}
 	      else
-		infprintf (is, "UNKNOWN");
+		infprintf (is, dis_style_text, "UNKNOWN");
 	    }
 
 	  if (uval & 0x10) /* For ra.  */
 	    {
 	      if (s_reg_encode == 0)
-		infprintf (is, "%s", mips_gpr_names[31]);
+		infprintf (is, dis_style_register, "%s", mips_gpr_names[31]);
 	      else
-		infprintf (is, ",%s", mips_gpr_names[31]);
+		{
+		  infprintf (is, dis_style_text, ",");
+		  infprintf (is, dis_style_register, "%s",
+			     mips_gpr_names[31]);
+		}
 	    }
 	}
       break;
@@ -1584,37 +1636,51 @@ print_insn_arg (struct disassemble_info *info,
 	amask = (uval >> 3) & 7;
 	if (amask > 0 && amask < 5)
 	  {
-	    infprintf (is, "%s", mips_gpr_names[4]);
+	    infprintf (is, dis_style_register, "%s", mips_gpr_names[4]);
 	    if (amask > 1)
-	      infprintf (is, "-%s", mips_gpr_names[amask + 3]);
+	      {
+		infprintf (is, dis_style_text, "-");
+		infprintf (is, dis_style_register, "%s",
+			   mips_gpr_names[amask + 3]);
+	      }
 	    sep = ",";
 	  }
 
 	smask = (uval >> 1) & 3;
 	if (smask == 3)
 	  {
-	    infprintf (is, "%s??", sep);
+	    infprintf (is, dis_style_text, "%s??", sep);
 	    sep = ",";
 	  }
 	else if (smask > 0)
 	  {
-	    infprintf (is, "%s%s", sep, mips_gpr_names[16]);
+	    infprintf (is, dis_style_text, "%s", sep);
+	    infprintf (is, dis_style_register, "%s", mips_gpr_names[16]);
 	    if (smask > 1)
-	      infprintf (is, "-%s", mips_gpr_names[smask + 15]);
+	      {
+		infprintf (is, dis_style_text, "-");
+		infprintf (is, dis_style_register, "%s",
+			   mips_gpr_names[smask + 15]);
+	      }
 	    sep = ",";
 	  }
 
 	if (uval & 1)
 	  {
-	    infprintf (is, "%s%s", sep, mips_gpr_names[31]);
+	    infprintf (is, dis_style_text, "%s", sep);
+	    infprintf (is, dis_style_register, "%s", mips_gpr_names[31]);
 	    sep = ",";
 	  }
 
 	if (amask == 5 || amask == 6)
 	  {
-	    infprintf (is, "%s%s", sep, mips_fpr_names[0]);
+	    infprintf (is, dis_style_text, "%s", sep);
+	    infprintf (is, dis_style_register, "%s", mips_fpr_names[0]);
 	    if (amask == 6)
-	      infprintf (is, "-%s", mips_fpr_names[1]);
+	      {
+		infprintf (is, dis_style_text, "-");
+		infprintf (is, dis_style_register, "%s", mips_fpr_names[1]);
+	      }
 	  }
       }
       break;
@@ -1638,12 +1704,14 @@ print_insn_arg (struct disassemble_info *info,
 	      if ((vsel & 1) == 0)
 		break;
 	    print_reg (info, opcode, OP_REG_VEC, uval);
-	    infprintf (is, "[%d]", vsel >> 1);
+	    infprintf (is, dis_style_text, "[");
+	    infprintf (is, dis_style_immediate, "%d", vsel >> 1);
+	    infprintf (is, dis_style_text, "]");
 	  }
 	else if ((vsel & 0x08) == 0)
 	  print_reg (info, opcode, OP_REG_VEC, uval);
 	else
-	  infprintf (is, "0x%x", uval);
+	  infprintf (is, dis_style_immediate, "0x%x", uval);
       }
       break;
 
@@ -1656,7 +1724,7 @@ print_insn_arg (struct disassemble_info *info,
       break;
 
     case OP_PC:
-      infprintf (is, "$pc");
+      infprintf (is, dis_style_register, "$pc");
       break;
 
     case OP_REG28:
@@ -1665,17 +1733,19 @@ print_insn_arg (struct disassemble_info *info,
 
     case OP_VU0_SUFFIX:
     case OP_VU0_MATCH_SUFFIX:
-      print_vu0_channel (info, operand, uval);
+      print_vu0_channel (info, operand, uval, dis_style_register);
       break;
 
     case OP_IMM_INDEX:
-      infprintf (is, "[%d]", uval);
+      infprintf (is, dis_style_text, "[");
+      infprintf (is, dis_style_immediate, "%d", uval);
+      infprintf (is, dis_style_text, "]");
       break;
 
     case OP_REG_INDEX:
-      infprintf (is, "[");
+      infprintf (is, dis_style_text, "[");
       print_reg (info, opcode, OP_REG_GP, uval);
-      infprintf (is, "]");
+      infprintf (is, dis_style_text, "]");
       break;
     }
 }
@@ -1803,7 +1873,7 @@ print_insn_args (struct disassemble_info *info,
 		 const struct mips_operand *(*decode_operand) (const char *),
 		 unsigned int insn, bfd_vma insn_pc, unsigned int length)
 {
-  const fprintf_ftype infprintf = info->fprintf_func;
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
   void *is = info->stream;
   struct mips_print_arg_state state;
   const struct mips_operand *operand;
@@ -1817,12 +1887,12 @@ print_insn_args (struct disassemble_info *info,
 	case ',':
 	case '(':
 	case ')':
-	  infprintf (is, "%c", *s);
+	  infprintf (is, dis_style_text, "%c", *s);
 	  break;
 
 	case '#':
 	  ++s;
-	  infprintf (is, "%c%c", *s, *s);
+	  infprintf (is, dis_style_text, "%c%c", *s, *s);
 	  break;
 
 	default:
@@ -1830,7 +1900,7 @@ print_insn_args (struct disassemble_info *info,
 	  if (!operand)
 	    {
 	      /* xgettext:c-format */
-	      infprintf (is,
+	      infprintf (is, dis_style_text,
 			 _("# internal error, undefined operand in `%s %s'"),
 			 opcode->name, opcode->args);
 	      return;
@@ -1872,9 +1942,13 @@ print_insn_args (struct disassemble_info *info,
 					   mips_cp0sel_names_len,
 					   reg, sel);
 	      if (n != NULL)
-		infprintf (is, "%s", n->name);
+		infprintf (is, dis_style_register, "%s", n->name);
 	      else
-		infprintf (is, "$%d,%d", reg, sel);
+		{
+		  infprintf (is, dis_style_register, "$%d", reg);
+		  infprintf (is, dis_style_text, ",");
+		  infprintf (is, dis_style_immediate, "%d", sel);
+		}
 	    }
 	  else
 	    {
@@ -1917,7 +1991,7 @@ print_insn_mips (bfd_vma memaddr,
 #define GET_OP(insn, field)			\
   (((insn) >> OP_SH_##field) & OP_MASK_##field)
   static const struct mips_opcode *mips_hash[OP_MASK_OP + 1];
-  const fprintf_ftype infprintf = info->fprintf_func;
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
   const struct mips_opcode *op;
   static bool init = 0;
   void *is = info->stream;
@@ -1995,19 +2069,20 @@ print_insn_mips (bfd_vma memaddr,
 	      if (!validate_insn_args (op, decode_mips_operand, word))
 		continue;
 
-	      infprintf (is, "%s", op->name);
+	      infprintf (is, dis_style_mnemonic, "%s", op->name);
 	      if (op->pinfo2 & INSN2_VU0_CHANNEL_SUFFIX)
 		{
 		  unsigned int uval;
 
-		  infprintf (is, ".");
+		  infprintf (is, dis_style_mnemonic, ".");
 		  uval = mips_extract_operand (&mips_vu0_channel_mask, word);
-		  print_vu0_channel (info, &mips_vu0_channel_mask, uval);
+		  print_vu0_channel (info, &mips_vu0_channel_mask, uval,
+				     dis_style_mnemonic);
 		}
 
 	      if (op->args[0])
 		{
-		  infprintf (is, "\t");
+		  infprintf (is, dis_style_text, "\t");
 		  print_insn_args (info, op, decode_mips_operand, word,
 				   memaddr, 4);
 		}
@@ -2020,7 +2095,9 @@ print_insn_mips (bfd_vma memaddr,
 
   /* Handle undefined instructions.  */
   info->insn_type = dis_noninsn;
-  infprintf (is, "0x%x", word);
+  infprintf (is, dis_style_assembler_directive, ".word");
+  infprintf (is, dis_style_text, "\t");
+  infprintf (is, dis_style_immediate, "0x%x", word);
   return INSNLEN;
 }
 
@@ -2034,7 +2111,7 @@ print_mips16_insn_arg (struct disassemble_info *info,
 		       unsigned insn, bool use_extend,
 		       unsigned extend, bool is_offset)
 {
-  const fprintf_ftype infprintf = info->fprintf_func;
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
   void *is = info->stream;
   const struct mips_operand *operand, *ext_operand;
   unsigned short ext_size;
@@ -2049,7 +2126,7 @@ print_mips16_insn_arg (struct disassemble_info *info,
     case ',':
     case '(':
     case ')':
-      infprintf (is, "%c", type);
+      infprintf (is, dis_style_text, "%c", type);
       break;
 
     default:
@@ -2057,7 +2134,7 @@ print_mips16_insn_arg (struct disassemble_info *info,
       if (!operand)
 	{
 	  /* xgettext:c-format */
-	  infprintf (is, _("# internal error, undefined operand in `%s %s'"),
+	  infprintf (is, dis_style_text, _("# internal error, undefined operand in `%s %s'"),
 		     opcode->name, opcode->args);
 	  return;
 	}
@@ -2189,7 +2266,7 @@ enum match_kind
 static int
 print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
 {
-  const fprintf_ftype infprintf = info->fprintf_func;
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
   int status;
   bfd_byte buffer[4];
   const struct mips_opcode *op, *opend;
@@ -2224,7 +2301,9 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
 	    gotslot = bfd_getb32 (buffer);
 	  else
 	    gotslot = bfd_getl32 (buffer);
-	  infprintf (is, ".word\t0x%x", gotslot);
+	  infprintf (is, dis_style_assembler_directive, ".word");
+	  infprintf (is, dis_style_text, "\t");
+	  infprintf (is, dis_style_immediate, "0x%x", gotslot);
 
 	  return 4;
 	}
@@ -2311,9 +2390,9 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
 	{
 	  const char *s;
 
-	  infprintf (is, "%s", op->name);
+	  infprintf (is, dis_style_mnemonic, "%s", op->name);
 	  if (op->args[0] != '\0')
-	    infprintf (is, "\t");
+	    infprintf (is, dis_style_text, "\t");
 
 	  init_print_arg_state (&state);
 	  for (s = op->args; *s != '\0'; s++)
@@ -2359,9 +2438,13 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
 					       mips_cp0sel_names_len,
 					       reg, sel);
 		  if (n != NULL)
-		    infprintf (is, "%s", n->name);
+		    infprintf (is, dis_style_register, "%s", n->name);
 		  else
-		    infprintf (is, "$%d,%d", reg, sel);
+		    {
+		      infprintf (is, dis_style_register, "$%d", reg);
+		      infprintf (is, dis_style_text, ",");
+		      infprintf (is, dis_style_immediate, "%d", sel);
+		    }
 		}
 	      else
 		switch (match)
@@ -2398,7 +2481,9 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
     }
 #undef GET_OP
 
-  infprintf (is, "0x%x", first);
+  infprintf (is, dis_style_assembler_directive, ".short");
+  infprintf (is, dis_style_text, "\t");
+  infprintf (is, dis_style_immediate, "0x%x", first);
   info->insn_type = dis_noninsn;
 
   return 2;
@@ -2409,7 +2494,7 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info)
 static int
 print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
 {
-  const fprintf_ftype infprintf = info->fprintf_func;
+  const fprintf_styled_ftype infprintf = info->fprintf_styled_func;
   const struct mips_opcode *op, *opend;
   void *is = info->stream;
   bfd_byte buffer[2];
@@ -2449,7 +2534,7 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
       status = (*info->read_memory_func) (memaddr + 2, buffer, 2, info);
       if (status != 0)
 	{
-	  infprintf (is, "micromips 0x%x", higher);
+	  infprintf (is, dis_style_text, "micromips 0x%x", higher);
 	  (*info->memory_error_func) (status, memaddr + 2, info);
 	  return -1;
 	}
@@ -2478,11 +2563,11 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
 	  if (!validate_insn_args (op, decode_micromips_operand, insn))
 	    continue;
 
-	  infprintf (is, "%s", op->name);
+	  infprintf (is, dis_style_mnemonic, "%s", op->name);
 
 	  if (op->args[0])
 	    {
-	      infprintf (is, "\t");
+	      infprintf (is, dis_style_text, "\t");
 	      print_insn_args (info, op, decode_micromips_operand, insn,
 			       memaddr + 1, length);
 	    }
@@ -2515,7 +2600,12 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
 	}
     }
 
-  infprintf (is, "0x%x", insn);
+  if (length == 2)
+    infprintf (is, dis_style_assembler_directive, ".short");
+  else
+    infprintf (is, dis_style_assembler_directive, ".word");
+  infprintf (is, dis_style_text, "\t");
+  infprintf (is, dis_style_immediate, "0x%x", insn);
   info->insn_type = dis_noninsn;
 
   return length;