This fixes the following compile errors reported by Clang:
CC config/obj-elf-attr.o
../../gas/config/obj-elf-attr.c:64:21: error: a function declaration without a prototype is deprecated in all versions of C [-Werror,-Wstrict-prototypes]
64 | oav1_attr_info_init ()
| ^
| void
../../gas/config/obj-elf-attr.c:74:21: error: a function declaration without a prototype is deprecated in all versions of C [-Werror,-Wstrict-prototypes]
74 | oav1_attr_info_exit ()
| ^
| void
gas/
* config/obj-elf-attr.c (oav1_attr_info_init,
oav1_attr_info_exit): Explicitly code void parameter list.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
The aarch64 ABI states that long branch veneers may be added to
facilitate linking code that is beyond the range of a 26-bit call or
branch; but it requires that the target symbol be a function symbol.
Ensure that this latter condition is maintained by rejecting
relaxation of a static function symbol to it's section symbol.
Note that there should probably be a fix to the linker to enforce this
during link time. I've not done this for now because that might break
some existing object code that has been built with older versions of
gas. At some point we should revisit this.
This change also causes a small change in the LD testsuite: instead of
generating some veneers with the section name we now (correctly)
generate them using the name of the called function.
Update testsuite/gas/symver/symver15.l to expect:
Error: multiple versions [`foo@version2'|`foo@version1'] for symbol `foo'
* testsuite/gas/symver/symver15.l: Expect '|'.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Update or1k_apply_fix to handle all TLS relocations.
PR gas/33426
* config/tc-or1k.c (or1k_apply_fix): Handle all TLS relocations.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Previously, sframe_xlate_do_remember_state () relied exclusively on
last_fre (the last Frame Row Entry for the previous PC range block). At
the start of a function (before an advance in location), last_fre is
NULL. The intent of DW_CFA_remember_state, however, is to simply
snapshot the state of the call frame information at the time. In terms
of SFrame generation, this means that we should simply look at cur_fre
(the scratchpad FRE currently being built from initial CFI
instructions in the current context).
Remove the common-empty-1.s which assumed that .cfi_startproc,
immediately followed by a .cfi_remember_state is not present out in the
wild. Its best to not make such an assumption, as such a sequence is
valid CFI, FWIW.
Initial CFI are arch-specific, so add a new testcase for x86_64 to check
.cfi_remember_state handling for SFrame is sensible. While at at, also
add a new testcase for s390x.
Co-Authored-by: Jens Remus <jremus@linux.ibm.com>
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
gas/
PR gas/33756
* gen-sframe.c (sframe_xlate_do_remember_state): Use cur_fre.
gas/testsuite/
* gas/cfi-sframe/cfi-sframe.exp: Adjust common-empty-1 test to
be repurposed as cfi-sframe-x86_64-pr33756. Add s390x testcase.
* gas/cfi-sframe/common-empty-1.d: Removed.
* gas/cfi-sframe/common-empty-1.s: Removed.
* gas/cfi-sframe/cfi-sframe-x86_64-pr33756.d: New test.
* gas/cfi-sframe/cfi-sframe-x86_64-pr33756.s: New test.
* gas/cfi-sframe/cfi-sframe-s390x-pr33756.d: New test.
* gas/cfi-sframe/cfi-sframe-s390x-pr33756.s: New test.
Some consumers, like SFrame generation logic in GAS, may want to check
reloc value (without qualifying by e->type) as a part of their
admissibility criteria. Setting reloc to TC_PARSE_CONS_RETURN_NONE for
these CFI escape expr nodes for [su]leb128 keeps the admissibility
checks simple and generic.
Previous discussion here:
https://sourceware.org/pipermail/binutils/2025-December/146807.html
gas/
* gas/dw2gencfi.c (dot_cfi_escape): Set reloc to
TC_PARSE_CONS_RETURN_NONE.
This patch adds support for PLB invalidate operation (PLBI) instruction
and the corresponding system registers as operand (<plbi_op>).
Syntax: PLBI <plbi_op>{, <Xt>}
This instruction is an alias to "SYS #<op1>, C10, <Cm>, #<op2>{, <Xt>}"
and PLBI being the preferred disassembly.
The following list of system registers are supported in this patch for the
PLBI instructions enabled by "+poe2" flag and also the "nxs" variants of
these system registers are enabled by "+poe2+xs" flag.
* alle1
* alle1is
* alle1os
* alle2
* alle2is
* alle2os
* alle3
* alle3is
* alle3os
* aside1
* aside1is
* aside1os
* permae1
* permae1is
* permae1os
* perme1
* perme1is
* perme1os
* perme2
* perme2is
* perme2os
* perme3
* perme3is
* perme3os
* vmalle1
* vmalle1is
* vmalle1os
This patch adds support for FEAT_TEV feature enabled by "+tev"
flag along with support for following instructions.
* TENTER
* TEXIT
TENTER instruction uses the existing AARCH64_OPND_NOT_BALANCED_17 operand
to handle the not_balanced (NB) argument , where as a new operand
AARCH64_OPND_NOT_BALANCED_10 is added to support the NB (not_balanced)
argument in TEXIT instruction.
This patch adds support for POE2 system registers which are available
by default, however if guarding restrictions are enabled
using -menable-sysreg-checking than "+poe2" option need to specified
to the -march.
Co-authored-by: Matthew Malcomson <matthew.malcomson@arm.com>
This patch adds support for FEAT_S1POE2 feature enabled by "+poe2"
flag along with support for following instructions.
* TCHANGEB (immediate)
* TCHANGEB (register)
* TCHANGEF (immediate)
* TCHANGEF (register)
A new operand AARCH64_OPND_NOT_BALANCED_17 is added to the code in this
patch to support the new optional argument "NB" (not_balanced) which
is a 1-bit field in the encoding for all the above mentioned
instructions.
Co-authored-by: Matthew Malcomson <matthew.malcomson@arm.com>
The idea of this patch is to match the solaris target over other
targets if e_ident contains ELFOSABI_SOLARIS. The solaris target will
continue to recognise ELFOSABI_NONE objects.
This has the side effect of disabling gnu features that require
ELFOSABI_GNU, such as ifuncs. I think that is correct, so I've made
the required testsuite changes to fix the resulting regressions:
FAIL: nm --ifunc-chars (assembly)
FAIL: mbind sections without SHF_ALLOC
The patch also sets ELF_OSABI for the gnu x86 and sparc targets,
for the same reason as the solaris targets. This doesn't mean object
files will automatically be marked ELFOSABI_GNU/LINUX. As before that
will only happen when certain GNU extensions are present.
bfd/
* elf32-i386.c: Define ELF_OSABI for solaris and gnu targets.
* elf32-sparc.c: Likewise.
* elf64-sparc.c: Likewise.
* elf64-x86-64.c: Likewise.
* format.c (bfd_check_format_matches): Bump match_priority
for matching e_ident EI_OSABI.
binutils/
* testsuite/binutils-all/nm.exp: Use !supports_gnu_osabi to
disable ifunc test.
gas/
* testsuite/gas/elf/section13.d: Only run on supports_gnu_osabi
targets. Remove xfails.
"const struct elf_backend_data" appears many places in the source,
and in some cases makes a line too long without wrapping. This patch
introduces a "typedef const struct elf_backend_data elf_backend_data;"
and uses it throughout binutils sources, with a few exceptions for c++
use of header files.
Found by oss-fuzz.
* stabs.c (s_xstab): Check result of demand_copy_C_string.
(s_stab_generic): Remove duplicate warning and ignore_r_o_l
after demand_copy_C_string error.
Avoid warnings about invalid escapes in etc/update-copyright.py by
using raw strings, add BinutilsFilter to skip psql.rc and add
"Kalray SA." as another copyright holder.
The za operands of most movaz instructions were originally printed with
an extra space compared to other za operands. Remove this space, and
reduce code duplication in the process.
While the .d form is preferred for disassembly, assemblers should accept
any element size that is used consistently. The sme2_mov class handles
this already for mov instructions, so use that here as well.
This patch includes:
- The feature flag for the FEAT_F16F32MM feature.
- Instruction FMMLA Half-precision matrix multiply-accumulate to single-precision.
This includes the instructions for the F16F32DOT feature:
- FDOT half-precision to single-precision, by element
- FDOT half-precision to single-precision, vector
It makes sense to keep all internal state related to registers
(cfa_base_reg, fp_reg) reset to SFRAME_FRE_REG_INVALID.
While at it, also make sure fp_reg state is copied over when intializing
an SFrame FRE.
gas/
* gen-sframe.c (sframe_row_entry_new): Reset to
SFRAME_FRE_REG_INVALID.
(sframe_row_entry_initialize): Copy over fp_reg too.
(sframe_xlate_do_offset): Adjust accordingly.
Minor refactoring. Carve out the SFrame FRE offsets emission code into
a new output_sframe_row_entry_offsets (). This change helps prepare for
later supporting a new FDE type in SFrame V3.
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
gas/
* gen-sframe.c (output_sframe_row_entry_offsets): New
definition.
(output_sframe_row_entry): Use the new definition.
Minor refactoring. Will be needed later for supporting flexible topmost
frames in SFrame V3.
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
gas/
* gen-sframe.c (output_sframe_row_entry): Use new argument.
(output_sframe_internal): Likewise.
... between specification and implmentation.
Move to definition in the implementation (gas/ld/libsframe) and not the
specification (include/sframe.h). At this time the implementation in
gas and ld generate the sections in the latest SFrame version only.
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
bfd/
* elf-sframe.c: Add definition here.
gas/
* gen-sframe.c: Likewise.
libsframe/
* sframe.c: Likewise.
include/
* sframe.h: Remove the definition.
For ABIs not tracking RA (e.g., AMD64), the return address is expected
to be in a specific location (usually a fixed offset from CFA on stack).
Explicit manourvering to a different offset may be non-representable in
SFrame, and should not be simply ignored.
Although such patterns are not usually seen in the wild, it is more
correct to catch them if at all they manifest.
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
gas/
* gen-sframe.c (sframe_xlate_do_offset): Do not ignore
.cfi_offset for RA all the time.
This reverts commit df174a6b76.
commit df174a6b76
Date: Thu Jul 4 10:34:12 2024 +0200
gas: Don't skip SFrame FDE if .cfi_register specifies RA w/o tracking
Do not skip SFrame FDE if .cfi_register specifies RA register without
RA tracking being actually used. Without RA tracking the register
contents can always be restored from the stack using the fixed
RA offset from CFA.
Even for ABI/arch without RA tracking, there may be instances where user
may specify '.cfi_register RA, reg'. This needs to be caught, skipping
this from SFrame generation may not be correct. This may be done in
certain hand-written asm sequences where the user needs to manipulate
the return to a certain function.
No testcase is being added ATM because in SFrame V3, a new FDE type can
be used to represent such cases (A new test case will be added then).
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
This patch adds as_info(), a shortened version of as_info_where(),
for emitting informational diagnostics from Gas.
This new helper provides the same formatting and source location
handling as as_info_where(), while offering a simpler interface
for the common case. It respects the --no-info flag, and supports
indentation in the same way as its sibling.
A previous commit [1] mistakenly removed support for Object Attributes
for LoongArch targets.
This patch adds back the OA feature into Gas for the LoongArch targets
following the new approach which consists in:
- defining TC_OBJ_ATTR to 1 in tc-loongarch.h
- enabling the compilation of obj-elf-attr.c in gas/configure.ac
[1]: 28a51085ae
Much like everything in gen-sframe.c, these functions are supposed to
never be reached when SFrame isn't supported by a target. Adding
respective assertions reduces code size for such targets, while at the
same time adding consistency checking for targets which optionally
support the feature.
First, pei-x86-64 is meaningless for gas; it's a linker output target, not
one object files would use. Next, coff-x86-64 is meaningless for TE_PE
(and really coff-x86-64 isn't currently provided by any libbfd
configuration anyway). Then, of the three ones left exactly one is a
possible candidate for a given gas configuration. Checking others as well
would only lead to (possibly cryptic) errors later. And finally, even for
ELF we want to check for the one target which i386_target_format() would
also use. This last aspect then applies to --x32 handling as well (just
that there it's benign right now, as only one target exists starting
"elf32-x86-64".
The restoring of the line pointer needs to happen in more cases.
While there also adjust a slightly misleading comment.
Reviewed-by: Jens Remus <jremus@linux.ibm.com>
ud ui5, also known as amswap.w rd,$r1,rj(rd==rj), is displayed as
"ud ui5" by default during disassembly. Alternatively, the original
instruction can be printed using the objdump -M no-aliases.
To implement this support, a format specifier "ru0:5,ru5:5" for ud is
applied exclusively during disassembly. This specifier indicates that
registers should be printed using their corresponding numeric values,
and when the instruction is identified as ud, only a single parameter
is displayed.
binutils/
* testsuite/binutils-all/loongarch64/dis-amswap-ud-noaliases.d:
New test.
* testsuite/binutils-all/loongarch64/dis-amswap-ud.d: New test.
* testsuite/binutils-all/loongarch64/dis-amswap-ud.s: New test.
gas/
* testsuite/gas/loongarch/macro_ud.d: Update test.
include/
* opcode/loongarch.h: New macro.
opcodes/
* loongarch-dis.c (get_loongarch_opcode_by_binfmt): Correct match `ud`.
(dis_one_arg): Disassemble the `ud` parameter.
* loongarch-opc.c: Add opcode for "ud" alias.
While at it, use the same pattern for cleaning up memory in
sframe_xlate_ctx_cleanup.
gas/
* gen-sframe.c (sframe_xlate_ctx_cleanup): Use the same pattern
for free'ing memory consistently.
(sframe_xlate_ctx_finalize): Free up remember_fre.
This patch adds support for new BTI <target> "r" (instruction: bti r),
which is an alias to "bti" (with no target), for both "bti" and "bti r"
the preferred disassembly is "bti r". This "bti r" instruction is by
default available from Armv8-A architecture.
The HINT_OPD_F_NOPRINT macro has become redundant with these changes
and has been removed.
There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
