Commit Graph

3373 Commits

Author SHA1 Message Date
Indu Bhagat
0bdf18b8a5 [SFrame-V3] sframe: gas: bfd: add support for signal frames
Reserve a bit in function info byte in the SFrame FDE to designate
signal frames.

Also update the SFrame opt code in GAS and dumping routines in libsframe
to handle signal frame bit.

include/
	* sframe.h (SFRAME_V3_FDE_SIGNAL_P): Extract signal frame bit.
	(SFRAME_V3_FDE_UPDATE_SIGNAL_P): Set signal frame bit.
gas/
	* gen-sframe.c (get_dw_fde_signal_p): New function to retrieve signal
	frame state from DWARF FDE.
	(sframe_v3_set_func_info): Renamed from sframe_v1_set_func_info.
	Accept signal_p argument and encode it.
	(sframe_set_version): Update ops to use sframe_v3_set_func_info.
	(sframe_set_func_info): Pass signal_p to the ops hook.
	(output_sframe_funcdesc): Retrieve signal frame marker and pass to
	sframe_set_func_info.
	* gen-sframe.h (struct sframe_version_ops): Update set_func_info
	signature.
	* sframe-opt.c (sframe_convert_frag): Preserve signal_p bit during
	fragment conversion.  While at it, use SFRAME_V3_* macros where
	applicable.
libsframe/testsuite/
	* gas/cfi-sframe/cfi-sframe-common-13.d: New test.
	* gas/cfi-sframe/cfi-sframe-common-13.s: New test.
	* gas/cfi-sframe/cfi-sframe.exp: Run new test.
libsframe/
	* sframe-dump.c (dump_sframe_func_with_fres): Decode signal frame bit
	and print "S" attribute in the dump output.
2026-01-15 17:02:24 -08:00
Indu Bhagat
982b494403 [SFrame-V3] include: libsframe: bfd: gas: testsuite: support for signed 64-bit offset in SFrame FDE
This change enables support text > 2 GiB in SFrame format.

Each SFrame FDE needs to hold information about the start PC of the
function it pertains to.  Currently, the field 'sfde_func_start_address'
in SFrame FDE is encoded as a 32-bit offset to the start PC of the
function from the field itself.

In SFrame V2, this offset was a signed 32-bit offset.  The signedness
gives the flexibility of having .sframe ELF section before or after the
.text* sections.  But the size of 32-bit puts the limitation that
.sframe togther with the .text* sections must fit the 2 GiB range.

Currently, if the linker sees the offset not representable as 32-bit
signed offset, it issues an error (not seen in the wild, simulated by
forcing a function to align via an '.align  2147483648' directive):

  test.o:(.sframe+0x1c): relocation truncated to fit: R_X86_64_PC32 against `.text'
  make: *** [Makefile:7: all] Error 1

ATM, EH Frame also suffers with the same issue.

Moving forward, some cloud applications have been shown to be nearing
1.5 GiB threshold.  Extending the offset to int64_t now seems to be good
choice to make now for future-proof'ing the sections.

The use of int64_t offset is done for all SFrame V3 sections.  This
bump from int32_t to int64_t should not lead to an increase in the size
of SFrame sections, because of the following additional changes to the
SFrame FDE specification:
  - Reduce the type of sfde_func_num_fres (from uint32_t to uint16_t)
  - Remove the 2 bytes of padding (sfde_func_padding2). These served the
    two-fold purpose of keeping FDE data aligned _and_ unused space for
    future needs.

Now that the offset is int64_t, start using the
sframe_decoder_get_funcdesc_v3 () instead of
sframe_decoder_get_funcdesc_v2 () in GNU ld.

This patch changes the offset type in the SFrame FDE definition to an
int64_t.  No further changes in gas are necessary because the code
already accounts for writing out as per the size of the member of the
struct:

  emit_expr (&exp, sizeof_member (sframe_func_desc_entry,
                                  sfde_func_start_offset));

bfd/
	* elf-sframe.c (sframe_read_value): Signed offset for start PC
	is 8-bytes now.
	(_bfd_elf_merge_section_sframe): Likewise.
	* elf64-s390.c (_bfd_s390_elf_create_sframe_plt): Use V3 API.
	(elf_s390_finish_dynamic_sections): Signed offset for start PC
	is 8-bytes now.
	* elfxx-x86.c (_bfd_x86_elf_create_sframe_plt): Use V3 API.
	(_bfd_x86_elf_finish_dynamic_sections): Signed offset for start
	PC is 8-bytes now.
gas/
	* sframe.c (output_sframe_funcdesc): Rename to
	sfde_func_start_offset.
libsframe/
	* libsframe/sframe.c (sframe_fde_tbl_init): Rename to
	sfde_func_start_offset.
	(flip_fde): Likewise.
	(sframe_decoder_get_secrel_func_start_addr): Use int64_t.
	(sframe_fre_check_range_p): Likewise.
	(sframe_decoder_get_offsetof_fde_start_addr): Rename to
	sfde_func_start_offset.
	(sframe_get_funcdesc_with_addr_internal): Use int64_t.
	(sframe_find_fre): Likewise.
	(sframe_encoder_get_offsetof_fde_start_addr): Rename to
	sfde_func_start_offset.
	(sframe_encoder_add_funcdesc_internal): Use int64_t.
	(sframe_encoder_add_funcdesc): Likewise.  And rename to
	sfde_func_start_offset.
	(sframe_encoder_write_fde): Rename to sfde_func_start_offset.
libsframe/testsuite/
	* libsframe.decode/DATA2: Regenerate the data file.
	* libsframe.encode/encode-1.c: Use int64_t for start pc offset.
	* libsframe.find/findfre-1.c: Likewise.
	* libsframe.find/findfunc-1.c: Likewise.
	* libsframe.find/plt-findfre-1.c: Likewise.
	* libsframe.find/plt-findfre-2.c: Likewise.
include/
	* sframe-api.h (sframe_find_fre): Update arg type to int64_t.
	(sframe_encoder_add_funcdesc): Likewise.
	* sframe.h: Change data type to int64_t.
2026-01-15 17:02:24 -08:00
Indu Bhagat
ed8de13c68 [SFrame-V3] sframe: gas: libsframe: remove padding field from FDE
Remove the unused sfde_func_padding2 member from the
sframe_func_desc_entry_v3 structure.

A later patch in this series reorganizes the members of the FDE
structure in a way explicit padding is no longer necessary to keep
natural alignment.  So remove the explicit padding now.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

include/
	* sframe.h: Remove sfde_func_padding2 from
	sframe_func_desc_entry_v3.
gas/
	* gen-sframe.c (output_sframe_funcdesc): Stop writing
	sfde_func_padding2.
libsframe/
	* sframe.c (sframe_encoder_write_fde): Stop writing
	sfde_func_padding2.
	* testsuite/libsframe.decode/DATA2: Regenerate binary test data.
2026-01-15 17:02:24 -08:00
Indu Bhagat
5775384269 [SFrame-V3] sframe: gas: libsframe: use uint16_t for num_fres of FDE
Reduce the size of the num_fres field in the Function Descriptor Entry
(FDE) from 32 bits to 16 bits.

The number of Frame Row Entries (FREs) for a single function is extremely
unlikely to exceed 65,535 in real-world scenarios. Reducing this field
saves 2 bytes per FDE, contributing to a smaller overall SFrame section size.

(BTW, these savings will be eaten up by a later commit which adds
support for text > 2 GiB by increasing an offset from int32_t to
int64_t).

Safety checks are added to the assembler to warn and skip SFrame FDE
generation if a function's FRE count exceeds UINT16_MAX.

Note regarding alignment: With the current patch, the members of
sframe_func_desc_entry_v3 are not at aligned boundaries anymore.  Recall
that all sframe_func_desc_entry_v3 entries are stored together in the
"SFrame FDE sub-section" forming an index.  Only after a later patch in
the series "[29/36] [SFrame-V3] include: gas: libsframe: split FDE into
desc and attr" will the alignment properties of SFrame index will be
restored.

include/
	* sframe.h (sframe_func_desc_entry_v3): Change sfde_func_num_fres
	type to uint16_t.
gas/
	* gen-sframe.c (output_sframe_funcdesc): Write 2 bytes for num_fres
	and assert it fits in uint16_t.
	(sframe_do_fde): Add check to skip FDE emission if num_fres exceeds
	UINT16_MAX.
libsframe/
	* sframe.c (sframe_encoder_write_fde): Cast num_fres to uint16_t
	to ensure correctly written out data.
	* testsuite/libsframe.decode/DATA2: Update binary test data.
2026-01-15 17:02:24 -08:00
Indu Bhagat
20477cd103 [SFrame-V3] libsframe: add V3 APIs for adding and getting SFrame FDE
(Similar to V2) Add two new APIs for adding and getting SFrame FDE:
 - sframe_encoder_add_funcdesc_v3
 - sframe_decoder_get_funcdesc_v3

Note the argument for the function start address is int64_t instead of
int32_t (the latter is used in sframe_encoder_add_funcdesc_v2 and
sframe_encoder_get_funcdesc_v2).  The new V3 APIs will be used in a
subsequent commit to extend SFrame V3 to support text > 2 GiB by
allowing int64_t offsets by default.

Similar to the analogous V2 APIs, they return 0 on success and
SFRAME_ERR (in case of sframe_decoder_get_funcdesc_v3) or error code (in
case of sframe_encoder_add_funcdesc_v3) on failure.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

include/
	* sframe-api.h (sframe_decoder_get_funcdesc_v3): New
	declaration.
	(sframe_encoder_add_funcdesc_v3): Likewise.
libsframe/
	* libsframe.ver: Add the new APIs.
	* sframe.c (sframe_decoder_get_funcdesc_v3): New definition.
	(sframe_encoder_add_funcdesc_v3): Likewise.
2026-01-15 17:02:24 -08:00
Indu Bhagat
2d6c3272da [SFrame-V3] sframe: gas: bfd: ld: format bump to version 3
Bump version to SFRAME_VERSION_3.  Introduce a new definition of SFrame
FDE for version 3, which is a duplicate of SFrame FDE in V2, for now.
In other words, no changes to the format specification yet.

GNU as emits SFrame V3 by default.  SFrame encoder (ld) emits SFrame V3
sections.  In a later commit, we will add a new command line option to
gas: --gsframe-3 which will bind the implementation in gas to emit
SFrame V3.

Also, adjust the testcases for the new version string
"SFRAME_VERSION_3".

bfd/
	* elf-sframe.c (_bfd_elf_merge_section_sframe): Linker emits
	the latest version by default.
	* elf64-s390.c (_bfd_s390_elf_create_sframe_plt): Linker emitted
	PLT sections are also SFRAME_VERSION_3.
	* elfxx-x86.c (_bfd_x86_elf_create_sframe_plt): Likewise.
gas/
	* gen-sframe.c (sframe_set_version): GAS emits SFrame V3 by
	default.
	(output_sframe): Likewise.
libsframe/
	* sframe-dump.c (dump_sframe): Enable dumping for both
	SFRAME_VERSION_2 and SFRAME_VERSION_3.
include/ChangeLog:
	* sframe.h (SFRAME_VERSION_3): New definition.
	(SFRAME_VERSION): Current version is now SFRAME_VERSION_3.
	(SFRAME_V3_FDE_FUNC_INFO): New definition.
	(SFRAME_V3_FDE_FRE_TYPE): Likewise.
	(SFRAME_V3_FDE_PC_TYPE): Likewise.
	(SFRAME_V3_AARCH64_FDE_PAUTH_KEY): Likewise.
	(SFRAME_V3_FDE_UPDATE_PAUTH_KEY): Likewise.
binutils/testsuite/
	* all affected tests: Replace SFRAME_VERSION_2 with
	SFRAME_VERSION_3.
gas/testsuite/
	* all affected tests: Likewise.
ld/testsuite/
	* all affected tests: Likewise.
libsframe/testsuite/
	* all affected tests: Likewise.
2026-01-15 17:02:24 -08:00
Indu Bhagat
8bfa079ba5 [SFrame-V3] sframe: use const for sframe_decoder_ctx object arg
As the library version will be bumped soon, include this change now.
Note the arg names in sframe-dump.c APIs have 'sfd_ctx' instead of the
usual 'dctx'.  We can address this cosmetic change at a later time.
Other cosmetic changes, e.g. to make fixing function-level comments more
consistent, are left out of the patch for now.

Additionally, constify the return type of static function
sframe_decoder_get_header, now that the call sites consistently use a
const object.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>
2026-01-15 17:02:24 -08:00
Indu Bhagat
1c63bcda87 [SFrame-V3] libsframe: remove old sframe_decoder_get_funcdesc API
sframe_decoder_get_funcdesc () was added for SFRAME_VERSION_1.  This has
since been obsoleted by introduction of SFRAME_VERSION_2 and its
corresponding sframe_decoder_get_funcdesc_v2 API.

Remove from the version script file as well.  We will bump the version
of the library to 3.0.0 in a subsequent patch (closer to release) and
consolidate the entries into a new LIBSFRAME_3.0 node.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

include/
	* sframe-api.h (sframe_decoder_get_funcdesc): Remove.
libsframe/
	* libsframe.ver: Likewise.
	* sframe.c (sframe_decoder_get_funcdesc): Remove definition.
2026-01-15 17:02:23 -08:00
Kito Cheng
44c3932467 RISC-V: Add second-pass relaxation for JAL to C.J/C.JAL
When linker relaxation converts CALL (auipc+jalr, 8 bytes) to JAL
(4 bytes), further relaxation to C.J or C.JAL (2 bytes) may become
possible as code shrinks and jump distances decrease.

This patch adds _bfd_riscv_relax_jal to perform this second-pass
relaxation.  To enable this, we introduce R_RISCV_DELETE_AND_RELAX,
a new internal relocation that combines piecewise deletion with
preservation of relaxation capability.  When _bfd_riscv_relax_call
relaxes CALL to JAL, it marks the deletion as R_RISCV_DELETE_AND_RELAX
instead of R_RISCV_DELETE.  After the piecewise deletion is resolved,
R_RISCV_DELETE_AND_RELAX is converted back to R_RISCV_RELAX at the
JAL instruction offset, allowing _bfd_riscv_relax_jal to further
relax JAL to C.J/C.JAL.

C.JAL is only available on RV32 (rd=ra), while C.J is available on
both RV32 and RV64 (rd=x0).

Changes since v1:
- Use R_RISCV_DELETE_AND_RELAX with piecewise deletion instead of
  calling _riscv_relax_delete_immediate directly, to maintain
  relaxation performance.
- Add preserve_relax parameter to riscv_relax_delete_bytes to
  simplify the logic in _bfd_riscv_relax_call.
2026-01-15 12:04:57 +08:00
Nick Clifton
8872d02b0f Sync libiberty sources with gcc master version 2026-01-07 11:33:07 +00:00
Srinath Parvathaneni
43d523e207 aarch64: Add support for POE2 PLBI instruction
This patch adds support for PLB invalidate operation (PLBI) instruction
and the corresponding system registers as operand (<plbi_op>).

Syntax: PLBI <plbi_op>{, <Xt>}

This instruction is an alias to "SYS #<op1>, C10, <Cm>, #<op2>{, <Xt>}"
and PLBI being the preferred disassembly.

The following list of system registers are supported in this patch for the
PLBI instructions enabled by "+poe2" flag and also the "nxs" variants of
these system registers are enabled by "+poe2+xs" flag.

   * alle1
   * alle1is
   * alle1os
   * alle2
   * alle2is
   * alle2os
   * alle3
   * alle3is
   * alle3os
   * aside1
   * aside1is
   * aside1os
   * permae1
   * permae1is
   * permae1os
   * perme1
   * perme1is
   * perme1os
   * perme2
   * perme2is
   * perme2os
   * perme3
   * perme3is
   * perme3os
   * vmalle1
   * vmalle1is
   * vmalle1os
2026-01-05 17:50:55 +00:00
Srinath Parvathaneni
859d7ccd9f aarch64: Add support for TEV instructions
This patch adds support for FEAT_TEV feature enabled by "+tev"
flag along with support for following instructions.

* TENTER
* TEXIT

TENTER instruction uses the existing AARCH64_OPND_NOT_BALANCED_17 operand
to handle the not_balanced (NB) argument , where as a new operand
AARCH64_OPND_NOT_BALANCED_10 is added to support the NB (not_balanced)
argument in TEXIT instruction.
2026-01-05 17:50:43 +00:00
Srinath Parvathaneni
37fd5c9428 aarch64: Add support for POE2 instructions
This patch adds support for FEAT_S1POE2 feature enabled by "+poe2"
flag along with support for following instructions.

* TCHANGEB (immediate)
* TCHANGEB (register)
* TCHANGEF (immediate)
* TCHANGEF (register)

A new operand AARCH64_OPND_NOT_BALANCED_17 is added to the code in this
patch to support the new optional argument "NB" (not_balanced) which
is a 1-bit field in the encoding for all the above mentioned
instructions.

Co-authored-by:  Matthew Malcomson <matthew.malcomson@arm.com>
2026-01-05 17:50:24 +00:00
Alan Modra
c8f306af2f Update year range in copyright notice of binutils files
Avoid warnings about invalid escapes in etc/update-copyright.py by
using raw strings, add BinutilsFilter to skip psql.rc and add
"Kalray SA." as another copyright holder.
2026-01-01 23:22:14 +10:30
Alice Carlotti
1db7006c37 aarch64: Remove sme2_movaz instruction class
The behaviour of sme2_movaz was identical to sme_misc, so use that
instead.
2025-12-29 12:03:03 +00:00
Sivan Shani
d8d024ad42 AArch64 v9.7 extensions: FEAT_SVE_B16MM
This patch includes:
  - Feature flag for FEAT_SVE_B16MM
  - Instruction:
      - BFMMLA (non-widening) BFloat16 matrix multiply-accumulate.
2025-12-27 12:45:53 +00:00
Sivan Shani
3eb520ce6a AArch64 v9.7 extensions: FEAT_F16MM
This patch includes:
  - Feature flag for FEAT_F16MM
  - Instructions:
	- FMMLA (non-widening) Half-precision matrix multiply-accumulate
	- FMMLA (non-widening) Floating-point matrix multiply-accumulate
2025-12-27 12:45:53 +00:00
Sivan Shani
a6956e0c79 AArch64: Add FEAT_F16F32MM
This patch includes:
    - The feature flag for the FEAT_F16F32MM feature.
    - Instruction FMMLA Half-precision matrix multiply-accumulate to single-precision.
2025-12-27 12:45:52 +00:00
Sivan Shani
4373edd2f6 AArch64: Add FEAT_F16F32DOT instructions
This includes the instructions for the F16F32DOT feature:
    - FDOT half-precision to single-precision, by element
    - FDOT half-precision to single-precision, vector
2025-12-27 12:45:52 +00:00
Sivan Shani
a722387a1f AArch64: Add FEAT_SVE2p3 and FEAT_SME2p3 instructions.
This patch includes:

    - Flags for the FEAT_SVE2p3 and FEAT_SME2p3 features.
    - Instructions:
      - ADDQP
      - ADDSUBP
      - FCVTZSN
      - FCVTZUN
      - LUTI6 16-bit
      - LUTI6 8-bit
      - SABAL
      - SCVTF
      - SCVTFLT
      - SDOT vectors
      - SDOT indexed
      - SQRSHRN
      - SQRSHRUN
      - SQSHRN
      - SQSHRUN
      - SUBP
      - UABAL
      - UCVTF
      - UCVTFLT
      - UDOT vectors
      - UDOT indexed
      - UQRSHRN
      - UQSHRN
      - LUTI6 vector
      - LUTI6 table, four registers
      - LUTI6 table, single, 8-bit

    In addition, new operands:
      - OPND_SME_Zmx2_INDEX_22: an operand represents a list of vector registers with an index.
      - OPND_SME_Zn7xN_UNTYPED: an operand represents an untyped list of vector registers.
2025-12-27 12:19:23 +00:00
Yury Khrustalev
242e78b76a aarch64: Add FEAT_MOPS_GO instructions
Also add +mops-go feature flag and make the mops-go feature
depend on the memtag and mops features.
2025-12-27 09:23:51 +00:00
Alan Modra
4dc7130975 PR 33726, symbols in excluded sections
This improves "nearby" section choice when memory regions are active,
preferring a section in the same region as the excluded section over
other sections.

	PR 33726
include/
	* bfdlink.h (struct bfd_link_callbacks): Add nearby_section.
	(_bfd_nearby_section): Delete.
	(bfd_fix_excluded_sec_syms): Rename and remove bfd param from
	_bfd_fix_excluded_sec_syms.
bfd/
	* linker.c (_bfd_nearby_section): Delete.
	(fix_syms): Use linker callback.
	* elflink.c (elf_link_input_bfd): Likewise.
	(_bfd_elf_final_link): Update.
ld/
	* ldemul.c (finish_default): Update.
	* ldlang.c (lang_output_section_get): Delete.
	(ldlang_nearby_section): New function.
	* ldlang.h (ldlang_nearby_section): Declare.
	(lang_output_section_get): New static inline.
	* ldmain.c (link_callbacks): Add ldlang_nearby_section.
2025-12-26 10:54:53 +10:30
Indu Bhagat
7ca80bc6da libsframe: refactor sframe_decoder_add_funcdesc for internal use
sframe_encoder_add_funcdesc () was added for SFRAME_VERSION_1.  This has
since been obsoleted by introduction of SFRAME_VERSION_2 and its
corresponding sframe_decoder_add_funcdesc_v2 API.

Refactor the functionality into an internal-only API:
sframe_encoder_add_funcdesc_internal (). Ensure it returns the error
code for the caller to take necessary action or pass to user.

Keep only two args for sframe_encoder_add_funcdesc: function size and
function start addr.  This simple barebone API will be used in a
subsequent commit to adjust the link-time behaviour of SFrame sections.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

include/
	* sframe-api.h (sframe_encoder_add_funcdesc): Remove args to
	create the barebone API.
libsframe/
	* sframe.c (sframe_encoder_add_funcdesc): Refactor out into
	sframe_encoder_add_funcdesc_internal.  Change args.
	(sframe_encoder_add_funcdesc_v2): Use the new internal API.
	* libsframe.ver: Move sframe_encoder_add_funcdesc to 2.1 node.
2025-12-24 00:51:43 -08:00
Indu Bhagat
610a98f0f8 include: sframe: add SFRAME_V2_ prefixed macro names for FDE
Such a change for readability only.  SFrame V1 is now obsolete, and with
newer versions like V3 or later, its likely better to have macro names
reflect the applicable version.

Add new macro names for FDE information related macros.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

include/
	* sframe.h (SFRAME_V2_FUNC_INFO): New definition.
	(SFRAME_V2_FUNC_FRE_TYPE): Likewise.
	(SFRAME_V2_FUNC_PC_TYPE): Likewise.
	(SFRAME_V2_FUNC_PAUTH_KEY): Likewise.
	(SFRAME_V2_FUNC_INFO_UPDATE_PAUTH_KEY): Likewise.
2025-12-24 00:41:18 -08:00
Indu Bhagat
f5d28014be include: gas: bfd: sframe: clean the abstraction
... between specification and implmentation.

Move to definition in the implementation (gas/ld/libsframe) and not the
specification (include/sframe.h).  At this time the implementation in
gas and ld generate the sections in the latest SFrame version only.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

bfd/
	* elf-sframe.c: Add definition here.
gas/
	* gen-sframe.c: Likewise.
libsframe/
	* sframe.c: Likewise.
include/
	* sframe.h: Remove the definition.
2025-12-23 14:59:59 -08:00
Indu Bhagat
4651bea119 bfd: include: sframe: fix PR ld/32789
Currently, when SFrame sections are emitted after linking the input
SFrame sections, the SFrame FDEs are sorted on start PC.  Doing so for
relocatable links has no effect (SFrame FDEs remain in place), because
the start PC is unrelocated data.  For relocatable links, then, the
emitted SFrame FDEs in the output section remain in the same order as
that in the respective input BFD.

The assembler does not guarantee the emission of SFrame FDEs in the same
order as the placement of the associated .text* sections,
(SFRAME_F_FDE_SORTED is not set in the ET_REL objs generated by GAS).
This means setting SFRAME_F_FDE_SORTED by the linker was wrong when:
  - doing relocatable link, and
  - the input bfds contain multiple .text sections, say .text.hot,
    .text.init, .text.unlikely etc.

For relocatable links, skip sorting the SFrame FDEs.  Do not set
SFRAME_F_FDE_SORTED for relocatable links.

This is achieved by adding an explicit argument (bool sort_fde_p) to the
sframe_encoder_write API.  Move the API from 2.0 to the 2.1 node as this
is an ABI-incompatible change.  Skip bumping the "current" in
libsframe/libtool-version ATM, we will do so closer to release.

When writing of SFrame data for PLT entries, indicate sort_fde_p to
false: these sections are like the other SFrame sections for any other
ET_REL binary.

Add a test in ld/testsuite/ld-sframe/sframe.exp, these tests are run for
all ABIs supported for SFrame.  In this test, for object file generated
for pr32789-1a.c:
  - the emitted SFrame FDEs by GAS are in the order of the .text* in the
    input assembly (i.e., .text.init, .text, .text.exit)
  - the emitted .text* sections by GAS are placed in the following order
    .text, .text.init, .text.exit.
  - GAS does not set SFRAME_F_FDE_SORTED, as expected.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

bfd/
	PR ld/32789
	* elf-sframe.c (_bfd_elf_write_section_sframe): Skip sorting the
	SFrame FDEs for relocatable links.
	* elf64-s390.c (_bfd_s390_elf_write_sframe_plt): Additional
	argument to sframe_encoder_write.
	* elfxx-x86.c (_bfd_x86_elf_write_sframe_plt): Likewise.
libsframe/
	* libsframe.ver: Move from 2.0 node to 2.1.
	* sframe.c (sframe_encoder_write_sframe): Conditionalize based
	on argument sort_fde_p.
	(sframe_encoder_write): New argument to indicate whether SFrame
	FDEs are to be sorted in output.
include/
	* sframe-api.h (sframe_encoder_write): New argument.
ld/testsuite/
	PR ld/32789
	* ld/testsuite/ld-sframe/sframe.exp: New test.
	* ld/testsuite/ld-sframe/pr32789-1.rd: New test.
	* ld/testsuite/ld-sframe/pr32789-1.sd: New test.
	* ld/testsuite/ld-sframe/pr32789-1a.c: New test.
	* ld/testsuite/ld-sframe/pr32789-1b.c: New test.
	* ld/testsuite/ld-x86-64/sframe-reloc-1.d: Remove
	SFRAME_F_FDE_SORTED.
2025-12-19 23:11:45 -08:00
Lulu Cai
8bea934667 LoongArch: Add disassembly support for ud ui5
ud ui5, also known as amswap.w rd,$r1,rj(rd==rj), is displayed as
"ud ui5" by default during disassembly. Alternatively, the original
instruction can be printed using the objdump -M no-aliases.

To implement this support, a format specifier "ru0:5,ru5:5" for ud is
applied exclusively during disassembly. This specifier indicates that
registers should be printed using their corresponding numeric values,
and when the instruction is identified as ud, only a single parameter
is displayed.

binutils/

        * testsuite/binutils-all/loongarch64/dis-amswap-ud-noaliases.d:
	  New test.
        * testsuite/binutils-all/loongarch64/dis-amswap-ud.d: New test.
        * testsuite/binutils-all/loongarch64/dis-amswap-ud.s: New test.

gas/

        * testsuite/gas/loongarch/macro_ud.d: Update test.

include/

        * opcode/loongarch.h: New macro.

opcodes/

        * loongarch-dis.c (get_loongarch_opcode_by_binfmt): Correct match `ud`.
        (dis_one_arg): Disassemble the `ud` parameter.
        * loongarch-opc.c: Add opcode for "ud" alias.
2025-12-20 10:49:47 +08:00
Srinath Parvathaneni
d0514e7441 aarch64: Add support for new BTI <target> "r"
This patch adds support for new BTI <target> "r" (instruction: bti r),
which is an alias to "bti" (with no target), for both "bti" and "bti r"
the preferred disassembly is "bti r". This "bti r" instruction is by
default available from Armv8-A architecture.

The HINT_OPD_F_NOPRINT macro has become redundant with these changes
and has been removed.
2025-12-15 11:01:49 +00:00
Jan Beulich
9d977686cf bfd/ELF: fold BFD_RELOC_<arch>_RELATIVE
There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
2025-12-15 11:29:33 +01:00
Jan Beulich
9f47dd41af bfd/ELF: fold BFD_RELOC_<arch>_J{,U}MP_SLOT
There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
2025-12-15 11:29:19 +01:00
Jan Beulich
846bf17a36 bfd/ELF: fold BFD_RELOC_<arch>_GLOB_DAT
There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
2025-12-15 11:28:50 +01:00
Jan Beulich
c77b97d2d8 bfd/ELF: fold BFD_RELOC_<arch>_COPY
There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do. Arm64, C-Sky,
and KVX - sadly - are exceptions.
2025-12-15 11:28:14 +01:00
Vignesh Balasubramanian
e2b607517e bfd: Add minimal support to handle note that describes xsave layout
This note section is already supported by Linux kernel.
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/x86/kernel/fpu/xstate.c?id=ba386777a30b38dabcc7fb8a89ec2869a09915f7

Co-Authored-By: Jini Susan George <jinisusan.george@amd.com>
2025-12-12 14:59:49 +01:00
Richard Ball
4f9b9eaa24 aarch64: Add support for FEAT_LSCP
This patch adds the new instructions from FEAT_LSCP.
These instructions are LDAP, LDAPP and STLP.
2025-12-11 14:10:42 +00:00
mengqinggang
d17b290265 LoongArch: Add linker relaxation for got_pcadd_hi20 and got_pcadd_lo12
.L1:
pcaddu12i $t0, %got_pcadd_hi20(a)     -> pcaddu12i $t0, %pcadd_hi20(a)
ld.w/d $t0, $t0, %got_pcadd_lo12(.L1) -> addi.w/d $t0, $t0, %pcadd_lo12(.L1)
2025-12-10 16:06:48 +08:00
mengqinggang
82f67b063b LoongArch: Add support for tls type transition on LA32
desc -> le
ie -> le
desc -> ie

For desc/ie -> le, need to change the symbol of le_lo12 to the symbol of
[desc|ie]_pcadd_hi20.
2025-12-10 16:06:48 +08:00
mengqinggang
529e366dd9 LoongArch: Add LA32 and LA32R relocations
LA32 and LA32R do not have pcaddu18i.
LA32R does not have pcalau12i.

Add R_LARCH_CALL30 for pcaddu12i + jirl used in LA32 and LA32R.
Add R_LARCH_*_PCADD_HI20 for pcaddu12i used in LA32R.
Add R_LARCH_*_PCADD_LO12 for addi.w/ld.w used in LA32R.
2025-12-10 16:06:47 +08:00
Lulu Cai
9bb91ce42f LoongArch: Add support for the ud macro instruction
In the "ud ui5" macro, the value of ui5 must be in the range 0–31. It
expands to "amswap.w $rd, $r1, $rj", where ui5 specifies the register
number for $rd in the amswap.w instruction, and $rd == $rj.

The test case have been adjusted to no longer report errors for illegal
operands of the amswap.w instruction.

gas/

	* config/tc-loongarch.c (check_this_insn_before_appending): No
	  longer check amswap.w.
	* testsuite/gas/loongarch/illegal-operand.l: Update.
	* testsuite/gas/loongarch/illegal-operand.s: Update.
	* testsuite/gas/loongarch/macro_ud.d: New test.
	* testsuite/gas/loongarch/macro_ud.s: New test.

include/

	* opcode/loongarch.h: Add new macro for amswap.w.

opcodes/

	* loongarch-opc.c: Add macro for ud.
2025-12-09 17:06:26 +08:00
H.J. Lu
c6ba94c86b elf: Add SHT_SUNW_ctf and SHT_SUNW_symnsort
On Solaris 11.4, there is SHT_SUNW_symnsort and no SHT_SUNW_symtabnsort.
SHT_SUNW_symnsort is defined to 0x6fffffec, which is the same as
SHT_SUNW_symtabnsort.  There is also SHT_SUNW_ctf.  Add SHT_SUNW_ctf and
rename SHT_SUNW_symtabnsort to SHT_SUNW_symnsort.  Move SHT_SUNW_phname
after SHT_SUNW_symnsort.

binutils/

	* readelf.c (get_solaris_section_type): Add SHT_SUNW_ctf and
	SHT_SUNW_symnsort.  Move SHT_SUNW_phname after SHT_SUNW_symnsort.
	Remove SHT_SUNW_symtabnsort.

include/

	* elf/common.h (SHT_SUNW_ctf): New.
	(SHT_SUNW_symtabnsort): Renamed to ...
	(SHT_SUNW_symnsort): This.
	(SHT_SUNW_phname): Moved after SHT_SUNW_symnsort.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-12-08 15:19:12 +08:00
Alice Carlotti
7fc6ffb18e aarch64: Improve comment for aarch64_opnd_info.sysreg.flags
This field is used differently during assembly and disassembly.  It
would be nice if we could make this more consistent, but for now just
extend the comment to explain what is going on.
2025-12-04 16:21:55 +00:00
Nick Clifton
40a04cee22 Synchronize the dwarf2.h and dwarf2.def files with their gcc counterparts, bringing the definitions of DW_AT_language_name and DW_AT_language_version. Add code to binutils/dwarf.c to display these attributes. 2025-12-02 11:06:01 +00:00
timurgol007
3241ec3eca RISC-V: Fixed opcodes for some bitmanip instructions
Currently some of the instructions in bitmanip extensions can not be obtained
using DECLARE_INSN macros. I generated them using riscv-opcodes and added to
other opcodes.

Approved-By: Nelson Chu <nelson@rivosinc.com>
2025-11-21 22:33:09 +03:00
Ezra Sitorus
3c3f58814b bfd/ELF: Core file support for AArch64 FPMR
The Floating Point Mode Register is a new register which controls the
behaviour of FP8 instructions. This is handled by the Linux kernel
through a new NT_ARM_FPMR register set.

This patch adds required code to support core file dumps with
NT_ARM_FPMR in them.
2025-11-17 12:47:09 +00:00
Indu Bhagat
b91966e2df libsframe: rename encoder to ectx for readability
Addressing (an old) review comment suggesting this housekeeping item.
Use consistent naming style in libsframe.  sframe_decoder_ctx objects
are named 'dctx', so use 'ectx' for sframe_encoder_ctx objects.

Make necessary changes in all the applicable declarations and definitions.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>
2025-11-09 00:34:27 -08:00
H.J. Lu
2be0f2da21 readelf: Display the base symbol version as empty string
Update readelf to display the base symbol version as

Symbol table for image contains 5 entries:
   Num:    Value          Size Type    Bind   Vis      Ndx Name
     0: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
     1: 0000000000003008     0 OBJECT  GLOBAL DEFAULT   10 bar@@
     2: 0000000000000000     0 OBJECT  GLOBAL DEFAULT  ABS VERS_1
     3: 0000000000003008     0 OBJECT  GLOBAL DEFAULT   10 bar@@VERS_1
     4: 0000000000003000     0 OBJECT  GLOBAL DEFAULT   10 foo@

instead of

Symbol table for image contains 5 entries:
   Num:    Value          Size Type    Bind   Vis      Ndx Name
     0: 0000000000000000     0 NOTYPE  LOCAL  DEFAULT  UND
     1: 0000000000003008     0 OBJECT  GLOBAL DEFAULT   10 bar
     2: 0000000000000000     0 OBJECT  GLOBAL DEFAULT  ABS VERS_1
     3: 0000000000003008     0 OBJECT  GLOBAL DEFAULT   10 bar@@VERS_1
     4: 0000000000003000     0 OBJECT  GLOBAL DEFAULT   10 foo

That is bar@@ and foo@ vs bar and foo.

binutils/

	PR binutils/33599
	* readelf.c (process_version_sections): Replace 0x8001 with
	(VERSYM_HIDDEN | VERSYM_BASE).
	(get_symbol_version_string): Likewise.  Return "" for the base
	version.

include/

	PR binutils/33599
	* elf/common.h (VERSYM_BASE): New.

ld/

	PR binutils/33599
	* testsuite/ld-elf/pr33599.d: New file.
	* testsuite/ld-elf/pr33599.map: Likewise.
	* testsuite/ld-elf/pr33599.s: Likewise.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-11-08 06:39:42 +08:00
Indu Bhagat
dfb31cd02b include: sframe: fix minor typos in sframe_decode
Change argument names (in declaration) to SF_BUF and SF_SIZE (instead of
the current CF_BUF and CF_SIZE respectively).

include/
        * sframe-api.h (sframe_decode): Fix typos.  Use same name as
	used for the definition.
2025-11-04 23:28:43 -08:00
Jan Beulich
caccc182b5 bfd: replace _bfd_merge_sections() hook with simple boolean
There's no need for a hook; what needs doing is uniform, the question is
only whether to perform any merging (i.e. whether other parts of a backend
are capable of dealing with the effects).

Where _bfd_nolink_bfd_merge_sections() was used, false is hardcoded. For
ELF no real target override is permitted; true is hardcoded except for the
cases where bfd_generic_merge_sections() was used as the hook function
before.
2025-10-24 15:11:39 +02:00
Jan Beulich
0bdfbd3710 bfd: move merge_info from ELF to general link hash table
This is in prepration of supporting section merging also when the output
isn't ELF (or not of the same class).
2025-10-24 15:08:33 +02:00
Indu Bhagat
8ac9c2cda9 include: sframe: rename sframe_func_desc_entry to use an explicit v2
As SFrame format evolves, this will be useful to refer to v2 on-disk
layout directly as the format evolves.

Reviewed-by: Jens Remus <jremus@linux.ibm.com>

include/
        * sframe.h (struct sframe_func_desc_entry): Rename to tag v2.
2025-10-19 21:03:27 -07:00
Jens Remus
5079bf8959 gas: sframe: Represent .cfi_undefined RA as FRE without offsets
In DWARF CFI an "undefined" register rule for the return address (RA)
register indicates that there is no return address and the stack trace
is complete.

Represent DW_CFA_undefined as SFrame FRE without any offsets, so that a
stack tracer implementation can use this as indication that an outermost
frame has been reached and the stack trace is complete.

This representation is backward compatible, as existing stack tracers
should already deal with the case, that an SFrame FRE a so far invalid
offset count of zero and stop the trace.

include/
	* sframe.h (SFRAME_V2_FRE_RA_UNDEFINED_P): New macro to test
	FRE info word for RA undefined (FRE without any offsets).

binutils/
	* NEWS: Mention SFrame can represent an undefined RA as FRE
	without	any offsets.

gas/
	* gen-sframe.h (struct sframe_row_entry): Add ra_undefined_p
	flag.
	* gen-sframe.c (sframe_row_entry_new): Initialize ra_undefined_p
	flag to not set.
	(sframe_row_entry_initialize): Treat ra_undefined_p flag as
	sticky.
	(sframe_fre_set_ra_track): Reset ra_undefined_p flag.
	(sframe_xlate_do_restore): Reset ra_undefined_p flag to saved
	state.
	(sframe_xlate_do_same_value): Reset ra_undefined_p flag.
	(sframe_xlate_do_cfi_undefined): For RA set ra_undefined_p flag.
	(output_sframe_row_entry): Represent RA undefined as SFrame FRE
	without any offsets and FRE info word fields zeroed.
	* NEWS: Mention assembler represents .cfi_undefined RA in SFrame
	as FRE without any offsets.

libsframe/
	* doc/sframe-spec.texi (Changes from Version 1 to Version 2):
	Mention that a SFrame FRE without any offsets flag indicates an
	outermost frame with an undefined RA.
	(fre_offset_count): Document that a FRE offset count of zero
	indicates an outermost frame with an undefined RA.
	* sframe.c (sframe_get_fre_ra_undefined_p): Use macro
	SFRAME_V2_FRE_RA_UNDEFINED_P.
	(sframe_fre_get_fp_offset, sframe_fre_get_ra_offset): Do not
	return fixed FP/RA offset if RA undefined.
	* sframe-dump.c (dump_sframe_func_with_fres): Show FRE without
	any offsets as "RA undefined".

gas/testsuite/
	* gas/cfi-sframe/cfi-sframe.exp: Run tests for .cfi_undefined RA
	on AArch64, s390x, and x86-64.
	* gas/cfi-sframe/cfi-sframe-aarch64-ra-undefined-1.d: Add test
	for .cfi_undefined RA on AArch64.
	* gas/cfi-sframe/cfi-sframe-aarch64-ra-undefined-1.s: Likewise.
	* as/cfi-sframe/cfi-sframe-s390x-ra-undefined-1.d: Add test
	for .cfi_undefined RA on s390x.
	* gas/cfi-sframe/cfi-sframe-s390x-ra-undefined-1.s: Likewise.
	* gas/cfi-sframe/cfi-sframe-x86_64-ra-undefined-1.d: Add test
	for .cfi_undefined RA on x86-64.
	* gas/cfi-sframe/cfi-sframe-x86_64-ra-undefined-1.s: Likewise.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
2025-10-15 17:45:48 +02:00