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GDB, gdbserver: aarch64-linux: Initial Guarded Control Stack support

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Add the org.gnu.gdb.aarch64.gcs feature with the GCSPR register, and the
org.gnu.gdb.aarch64.gcs.linux feature with "registers" to represent the
Linux kernel ptrace and prctl knobs that enable and lock specific GCS
functionality.

This code supports GCS only in Linux userspace applications, so the
GCSPR that is exposed is the one at EL0.

Also, support for calling inferior functions is enabled by adding an
implementation for the shadow_stack_push gdbarch method.

If for some reason a target description contains the
org.gnu.gdb.aarch64.gcs feature but not the
org.gnu.gdb.aarch64.gcs.linux feature then GCS support is disabled and
GDB continues the debugging session.  Features that need GCS
support (for example, calling inferior functions) will not work and the
inferior will get a segmentation fault signal instead.  There's a
testcase for this scenario but it only checks the native debugging case,
even though in practice this problem would only occur in remote
debugging with a broken stub or gdbserver.  I tested manually with a
gdbserver hacked to send a broken target description and it worked as
described.

Testcases gdb.arch/aarch64-gcs.exp, gdb.arch/aarch64-gcs-core.exp and
gdb.arch/aarch64-gcs-wrong-tdesc.exp are included to cover the added
functionality.

Reviewed-By: Christina Schimpe <christina.schimpe@intel.com>
Approved-By: Luis Machado <luis.machado@arm.com>
This commit is contained in:
Thiago Jung Bauermann
2025-05-01 18:12:19 -03:00
parent 02ecff0c71
commit ff62d39aa4
21 changed files with 1101 additions and 1 deletions
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46
gdbserver/linux-aarch64-low.cc
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@@ -39,6 +39,7 @@
#include "gdb_proc_service.h"
#include "arch/aarch64.h"
#include "arch/aarch64-gcs-linux.h"
#include "arch/aarch64-mte-linux.h"
#include "arch/aarch64-scalable-linux.h"
#include "linux-aarch32-tdesc.h"
@@ -321,6 +322,42 @@ aarch64_store_tlsregset (struct regcache *regcache, const void *buf)
supply_register (regcache, *regnum, tls_buf + sizeof (uint64_t));
}
/* Fill BUF with the GCS registers from REGCACHE. */
static void
aarch64_fill_gcsregset (regcache *regcache, void *buf)
{
user_gcs *regset = (user_gcs *) buf;
int gcspr_regnum = find_regno (regcache->tdesc, "gcspr");
int features_enabled_regnum = find_regno (regcache->tdesc,
"gcs_features_enabled");
int features_locked_regnum = find_regno (regcache->tdesc,
"gcs_features_locked");
collect_register (regcache, gcspr_regnum, &regset->gcspr_el0);
collect_register (regcache, features_enabled_regnum,
&regset->features_enabled);
collect_register (regcache, features_locked_regnum, &regset->features_locked);
}
/* Store the GCS registers in BUF to REGCACHE. */
static void
aarch64_store_gcsregset (regcache *regcache, const void *buf)
{
const user_gcs *regset = (const user_gcs *) buf;
int gcspr_regnum = find_regno (regcache->tdesc, "gcspr");
int features_enabled_regnum = find_regno (regcache->tdesc,
"gcs_features_enabled");
int features_locked_regnum = find_regno (regcache->tdesc,
"gcs_features_locked");
supply_register (regcache, gcspr_regnum, &regset->gcspr_el0);
supply_register (regcache, features_enabled_regnum,
&regset->features_enabled);
supply_register (regcache, features_locked_regnum, &regset->features_locked);
}
bool
aarch64_target::low_supports_breakpoints ()
{
@@ -846,6 +883,10 @@ static struct regset_info aarch64_regsets[] =
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_TLS,
0, OPTIONAL_REGS,
aarch64_fill_tlsregset, aarch64_store_tlsregset },
/* Guarded Control Stack registers. */
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_ARM_GCS,
0, OPTIONAL_REGS,
aarch64_fill_gcsregset, aarch64_store_gcsregset },
NULL_REGSET
};
@@ -909,6 +950,10 @@ aarch64_adjust_register_sets (const struct aarch64_features &features)
if (features.sme2)
regset->size = AARCH64_SME2_ZT0_SIZE;
break;
case NT_ARM_GCS:
if (features.gcs_linux)
regset->size = sizeof (user_gcs);
break;
default:
gdb_assert_not_reached ("Unknown register set found.");
}
@@ -940,6 +985,7 @@ aarch64_target::low_arch_setup ()
/* A-profile MTE is 64-bit only. */
features.mte = linux_get_hwcap2 (pid, 8) & HWCAP2_MTE;
features.tls = aarch64_tls_register_count (tid);
features.gcs = features.gcs_linux = linux_get_hwcap (pid, 8) & HWCAP_GCS;
/* Scalable Matrix Extension feature and size check. */
if (linux_get_hwcap2 (pid, 8) & HWCAP2_SME)