Make mips registers of type unsigned_word.

Ensure all references to MIPS registers use same type.
This commit is contained in:
Andrew Cagney
1997-10-20 06:28:53 +00:00
parent 27637913f0
commit fb5a2a3e39
3 changed files with 14 additions and 3 deletions

View File

@@ -72,9 +72,10 @@ typedef unsigned64 uword64;
assume the HI32bits of the operand are zero, so we must perform a
mask to ensure we can use the simple subtraction to sign-extend. */
#define SIGNEXTEND(e,b) \
((unsigned_word) \
(((e) & ((uword64) 1 << ((b) - 1))) \
? (((e) & (((uword64) 1 << (b)) - 1)) - ((uword64)1 << (b))) \
: ((e) & (((((uword64) 1 << ((b) - 1)) - 1) << 1) | 1)))
: ((e) & (((((uword64) 1 << ((b) - 1)) - 1) << 1) | 1))))
/* Check if a value will fit within a halfword: */
#define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1))
@@ -354,7 +355,7 @@ struct _sim_cpu {
vector of registers. The internal simulator engine then uses
manifests to access the correct slot. */
signed_word registers[LAST_EMBED_REGNUM + 1];
unsigned_word registers[LAST_EMBED_REGNUM + 1];
int register_widths[NUM_REGS];
#define REGISTERS ((STATE_CPU (sd,0))->registers)