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[PATCH v2] binutils: arm: Fix disassembly of conditional VDUPs.

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VDUP (neon) instructions can be conditional, but this is not taken into
account in the current master. This commit fixes that by i) fixing the
VDUP instruction masks and ii) adding logic for disassembling
conditional neon instructions.

opcodes	* arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
	(print_insn_neon): Support disassembly of conditional
	instructions.

binutils* testsuite/binutils-all/arm/vdup-cond.d: New test for testing that
	conditional VDUP instructions are disassembled correctly.
	* testsuite/binutils-all/arm/vdup-cond.s: New file used by
	vdup-cond.d.
	* testsuite/binutils-all/arm/vdup-thumb.d: New test for testing
	that VDUP instructions (which are conditional in A32) can be
	disassembled in thumb mode.
	* testsuite/binutils-all/arm/vdup-cond.s: New file used by
	vdup-thumb.d.
This commit is contained in:
Fredrik Strupe
2020-04-17 17:25:19 +01:00
committed by Nick Clifton
parent 0203cad215
commit e409955ddc
7 changed files with 127 additions and 10 deletions
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18
binutils/testsuite/binutils-all/arm/vdup-cond.s Normal file
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@@ -0,0 +1,18 @@
.text
.arm
.section .vdups, "ax"
vdupeq.32 d0, r0
vdupne.32 d0, r0
vdupcs.32 d0, r0
vdupcc.32 d0, r0
vdupmi.32 d0, r0
vduppl.32 d0, r0
vdupvs.32 d0, r0
vdupvc.32 d0, r0
vduphi.32 d0, r0
vdupls.32 d0, r0
vdupge.32 d0, r0
vduplt.32 d0, r0
vdupgt.32 d0, r0
vduple.32 d0, r0
vdup.32 d0, r0