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Corrected spelling errors in comments
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@@ -819,7 +819,7 @@ mips32_next_pc (CORE_ADDR pc)
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} /* mips32_next_pc */
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/* Decoding the next place to set a breakpoint is irregular for the
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mips 16 variant, but fortunatly, there fewer instructions. We have to cope
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mips 16 variant, but fortunately, there fewer instructions. We have to cope
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ith extensions for 16 bit instructions and a pair of actual 32 bit instructions.
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We dont want to set a single step instruction on the extend instruction
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either.
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