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* gdbarch.sh (software_single_step): Remove "insert_breakpoints_p" and
"sig" arguments, add "regcache" argument. * gdbarch.c, gdbarch.h: Regenerate. * infrun.c (resume): Update SOFTWARE_SINGLE_STEP call arguments. (handle_inferior_event): Call remove_single_step_breakpoints directly instead of calling SOFTWARE_SINGLE_STEP to remove breakpoints. * alpha-tdep.c (alpha_software_single_step): Update argument list. Remove handling of !insert_breakpoints_p case. * arm-tdep.c (arm_software_single_step): Likewise. * cris-tdep.c (cris_software_single_step): Likewise. * mips-tdep.c (mips_software_single_step): Likewise. * rs6000-tdep.c (rs6000_software_single_step): Likewise. * sparc-tdep.c (sparc_software_single_step): Likewise. * spu-tdep.c (spu_software_single_step): Likewise. * alpha-tdep.h (alpha_software_single_step): Update prototype. * mips-tdep.h (mips_software_single_step): Likewise. * rs6000-tdep.h (rs6000_software_single_step): Likewise. * sparc-tdep.h (sparc_software_single_step): Likewise.
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@@ -2199,26 +2199,17 @@ mips_addr_bits_remove (CORE_ADDR addr)
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/* mips_software_single_step() is called just before we want to resume
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the inferior, if we want to single-step it but there is no hardware
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or kernel single-step support (MIPS on GNU/Linux for example). We find
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the target of the coming instruction and breakpoint it.
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single_step is also called just after the inferior stops. If we had
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set up a simulated single-step, we undo our damage. */
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the target of the coming instruction and breakpoint it. */
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int
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mips_software_single_step (enum target_signal sig, int insert_breakpoints_p)
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mips_software_single_step (struct regcache *regcache)
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{
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CORE_ADDR pc, next_pc;
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if (insert_breakpoints_p)
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{
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pc = read_register (mips_regnum (current_gdbarch)->pc);
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next_pc = mips_next_pc (pc);
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insert_single_step_breakpoint (next_pc);
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}
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else
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remove_single_step_breakpoints ();
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pc = read_register (mips_regnum (current_gdbarch)->pc);
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next_pc = mips_next_pc (pc);
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insert_single_step_breakpoint (next_pc);
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return 1;
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}
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