mirror of
https://github.com/bminor/binutils-gdb.git
synced 2025-12-27 09:38:57 +00:00
bfd:
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
This commit is contained in:
Joern Rennecke
352
opcodes/sh-dis.c
352
opcodes/sh-dis.c
@@ -24,6 +24,256 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#define LITTLE_BIT 2
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static void
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print_movxy (op, rn, rm, fprintf_fn, stream)
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sh_opcode_info *op;
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int rn, rm;
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fprintf_ftype fprintf_fn;
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void *stream;
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{
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int n;
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fprintf_fn (stream,"%s\t", op->name);
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for (n = 0; n < 2; n++)
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{
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switch (op->arg[n])
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{
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case A_IND_N:
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fprintf_fn (stream, "@r%d", rn);
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break;
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case A_INC_N:
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fprintf_fn (stream, "@r%d+", rn);
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break;
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case A_PMOD_N:
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fprintf_fn (stream, "@r%d+r8", rn);
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break;
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case A_PMODY_N:
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fprintf_fn (stream, "@r%d+r9", rn);
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break;
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case DSP_REG_M:
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fprintf_fn (stream, "a%c", '0' + rm);
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break;
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case DSP_REG_X:
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fprintf_fn (stream, "x%c", '0' + rm);
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break;
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case DSP_REG_Y:
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fprintf_fn (stream, "y%c", '0' + rm);
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break;
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default:
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abort ();
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}
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if (n == 0)
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fprintf_fn (stream, ",");
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}
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}
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/* Print a double data transfer insn. INSN is just the lower three
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nibbles of the insn, i.e. field a and the bit that indicates if
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a parallel processing insn follows.
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Return nonzero if a field b of a parallel processing insns follows. */
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static void
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print_insn_ddt (insn, info)
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int insn;
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struct disassemble_info *info;
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{
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fprintf_ftype fprintf_fn = info->fprintf_func;
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void *stream = info->stream;
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/* If this is just a nop, make sure to emit something. */
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if (insn == 0x000)
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fprintf_fn (stream, "nopx\tnopy");
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/* If a parallel processing insn was printed before,
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and we got a non-nop, emit a tab. */
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if ((insn & 0x800) && (insn & 0x3ff))
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fprintf_fn (stream, "\t");
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/* Check if either the x or y part is invalid. */
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if (((insn & 0xc) == 0 && (insn & 0x2a0))
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|| ((insn & 3) == 0 && (insn & 0x150)))
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fprintf_fn (stream, ".word 0x%x", insn);
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else
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{
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static sh_opcode_info *first_movx, *first_movy;
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sh_opcode_info *opx, *opy;
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int insn_x, insn_y;
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if (! first_movx)
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{
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for (first_movx = sh_table; first_movx->nibbles[1] != MOVX; )
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first_movx++;
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for (first_movy = first_movx; first_movy->nibbles[1] != MOVY; )
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first_movy++;
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}
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insn_x = (insn >> 2) & 0xb;
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if (insn_x)
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{
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for (opx = first_movx; opx->nibbles[2] != insn_x; ) opx++;
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print_movxy (opx, ((insn >> 9) & 1) + 4, (insn >> 7) & 1,
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fprintf_fn, stream);
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}
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insn_y = (insn & 3) | ((insn >> 1) & 8);
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if (insn_y)
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{
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if (insn_x)
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fprintf_fn (stream, "\t");
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for (opy = first_movy; opy->nibbles[2] != insn_y; ) opy++;
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print_movxy (opy, ((insn >> 8) & 1) + 6, (insn >> 6) & 1,
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fprintf_fn, stream);
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}
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}
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}
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static void
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print_dsp_reg (rm, fprintf_fn, stream)
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int rm;
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fprintf_ftype fprintf_fn;
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void *stream;
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{
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switch (rm)
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{
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case A_A1_NUM:
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fprintf_fn (stream, "a1");
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break;
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case A_A0_NUM:
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fprintf_fn (stream, "a0");
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break;
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case A_X0_NUM:
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fprintf_fn (stream, "x0");
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break;
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case A_X1_NUM:
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fprintf_fn (stream, "x1");
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break;
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case A_Y0_NUM:
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fprintf_fn (stream, "y0");
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break;
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case A_Y1_NUM:
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fprintf_fn (stream, "y1");
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break;
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case A_M0_NUM:
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fprintf_fn (stream, "m0");
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break;
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case A_A1G_NUM:
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fprintf_fn (stream, "a1g");
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break;
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case A_M1_NUM:
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fprintf_fn (stream, "m1");
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break;
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case A_A0G_NUM:
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fprintf_fn (stream, "a0g");
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break;
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default:
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fprintf_fn (stream, "0x%x", rm);
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break;
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}
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}
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static void
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print_insn_ppi (field_b, info)
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int field_b;
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struct disassemble_info *info;
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{
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static char *sx_tab[] = {"x0","x1","a0","a1"};
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static char *sy_tab[] = {"y0","y1","m0","m1"};
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fprintf_ftype fprintf_fn = info->fprintf_func;
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void *stream = info->stream;
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int nib1, nib2, nib3;
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char *dc;
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sh_opcode_info *op;
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if ((field_b & 0xe800) == 0)
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{
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fprintf_fn (stream, "psh%c\t#%d,",
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field_b & 0x1000 ? 'a' : 'l',
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(field_b >> 4) & 127);
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print_dsp_reg (field_b & 0xf, fprintf_fn, stream);
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return;
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}
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if ((field_b & 0xc000) == 0x4000 && (field_b & 0x3000) != 0x1000)
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{
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static char *du_tab[] = {"x0","y0","a0","a1"};
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static char *se_tab[] = {"x0","x1","y0","a1"};
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static char *sf_tab[] = {"y0","y1","x0","a1"};
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static char *sg_tab[] = {"m0","m1","a0","a1"};
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if (field_b & 0x2000)
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{
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fprintf_fn (stream, "p%s %s,%s,%s\t",
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(field_b & 0x1000) ? "add" : "sub",
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sx_tab[(field_b >> 6) & 3],
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sy_tab[(field_b >> 4) & 3],
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du_tab[(field_b >> 0) & 3]);
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}
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fprintf_fn (stream, "pmuls%c%s,%s,%s",
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field_b & 0x2000 ? ' ' : '\t',
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se_tab[(field_b >> 10) & 3],
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sf_tab[(field_b >> 8) & 3],
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sg_tab[(field_b >> 2) & 3]);
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return;
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}
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nib1 = PPIC;
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nib2 = field_b >> 12 & 0xf;
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nib3 = field_b >> 8 & 0xf;
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switch (nib3 & 0x3)
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{
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case 0:
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dc = "";
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nib1 = PPI3;
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break;
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case 1:
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dc = "";
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break;
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case 2:
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dc = "dct ";
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nib3 -= 1;
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break;
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case 3:
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dc = "dcf ";
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nib3 -= 2;
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break;
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}
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for (op = sh_table; op->name; op++)
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{
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if (op->nibbles[1] == nib1
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&& op->nibbles[2] == nib2
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&& op->nibbles[3] == nib3)
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{
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int n;
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fprintf_fn (stream, "%s%s\t", dc, op->name);
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for (n = 0; n < 3 && op->arg[n] != A_END; n++)
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{
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if (n && op->arg[1] != A_END)
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fprintf_fn (stream, ",");
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switch (op->arg[n])
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{
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case DSP_REG_N:
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print_dsp_reg (field_b & 0xf, fprintf_fn, stream);
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break;
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case DSP_REG_X:
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fprintf_fn (stream, sx_tab[(field_b >> 6) & 3]);
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break;
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case DSP_REG_Y:
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fprintf_fn (stream, sy_tab[(field_b >> 4) & 3]);
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break;
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case A_MACH:
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fprintf_fn (stream, "mach");
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break;
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case A_MACL:
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fprintf_fn (stream ,"macl");
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break;
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default:
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abort ();
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}
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}
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return;
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}
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}
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/* Not found. */
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fprintf_fn (stream, ".word 0x%x", field_b);
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}
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static int
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print_insn_shx (memaddr, info)
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bfd_vma memaddr;
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@@ -36,6 +286,34 @@ print_insn_shx (memaddr, info)
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int status;
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bfd_vma relmask = ~ (bfd_vma) 0;
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sh_opcode_info *op;
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int target_arch;
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switch (info->mach)
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{
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case bfd_mach_sh:
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target_arch = arch_sh1;
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break;
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case bfd_mach_sh2:
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target_arch = arch_sh2;
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break;
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case bfd_mach_sh_dsp:
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target_arch = arch_sh_dsp;
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break;
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case bfd_mach_sh3:
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target_arch = arch_sh3;
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break;
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case bfd_mach_sh3_dsp:
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target_arch = arch_sh3_dsp;
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break;
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case bfd_mach_sh3e:
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target_arch = arch_sh3e;
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break;
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case bfd_mach_sh4:
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target_arch = arch_sh4;
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break;
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default:
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abort ();
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}
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status = info->read_memory_func (memaddr, insn, 2, info);
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@@ -62,6 +340,32 @@ print_insn_shx (memaddr, info)
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nibs[3] = insn[1] & 0xf;
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}
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if (nibs[0] == 0xf && (nibs[1] & 4) == 0 && target_arch & arch_sh_dsp_up)
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{
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if (nibs[1] & 8)
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{
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int field_b;
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status = info->read_memory_func (memaddr + 2, insn, 2, info);
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if (status != 0)
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{
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info->memory_error_func (status, memaddr + 2, info);
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return -1;
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}
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if (info->flags & LITTLE_BIT)
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field_b = insn[1] << 8 | insn[0];
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else
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field_b = insn[0] << 8 | insn[1];
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print_insn_ppi (field_b, info);
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print_insn_ddt ((nibs[1] << 8) | (nibs[2] << 4) | nibs[3], info);
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return 4;
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}
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print_insn_ddt ((nibs[1] << 8) | (nibs[2] << 4) | nibs[3], info);
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return 2;
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}
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for (op = sh_table; op->name; op++)
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{
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int n;
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@@ -72,6 +376,8 @@ print_insn_shx (memaddr, info)
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int disp_pc;
|
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bfd_vma disp_pc_addr = 0;
|
||||
|
||||
if ((op->arch & target_arch) == 0)
|
||||
goto fail;
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for (n = 0; n < 4; n++)
|
||||
{
|
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int i = op->nibbles[n];
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@@ -141,6 +447,16 @@ print_insn_shx (memaddr, info)
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||||
case REG_B:
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||||
rb = nibs[n] & 0x07;
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||||
break;
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case SDT_REG_N:
|
||||
/* sh-dsp: single data transfer. */
|
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rn = nibs[n];
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if ((rn & 0xc) != 4)
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goto fail;
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rn = rn & 0x3;
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rn |= (rn & 2) << 1;
|
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break;
|
||||
case PPI:
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goto fail;
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default:
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abort();
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}
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@@ -176,6 +492,9 @@ print_insn_shx (memaddr, info)
|
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case A_DISP_REG_N:
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fprintf_fn (stream, "@(%d,r%d)", imm, rn);
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||||
break;
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||||
case A_PMOD_N:
|
||||
fprintf_fn (stream, "@r%d+r8", rn);
|
||||
break;
|
||||
case A_REG_M:
|
||||
fprintf_fn (stream, "r%d", rm);
|
||||
break;
|
||||
@@ -224,6 +543,36 @@ print_insn_shx (memaddr, info)
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case A_VBR:
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fprintf_fn (stream, "vbr");
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break;
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case A_DSR:
|
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fprintf_fn (stream, "dsr");
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break;
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case A_MOD:
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fprintf_fn (stream, "mod");
|
||||
break;
|
||||
case A_RE:
|
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fprintf_fn (stream, "re");
|
||||
break;
|
||||
case A_RS:
|
||||
fprintf_fn (stream, "rs");
|
||||
break;
|
||||
case A_A0:
|
||||
fprintf_fn (stream, "a0");
|
||||
break;
|
||||
case A_X0:
|
||||
fprintf_fn (stream, "x0");
|
||||
break;
|
||||
case A_X1:
|
||||
fprintf_fn (stream, "x1");
|
||||
break;
|
||||
case A_Y0:
|
||||
fprintf_fn (stream, "y0");
|
||||
break;
|
||||
case A_Y1:
|
||||
fprintf_fn (stream, "y1");
|
||||
break;
|
||||
case DSP_REG_M:
|
||||
print_dsp_reg (rm, fprintf_fn, stream);
|
||||
break;
|
||||
case A_SSR:
|
||||
fprintf_fn (stream, "ssr");
|
||||
break;
|
||||
@@ -245,9 +594,6 @@ print_insn_shx (memaddr, info)
|
||||
case A_DBR:
|
||||
fprintf_fn (stream, "dbr");
|
||||
break;
|
||||
case FD_REG_N:
|
||||
if (0)
|
||||
goto d_reg_n;
|
||||
case F_REG_N:
|
||||
fprintf_fn (stream, "fr%d", rn);
|
||||
break;
|
||||
|
||||
Reference in New Issue
Block a user