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MIPS: Apply coding guidelines: indentation
Format mips-tdep.c code as described on links: https://sourceware.org/gdb/wiki/Internals%20GDB-C-Coding-Standards https://www.gnu.org/prep/standards/standards.html#Comments correcting indentation as required. Approved-by: Kevin Buettner <kevinb@redhat.com> Approved-by: Maciej W. Rozycki <macro@orcam.me.uk>
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committed by
Maciej W. Rozycki
parent
95b3d5c1ed
commit
c27019491e
@@ -1570,7 +1570,7 @@ mips_insn_size (enum mips_isa isa, ULONGEST insn)
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else
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return MIPS_INSN16_SIZE;
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case ISA_MIPS:
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return MIPS_INSN32_SIZE;
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return MIPS_INSN32_SIZE;
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}
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internal_error (_("invalid ISA"));
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}
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@@ -2049,27 +2049,27 @@ micromips_next_pc (struct regcache *regcache, CORE_ADDR pc)
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case 0x1d: /* JALS: bits 011101 */
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case 0x35: /* J: bits 110101 */
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case 0x3d: /* JAL: bits 111101 */
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pc = ((pc | 0x7fffffe) ^ 0x7fffffe) | (b0s26_imm (insn) << 1);
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pc = ((pc | 0x7fffffe) ^ 0x7fffffe) | (b0s26_imm (insn) << 1);
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break;
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case 0x25: /* BEQ: bits 100101 */
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if (regcache_raw_get_signed (regcache, b0s5_reg (insn >> 16))
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== regcache_raw_get_signed (regcache, b5s5_reg (insn >> 16)))
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pc += micromips_relative_offset16 (insn);
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else
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pc += micromips_pc_insn_size (gdbarch, pc);
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if (regcache_raw_get_signed (regcache, b0s5_reg (insn >> 16))
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== regcache_raw_get_signed (regcache, b5s5_reg (insn >> 16)))
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pc += micromips_relative_offset16 (insn);
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else
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pc += micromips_pc_insn_size (gdbarch, pc);
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break;
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case 0x2d: /* BNE: bits 101101 */
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if (regcache_raw_get_signed (regcache, b0s5_reg (insn >> 16))
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!= regcache_raw_get_signed (regcache, b5s5_reg (insn >> 16)))
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pc += micromips_relative_offset16 (insn);
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!= regcache_raw_get_signed (regcache, b5s5_reg (insn >> 16)))
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pc += micromips_relative_offset16 (insn);
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else
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pc += micromips_pc_insn_size (gdbarch, pc);
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pc += micromips_pc_insn_size (gdbarch, pc);
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break;
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case 0x3c: /* JALX: bits 111100 */
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pc = ((pc | 0xfffffff) ^ 0xfffffff) | (b0s26_imm (insn) << 2);
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pc = ((pc | 0xfffffff) ^ 0xfffffff) | (b0s26_imm (insn) << 2);
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break;
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}
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break;
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@@ -3064,7 +3064,7 @@ micromips_scan_prologue (struct gdbarch *gdbarch,
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&& dreg == MIPS_SP_REGNUM && sreg == MIPS_SP_REGNUM
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&& treg == 3)
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/* (D)SUBU $sp, $v1 */
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sp_adj = v1_off;
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sp_adj = v1_off;
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else if (op != 0x150
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/* ADDU: bits 000000 00101010000 */
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/* DADDU: bits 010110 00101010000 */
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