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Modify previous patch so that it is only triggered for COFF format executables.
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@@ -234,14 +234,18 @@ sim_create_inferior (sd, abfd, argv, env)
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break;
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case bfd_mach_arm_5:
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/* This is a special case in order to support COFF based ARM toolchains.
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The COFF header does not have enough room to store all the different
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kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
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to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
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machine type here, we assume it could be any of the above architectures
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and so select the most feature-full. */
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ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
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break;
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if (bfd_family_coff (abfd))
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{
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/* This is a special case in order to support COFF based ARM toolchains.
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The COFF header does not have enough room to store all the different
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kinds of ARM cpu, so the XScale, v5T and v5TE architectures all default
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to v5. (See coff_set_flags() in bdf/coffcode.h). So if we see a v5
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machine type here, we assume it could be any of the above architectures
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and so select the most feature-full. */
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ARMul_SelectProcessor (state, ARM_v5_Prop | ARM_v5e_Prop | ARM_XScale_Prop);
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break;
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}
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/* Otherwise drop through. */
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case bfd_mach_arm_5T:
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ARMul_SelectProcessor (state, ARM_v5_Prop);
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