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RISC-V: process rs_align_code also when relaxing
riscv_handle_align() runs after all input was processed. Whether relaxation is enabled for any particular piece of code is not recorded anywhere. (This issue was even "worked around" in a gas testcase, which is adjusted accordingly.) Furthermore, as demonstrated by an ld testcase, tail padding in an object file's executable sections depended on whether relaxation was enabled at the end of assembly: NOPs were emitted only when relaxation was off; zeroes were emitted with relaxation enabled. (It could probably be either way, but it should be independent of relaxation state at the end of assembly. Except of course write.c, in a comment ahead of #define-ing SUB_SEGMENT_ALIGN(), explicitly says "proper nop-filling".) While re-indenting, drop the "odd_padding" variable. It's used exactly once, and having the actual expression right in the if() is imo helping readers to understand what the intentions are. While touching the ld testcase, also tighten the expectations for the addresses of the two symbols: The last two digits have to have fixed values.
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@@ -5023,15 +5023,12 @@ riscv_handle_align (fragS *fragP)
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switch (fragP->fr_type)
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{
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case rs_align_code:
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/* When relaxing, riscv_frag_align_code handles code alignment. */
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if (!riscv_opts.relax)
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{
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bfd_signed_vma bytes = (fragP->fr_next->fr_address
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- fragP->fr_address - fragP->fr_fix);
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/* We have 4 byte uncompressed nops. */
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bfd_signed_vma size = 4;
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bfd_signed_vma excess = bytes % size;
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bfd_boolean odd_padding = (excess % 2 == 1);
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char *p = fragP->fr_literal + fragP->fr_fix;
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if (bytes <= 0)
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@@ -5040,7 +5037,7 @@ riscv_handle_align (fragS *fragP)
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/* Insert zeros or compressed nops to get 4 byte alignment. */
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if (excess)
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{
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if (odd_padding)
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if (excess % 2)
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riscv_add_odd_padding_symbol (fragP);
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riscv_make_nops (p, excess);
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fragP->fr_fix += excess;
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@@ -1,7 +1,4 @@
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.attribute arch, "rv32ic"
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.option norelax # FIXME: assembler fill the paddings after parsing everything,
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# so we probably won't fill anything for the norelax region when
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# the riscv_opts.relax is enabled at somewhere.
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.section .text.cross.section.A, "ax"
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.option push
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@@ -7,7 +7,7 @@
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Disassembly of section .text:
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0+[0-9a-f]+ <_start>:
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0+[0-9a-f]+00 <_start>:
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.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<gdata>
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.*:[ ]+[0-9a-f]+[ ]+jal[ ]+.*
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.*:[ ]+[0-9a-f]+[ ]+j[ ]+.*
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@@ -41,6 +41,32 @@ Disassembly of section .text:
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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0+[0-9a-f]+ <func>:
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0+[0-9a-f]+80 <func>:
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.*:[ ]+[0-9a-f]+[ ]+ret
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[ ]+...
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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.*:[ ]+[0-9a-f]+[ ]+nop
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