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PR gas/11395

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* config/tc-hppa.c (pa_ip): Set doubleword carry/borrow bit when a
	doubleword completer or doubleword condition is found in an add/sub
	instruction.  Reject match for 'A'/'S' only if there is no condition
	and d bit is not set.

	* gas/hppa/basic/add2.s: Add test for a simple doubleword carry
	instruction.
	* gas/hppa/basic/sub2.s: Add tests for simple word and doubleword
	borrow instructions.
	* gas/hppa/basic/basic.exp: Update regexps for above.

	* opcode/hppa.h: Clear "d" bit in "add" and "sub" patterns.
This commit is contained in:
Dave Anglin
2010-12-27 02:05:14 +00:00
parent 53e6a1dd44
commit a64718d3b1
8 changed files with 57 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
gas/ChangeLog
View File

@@ -1,3 +1,11 @@
2010-12-26 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR gas/11395
* config/tc-hppa.c (pa_ip): Set doubleword carry/borrow bit when a
doubleword completer or doubleword condition is found in an add/sub
instruction. Reject match for 'A'/'S' only if there is no condition
and d bit is not set.
2010-12-18 Mingjie Xing <mingjie.xing@gmail.com> 2010-12-18 Mingjie Xing <mingjie.xing@gmail.com>
* config/tc-mips.c (insn_uses_reg): Handle the new flags * config/tc-mips.c (insn_uses_reg): Handle the new flags

20
gas/config/tc-hppa.c
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@@ -3758,6 +3758,8 @@ pa_ip (char *str)
else else
break; break;
/* Set doubleword carry bit. */
opcode |= 0x20;
INSERT_FIELD_AND_CONTINUE (opcode, flag, 11); INSERT_FIELD_AND_CONTINUE (opcode, flag, 11);
/* Handle 32 bit carry for ADD. */ /* Handle 32 bit carry for ADD. */
@@ -3826,6 +3828,8 @@ pa_ip (char *str)
else else
break; break;
/* Set doubleword borrow bit. */
opcode |= 0x20;
INSERT_FIELD_AND_CONTINUE (opcode, flag, 11); INSERT_FIELD_AND_CONTINUE (opcode, flag, 11);
/* Handle 32 bit borrow for SUB. */ /* Handle 32 bit borrow for SUB. */
@@ -3970,11 +3974,13 @@ pa_ip (char *str)
/* Handle an add condition. */ /* Handle an add condition. */
case 'A': case 'A':
/* PR gas/11395 /* PR gas/11395
If we are looking for 64-bit add conditions and we If we don't have a ",*" condition or "dc" completer,
do not have the ",*" prefix, then we have no match. */ then we have a doubleword carry match failure. */
if (*s != ',') if (*s != ',' && !(opcode & 0x20))
break; break;
opcode |= 0x20;
/* Fall through. */ /* Fall through. */
case 'a': case 'a':
cmpltr = 0; cmpltr = 0;
flag = 0; flag = 0;
@@ -4142,6 +4148,14 @@ pa_ip (char *str)
/* Handle a compare/subtract condition. */ /* Handle a compare/subtract condition. */
case 'S': case 'S':
/* PR gas/11395
If we don't have a ",*" condition or "dc" completer,
then we have a doubleword carry match failure. */
if (*s != ',' && !(opcode & 0x20))
break;
opcode |= 0x20;
/* Fall through. */
case 's': case 's':
cmpltr = 0; cmpltr = 0;
flag = 0; flag = 0;

9
gas/testsuite/ChangeLog
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@@ -1,3 +1,12 @@
2010-12-26 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR gas/11395
* gas/hppa/basic/add2.s: Add test for a simple doubleword carry
instruction.
* gas/hppa/basic/sub2.s: Add tests for simple word and doubleword
borrow instructions.
* gas/hppa/basic/basic.exp: Update regexps for above.
2010-12-18 Mingjie Xing <mingjie.xing@gmail.com> 2010-12-18 Mingjie Xing <mingjie.xing@gmail.com>
* gas/mips/loongson-3a-2.s, gas/mips/loongson-3a-2.d, * gas/mips/loongson-3a-2.s, gas/mips/loongson-3a-2.d,

3
gas/testsuite/gas/hppa/basic/add2.s
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@@ -92,5 +92,6 @@
add,tsv,dc,*ev %r4,%r5,%r6 add,tsv,dc,*ev %r4,%r5,%r6
;; PR gas/11395: Check for the correct assembly ;; PR gas/11395: Check for the correct assembly
;; of an unconditional 32-bit add instruction. ;; of unconditional 32-bit and 64-bit add instructions.
add %r1,%r1,%r1 add %r1,%r1,%r1
add,dc %r1,%r1,%r1

7
gas/testsuite/gas/hppa/basic/basic.exp
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@@ -675,6 +675,7 @@ proc do_add2 {} {
-re "^ +\[0-9\]+ 0138 08A4DF26\[^\n\]*\n" { set x [expr $x+1] } -re "^ +\[0-9\]+ 0138 08A4DF26\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 013c 08A4FF26\[^\n\]*\n" { set x [expr $x+1] } -re "^ +\[0-9\]+ 013c 08A4FF26\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 0140 08210601\[^\n\]*\n" { set x [expr $x+1] } -re "^ +\[0-9\]+ 0140 08210601\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 0144 08210721\[^\n\]*\n" { set x [expr $x+1] }
-re "\[^\n\]*\n" { } -re "\[^\n\]*\n" { }
timeout { perror "timeout\n"; break } timeout { perror "timeout\n"; break }
eof { break } eof { break }
@@ -686,7 +687,7 @@ proc do_add2 {} {
gas_finish gas_finish
# Did we find what we were looking for? If not, flunk it. # Did we find what we were looking for? If not, flunk it.
if [expr $x==81] then { pass $testname } else { fail $testname } if [expr $x==82] then { pass $testname } else { fail $testname }
} }
proc do_sh1add {} { proc do_sh1add {} {
@@ -1582,6 +1583,8 @@ proc do_sub2 {} {
-re "^ +\[0-9\]+ 0174 08A4BCE6\[^\n\]*\n" { set x [expr $x+1] } -re "^ +\[0-9\]+ 0174 08A4BCE6\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 0178 08A4DCE6\[^\n\]*\n" { set x [expr $x+1] } -re "^ +\[0-9\]+ 0178 08A4DCE6\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 017c 08A4FCE6\[^\n\]*\n" { set x [expr $x+1] } -re "^ +\[0-9\]+ 017c 08A4FCE6\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 0180 08210401\[^\n\]*\n" { set x [expr $x+1] }
-re "^ +\[0-9\]+ 0184 08210521\[^\n\]*\n" { set x [expr $x+1] }
-re "\[^\n\]*\n" { } -re "\[^\n\]*\n" { }
timeout { perror "timeout\n"; break } timeout { perror "timeout\n"; break }
eof { break } eof { break }
@@ -1593,7 +1596,7 @@ proc do_sub2 {} {
gas_finish gas_finish
# Did we find what we were looking for? If not, flunk it. # Did we find what we were looking for? If not, flunk it.
if [expr $x==96] then { pass $testname } else { fail $testname } if [expr $x==98] then { pass $testname } else { fail $testname }
} }
proc do_ds {} { proc do_ds {} {

6
gas/testsuite/gas/hppa/basic/sub2.s
View File

@@ -107,3 +107,9 @@
sub,tsv,tc,*>> %r4,%r5,%r6 sub,tsv,tc,*>> %r4,%r5,%r6
sub,tsv,tc,*nsv %r4,%r5,%r6 sub,tsv,tc,*nsv %r4,%r5,%r6
sub,tsv,tc,*ev %r4,%r5,%r6 sub,tsv,tc,*ev %r4,%r5,%r6
;; PR gas/11395: Check for the correct assembly
;; of unconditional 32-bit and 64-bit sub instructions.
sub %r1,%r1,%r1
sub,db %r1,%r1,%r1

5
include/ChangeLog
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@@ -1,3 +1,8 @@
2010-12-26 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
PR gas/11395
* opcode/hppa.h: Clear "d" bit in "add" and "sub" patterns.
2010-11-25 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> 2010-11-25 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU. * opcode/s390.h (enum s390_opcode_cpu_val): Add S390_OPCODE_MAXCPU.

10
include/opcode/hppa.h
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@@ -634,20 +634,20 @@ static const struct pa_opcode pa_opcodes[] =
{ "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0}, { "addio", 0xb4000800, 0xfc000800, "?ai,b,x", pa10, 0},
{ "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0}, { "addit", 0xb0000000, 0xfc000800, "?ai,b,x", pa10, 0},
{ "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0}, { "addito", 0xb0000800, 0xfc000800, "?ai,b,x", pa10, 0},
{ "add", 0x08000720, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT}, { "add", 0x08000700, 0xfc0007e0, "cY?Ax,b,t", pa20, FLAG_STRICT},
{ "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT}, { "add", 0x08000700, 0xfc0007e0, "cy?ax,b,t", pa10, FLAG_STRICT},
{ "add", 0x08000220, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT}, { "add", 0x08000200, 0xfc0003e0, "ca?Ax,b,t", pa20, FLAG_STRICT},
{ "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT}, { "add", 0x08000200, 0xfc0003e0, "ca?ax,b,t", pa10, FLAG_STRICT},
{ "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0}, { "add", 0x08000600, 0xfc000fe0, "?ax,b,t", pa10, 0},
{ "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0}, { "addl", 0x08000a00, 0xfc000fe0, "?ax,b,t", pa10, 0},
{ "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0}, { "addo", 0x08000e00, 0xfc000fe0, "?ax,b,t", pa10, 0},
{ "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0}, { "addc", 0x08000700, 0xfc000fe0, "?ax,b,t", pa10, 0},
{ "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0}, { "addco", 0x08000f00, 0xfc000fe0, "?ax,b,t", pa10, 0},
{ "sub", 0x080004e0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT}, { "sub", 0x080004c0, 0xfc0007e0, "ct?Sx,b,t", pa20, FLAG_STRICT},
{ "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT}, { "sub", 0x080004c0, 0xfc0007e0, "ct?sx,b,t", pa10, FLAG_STRICT},
{ "sub", 0x08000520, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT}, { "sub", 0x08000500, 0xfc0007e0, "cB?Sx,b,t", pa20, FLAG_STRICT},
{ "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT}, { "sub", 0x08000500, 0xfc0007e0, "cb?sx,b,t", pa10, FLAG_STRICT},
{ "sub", 0x08000420, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT}, { "sub", 0x08000400, 0xfc0007e0, "cv?Sx,b,t", pa20, FLAG_STRICT},
{ "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT}, { "sub", 0x08000400, 0xfc0007e0, "cv?sx,b,t", pa10, FLAG_STRICT},
{ "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0}, { "sub", 0x08000400, 0xfc000fe0, "?sx,b,t", pa10, 0},
{ "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0}, { "subo", 0x08000c00, 0xfc000fe0, "?sx,b,t", pa10, 0},