Enable multi-arch for i386.

This commit is contained in:
Andrew Cagney
2001-11-08 18:32:08 +00:00
parent 8ea43c6d5a
commit a62cc96ec5
4 changed files with 93 additions and 1 deletions

View File

@@ -22,16 +22,34 @@
#ifndef I386_TDEP_H
#define I386_TDEP_H
#if !defined (FPU_REG_RAW_SIZE) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FPU_REG_RAW_SIZE 10
#endif
#if !defined (XMM0_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define XMM0_REGNUM FIRST_XMM_REGNUM
#endif
#if !defined (FIRST_FPU_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FIRST_FPU_REGNUM FP0_REGNUM
#endif
#if !defined (LAST_FPU_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define LAST_FPU_REGNUM (gdbarch_tdep (current_gdbarch)->last_fpu_regnum)
#endif
#if !defined (FIRST_XMM_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FIRST_XMM_REGNUM (gdbarch_tdep (current_gdbarch)->first_xmm_regnum)
#endif
#if !defined (LAST_XMM_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define LAST_XMM_REGNUM (gdbarch_tdep (current_gdbarch)->last_xmm_regnum)
#endif
#if !defined (MXCSR_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define MXCSR_REGNUM (gdbarch_tdep (current_gdbarch)->mxcsr_regnum)
#endif
#if !defined (FIRST_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FIRST_FPU_CTRL_REGNUM (gdbarch_tdep (current_gdbarch)->first_fpu_ctrl_regnum)
#endif
#if !defined (LAST_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define LAST_FPU_CTRL_REGNUM (FIRST_FPU_CTRL_REGNUM + 7)
#endif
/* All of these control registers (except for FCOFF and FDOFF) are
sixteen bits long (at most) in the FPU, but are zero-extended to
@@ -39,22 +57,38 @@
compute the size of the control register file, and somewhat easier
to convert to and from the FSAVE instruction's 32-bit format. */
/* FPU control word. */
#if !defined (FCTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FCTRL_REGNUM (FIRST_FPU_CTRL_REGNUM)
#endif
/* FPU status word. */
#if !defined (FSTAT_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FSTAT_REGNUM (FIRST_FPU_CTRL_REGNUM + 1)
#endif
/* FPU register tag word. */
#if !defined (FTAG_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FTAG_REGNUM (FIRST_FPU_CTRL_REGNUM + 2)
#endif
/* FPU instruction's code segment selector 16 bits, called "FPU Instruction
Pointer Selector" in the x86 manuals. */
#if !defined (FCS_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FCS_REGNUM (FIRST_FPU_CTRL_REGNUM + 3)
#endif
/* FPU instruction's offset within segment ("Fpu Code OFFset"). */
#if !defined (FCOFF_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FCOFF_REGNUM (FIRST_FPU_CTRL_REGNUM + 4)
#endif
/* FPU operand's data segment. */
#if !defined (FDS_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FDS_REGNUM (FIRST_FPU_CTRL_REGNUM + 5)
#endif
/* FPU operand's offset within segment. */
#if !defined (FDOFF_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FDOFF_REGNUM (FIRST_FPU_CTRL_REGNUM + 6)
#endif
/* FPU opcode, bottom eleven bits. */
#if !defined (FOP_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define FOP_REGNUM (FIRST_FPU_CTRL_REGNUM + 7)
#endif
/* i386 architecture specific information. */
struct gdbarch_tdep
@@ -66,8 +100,14 @@ struct gdbarch_tdep
int first_fpu_ctrl_regnum;
};
#if !defined (IS_FP_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define IS_FP_REGNUM(n) (FIRST_FPU_REGNUM <= (n) && (n) <= LAST_FPU_REGNUM)
#endif
#if !defined (IS_FPU_CTRL_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define IS_FPU_CTRL_REGNUM(n) (FIRST_FPU_CTRL_REGNUM <= (n) && (n) <= LAST_FPU_CTRL_REGNUM)
#endif
#if !defined (IS_SSE_REGNUM) || (GDB_MULTI_ARCH > GDB_MULTI_ARCH_PARTIAL)
#define IS_SSE_REGNUM(n) (FIRST_XMM_REGNUM <= (n) && (n) <= LAST_XMM_REGNUM)
#endif
#endif